Apparatus and method for narrowband data transmission by means of a DSSS transmission system

Abstract

A system providing a spread spectrum and a narrowband data transmission may comprise a DSSS transmitter and a DSSS receiver. The DSSS transmitter may convert a bit succession (d.sub.i) into a chip succession (s.sub.k) using a chip sequence (c.sub.j, c.sub.j′) and send a succession of impulses (s(t)) corresponding to the chip succession (s.sub.k). The DSSS receiver may receive impulses (s(t)) sent by the transmitter and filter the received impulses (r(t)) using a filter having an impulse response (x(t)) dependent on the chip sequence (c.sub.j, c.sub.j′). The chip sequence (c.sub.j) may be a spread sequence. The narrowband data transmission may use chip sequence (c.sub.j′) and a corresponding impulse response (x(t)) of the filter. The chip sequence (c.sub.j′) does not comprise a succession having two directly successive arithmetic sign changes and an arithmetic sign change does not occur after the first and before the last chip in the chip sequence (c.sub.j′).

Claims

1. A system providing a spread spectrum and a narrowband data transmission, the system comprising: a direct sequence spread spectrum (DSSS) transmitter converting a bit succession (d.sub.i) to be transmitted into a chip succession (s.sub.k) using a chip sequence (c.sub.j, c.sub.j′) and to send a succession of impulses (s(t)) corresponding to the chip succession (s.sub.k); and a DSSS receiver using a transmission channel to receive impulses (s(t)) sent by the transmitter, and to filter the received impulses (r(t)) using a filter having an impulse response (x(t)) dependent on the chip sequence (c.sub.j, c.sub.j′), wherein for the spread spectrum data transmission the chip sequence (c.sub.j) is a spread sequence; and wherein for the narrowband data transmission a chip sequence (c.sub.j′) and a corresponding impulse response (x(t)) of the filter are set, wherein the chip sequence (c.sub.j′) never comprises a succession having two directly successive arithmetic sign changes nor an arithmetic sign change between the first and second chip or immediately before the last chip in the chip sequence (c.sub.j′); the DSSS transmitter is designed to transmit the succession of impulses at an adjustable symbol rate (T.sub.SYMB.sup.−1); the symbol rate for a spread spectrum data transmission corresponds to a prescribable first symbol rate (T.sub.CHIP.sup.−1); and the symbol rate for a narrowband transmission corresponds to a prescribable second symbol rate, which is reduced in comparison with the first symbol rate (T.sub.CHIP.sup.−1), and only one corresponding impulse (g″.sub.TX(t)) is sent for each of a plurality of like successive chips, so that groups of chips having the same arithmetic sign are combined to form symbols.

2. The system as claimed in claim 1, wherein the spread sequence (c.sub.j) is a pseudorandom chip sequence or is a chip sequence derived from one or more pseudorandom chip sequences.

3. The system as claimed in claim 1, wherein the spread sequence (c.sub.j) has two successive arithmetic sign changes at least once.

4. The system as claimed in claim 1, wherein in the case of narrowband data transmission the chip sequence (c.sub.j′) is a hopping sequence.

5. The system as claimed in claim 1, wherein in the case of narrowband data transmission the chip sequence (c.sub.j′) is an asymmetric hopping sequence.

6. The system as claimed in claim 1, wherein in the narrowband data transmission the chip sequence (c.sub.j′) has a prescribable number of chips, a first portion of which is allotted to a contiguous succession of “1”s and a second portion of which is allotted to a contiguous succession of “−1”s.

7. The system as claimed in claim 6, wherein the second symbol rate is adjustable such that two symbols are transmitted for each bit that is to be transmitted, thus achieving symmetric Manchester coding for the bits that are to be transmitted.

8. The system as claimed in claim 1, wherein: for each symbol an impulse (g″.sub.TX(t)) is sent and the sent impulses (g″.sub.TX(t)) have the same width, and the groups of chips that are combined to form a symbol have approximately the same number of chips.

9. A system comprising: a direct sequence spread spectrum (DSSS) transmitter for converting a bit succession (d.sub.i) that is to be transmitted into a chip succession (s.sub.k) using a chip sequence (c.sub.j, c.sub.j′) and to send a succession of impulses (g″.sub.TX(t)) that corresponds to the chip succession (s.sub.k), the DSSS transmitter; wherein the DSSS transmitter is configurable for a spread spectrum mode and a narrowband mode; the spread spectrum mode chip sequence (c.sub.j) is a spread sequence, and the narrowband mode a chip sequence (c.sub.j′) never comprises a succession having two directly successive arithmetic sign changes nor an arithmetic sign change between the first and second chip or immediately before the last chip in the chip sequence (c.sub.j′); wherein the DSSS transmitter is further configured to transmit the succession of impulses at an adjustable symbol rate (T.sub.SYMB.sup.−1), wherein the symbol rate in the spread spectrum mode corresponds to a prescribable first symbol rate (T.sub.CHIP.sup.−1) and wherein the symbol rate in the narrowband mode corresponds to a prescribable second symbol rate, which is reduced in comparison with the first symbol rate (T.sub.CHIP.sup.−1), and only one corresponding impulse (g″.sub.TX(t)) is sent for each of a plurality of like successive chips, so that groups of chips having the same arithmetic sign are combined to form symbols.

10. A system as claims in claim 9, further comprising a DSSS receiver for receiving signals that are sent using a transmitter as claimed in claim 9, the receiver comprising: a filter having an adjustable impulse response (x(t)) to which the impulses (r(t)) received from the transmitter are supplied; and the input response (x(t)) of the filter adjustable on the basis of the chip sequence set at the transmitter end.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) In the figures:

(2) FIG. 1 is a block diagram of a transmission system for sending (a) using binary PSK modulation (phase shift keying) and receiving (b) the modulated signals according to teachings of the present disclosure;

(3) FIG. 2 is a block diagram with transmitter (a) and receiver (b and c) of a transmission system with DSSS modulation according to teachings of the present disclosure;

(4) FIG. 3 is a block diagram with transmitter (a) and receiver (b) of a configurable DSSS transmission system according to teachings of the present disclosure;

(5) FIG. 4 shows various graphs relating to a pseudorandom spread sequence according to teachings of the present disclosure;

(6) FIG. 5 shows various graphs relating to a narrowband sequence as a substitute for the spread frequency from FIG. 4 according to teachings of the present disclosure;

(7) FIG. 6 shows timing diagrams of a BPSK transmission method with symmetric Manchester coding through suitable choice of a narrowband spread sequence and at a reduced symbol rate according to teachings of the present disclosure;

(8) FIG. 7 shows timing diagrams of a similar BPSK transmission method to that in FIG. 6, but with asymmetric Manchester coding according to teachings of the present disclosure;

(9) FIG. 8 shows a block diagram of a transmitter for the application of concatenated spreading using two spread sequences according to teachings of the present disclosure.

DETAILED DESCRIPTION

(10) In the figures, like reference symbols denote like or similar components or signals having like or similar meanings.

(11) FIG. 1 is a block diagram showing a model of data transmission for BPSK modulation (binary phase shift keying), which has been chosen as an example of a linear modulation method (e.g., QAM, PSK) according to teachings of the present disclosure. For each data symbol (bit) d.sub.i, an impulse g.sub.TX(t) is transmitted. In the model shown in FIG. 1, this involves the symbol d.sub.i, which can assume the values +1 and −1, being sampled periodically with a period duration T.sub.BIT, and a Dirac impulse δ(t−k.Math.T.sub.BIT) being supplied in accordance with the polarity of the symbol d.sub.i to the filter 10, which then outputs its impulse response g.sub.TX(t) with a polarity that corresponds to the polarity of the symbol d.sub.i. That is to say that at each sampling instant k.Math.T.sub.BIT (k is an integral time index) the filter 10 outputs the impulse response g.sub.TX(t−k.Math.T.sub.BIT) or −g.sub.TX(t−k.Math.T.sub.BIT) on the basis of the sample (+1 or −1). The sum of the time-staggered impulse responses yields the signal s(t) that is to be transmitted. This signal s(t) is converted into the radio frequency domain (RF domain) using the mixer 20, the output signal from the mixer being denoted by s.sub.RF(t). This signal s.sub.RF(t) reaches the receiver via the transmission channel (i.e. a radio link). The oscillator signal m.sub.TX(t), which is supplied to the mixer 20, has a (carrier) frequency f.sub.TX and a phase φ.sub.TX. This means that the spectrum of the signal s.sub.RF(t) is spectrally shifted in comparison with the spectrum of the signal s(t) by the absolute value of the carrier frequency f.sub.TX. The block diagram of the transmitter described is shown in FIG. 1a, and the corresponding diagram of the receiver is shown in FIG. 1b.

(12) The (radio frequency) signal s.sub.RF(t) transmitted via the channel CH is distorted by the transmission channel CH and overlaid with interference and noise on the way to the receiver. The received signal corresponding to the signal s.sub.RF(t) is denoted by r.sub.RF(t).

(13) At the receiver end, the received signal r.sub.RF(t) is converted to baseband using a complex multiplication 30 (using the receiver-end nominal oscillator frequency, i.e. carrier frequency, f.sub.RX).

(14) The result of the complex multiplication 30 comprises an inphase signal r.sub.I(t) and a corresponding quadrature signal r.sub.Q(t), the two together being denoted as a complex signal r(t)=r.sub.I(t)+j.Math.r.sub.Q(t) (j is the imaginary unit).

(15) The mixer 30 is an example of (arbitrarily implemented) frequency conversion of the useful signal to baseband. This frequency conversion can be effected in one step (direct down conversion) or in a plurality of steps (having a plurality of successive (complex) multiplications).

(16) At any rate, the spectral situation of the useful signal at the output of frequency conversion (i.e., the signal r(t)) has just one frequency error f.sub.E. By way of example, this frequency error f.sub.E corresponds to the difference in the (carrier) frequency used at the transmitter and receiver ends for up conversion and down conversion, i.e., f.sub.E=f.sub.TX−f.sub.RX. This comes about by virtue of the nominal transmission frequency (carrier frequency), in practice, being able to be provided only with finite accuracy both at the transmitter end and at the receiver end, meaning that the frequency normals used (for example quartz crystals), from which frequencies for up conversion and down conversion are derived, are defective.

(17) The spectral situation of the useful signal at the output of the frequency conversion can have not only the frequency error f.sub.E but also further frequency error components that can arise as a result of the Doppler effect, for example, during the radio transmission via the channel CH.

(18) In the case of coherent demodulation, a phase error φ.sub.E=φ.sub.TX−φ.sub.RX must also be borne in mind. The mixer 30 thus quite generally represents the (single—or multistage) conversion of the received RF signal r.sub.RF(t) to baseband.

(19) A second complex multiplication (mixer 31) is used to correct this (previously estimated) frequency error f.sub.E. There then remains only the frequency error from the frequency estimation. The mixer 31 thus quite generally (regardless of the specific implementation) represents the correction of the aforementioned frequency error. When coherent demodulation is used, the phase error φ.sub.E can also be corrected, for example using the mixer 31.

(20) The output signal r′(t) (which is complex and, for the purposes of estimation accuracy, no longer contains frequency errors) from the second mixer 31 contains not only the aforementioned distortions and interference but also the time-staggered impulse responses g.sub.TX (t−k.Math.T.sub.BIT) and −g.sub.TX(t−k.Math.T.sub.BIT) corresponding to the transmission signal s(t). The signal

(21) r′(t) is supplied to a reception filter 40, the impulse response g.sub.RX(t) of which can match the transmitted impulses g.sub.TX(t). What is known as a “matched filter” is referred to. The data reception using matched filters is known per se and is therefore not explained in more detail. However, unlike in known theoretical contexts, simplifications are made, particularly at the receiver end, to the implementation (for example raised cosine in the transmitter, but rectangular shaping in the receiver).

(22) The receiver from FIG. 1b additionally comprises an acquisition unit 52 that is designed to estimate or determine the aforementioned frequency error f.sub.E (also the phase error φ.sub.E in the case of coherent demodulation). Furthermore, the acquisition unit 52 is designed to determine the phase of the spread sequence (in the case of DSSS mode) or of the modulation symbols, i.e. of the transmitted impulse responses g.sub.TX(t) (in the case of narrowband mode).

(23) The acquisition unit 52 determines the frequency error f.sub.E (and if need be the phase error φ.sub.E) and also the phase of the spread sequence. The tracking unit 51 is designed to readjust the estimated frequency and phase errors f.sub.E, φ.sub.E for a change over time in the carrier frequencies f.sub.RX, f.sub.TX and also in the corresponding phases φ.sub.RX, φ.sub.TX, and also for a change over time in the phase of the modulation symbols. Such a control loop is also called a “carrier tracking loop”. Furthermore, the tracking unit 51 is also designed to readjust the estimated phase of the received modulation symbols. Such a control loop is also called a “symbol tracking loop” or “clock tracking loop”. The control loops (and hence the tracking unit) do not necessarily have to be present, e.g. if the values estimated by the acquisition unit for the transmission of a frame are sufficiently accurate.

(24) The task of the acquisition unit is thus (coarse) determination of the carrier frequency and the phases of the carriers and the spread sequence, but not control. The tracking is the first place where a closed control loop is usually used, to be precise there are two control loops, namely the aforementioned “carrier tracking loop” and “symbol tracking loop”. This readjustment of the estimated phase and frequency errors and of the phase of the modulation symbols is known per se and is therefore not explained in more detail. The actual implementation is also of no great significance to the present invention.

(25) The blocks shown in the figures (mixers, filters, acquisition unit, tracking unit, etc.) are intended to be understood not as a physical unit but rather purely as functional units. They can be implemented—depending on application—in very different ways. The mixers 5, 10, 30 and 31 represent a mathematical operation (possibly a complex multiplication). The acquisition and tracking units thus produce signals in the form exp(j(2π.Math.Δf.Math.t+Δφ)) for the respective mixer 31, which therefore performs a frequency conversion by Δf and also a phase rotation by Δφ. This complex multiplication is also an example of a wide variety of implementation options (for example with one or with two multipliers/mixers in any order).

(26) The task of the acquisition unit 52 is also to find the correct (sampling) instants (bit and symbol limits) at which a decision (decision maker 50) relating to the value of a sent data symbol needs to be made. During the tracking, these instants are tracked by the tracking unit 51. The aforementioned frequency error f.sub.E (or even the carrier phase φ.sub.RX in the case of coherent demodulation) of the useful signal is estimated by the acquisition unit 52 with such accuracy that the control loops in the tracking unit (PLL or FLL) can be started. Usually, as FIG. 1b shows, the frequency error is corrected by the matched filter 40 before the filtering.

(27) FIG. 2 shows a model of DSSS data transmission as a block diagram. FIG. 2a shows the transmitter, FIG. 2b

(28) shows the reception part. In the case of DSSS transmission, each data symbol (bit) d.sub.i is multiplied by the symbols c.sub.j of the spread sequence. The spread sequence has a length L.sub.C, and the index j is computed as follows: j=k mod L.sub.C, where k is a progressive index (k=0, 1, . . . ). For each bit, in accordance with the spread factor L.sub.C, a number of L.sub.C “chips” are transmitted. The index i thus increases by an integer with every pass of the spread sequence of length L.sub.C: i=└k/L.sub.C┘. The (modulation) symbol form of the chips is determined by the transmission impulse filter 10′ (by the impulse response g′.sub.TX(t) thereof). In comparison with the transmitter from FIG. 1a, the chip succession is sampled at a rate that is higher by the factor L.sub.C (period T.sub.CHIP=T.sub.BIT/L.sub.C).

(29) Sending of the data at a chip rate T.sub.CHIP that is higher by a multiple of the bit rate T.sub.BIT also prompts—in accordance with the properties of the spread sequence—spreading of the spectrum of the transmission signal s(t) or s.sub.RF(t).

(30) According to the receiver model shown as a block diagram in FIG. 2b, the receiver end first of all (as for the BPSK transmission shown in FIG. 1) mixes the received radio frequency signal r.sub.RF(t) with a nominal oscillator frequency f.sub.RF (mixer 30) and subjects the resultant (complex-value) mixer output signal r(r) to further mixing (mixer 31) in order to compensate for any frequency errors f.sub.E in the oscillator frequency f.sub.RX (in a similar manner to the example from FIG. 1b). As in the example from FIG. 1b, the demodulated received signal is denoted by r′(t) and contains the received succession of impulse responses g.sub.TX(t−k.Math.T.sub.CHIP) from the transmitter-end filter 40′. The demodulated received signal r′(t) is (likewise in a similar manner to the example from FIG. 1b) supplied to a matched filter 40′ having the filter impulse response g′.sub.RX(t), which matches the impulse response g.sub.TX(t). The chip limits (i.e. the phase of the modulation symbols) are detected in a similar manner to the detection of the bit limits in the previous example (FIG. 1b) using the acquisition unit 52 and the tracking unit 51.

(31) The output signal from the matched filter 40′ is sampled in accordance with the chip rate T.sub.CHIP, and the resultant chip sequence is correlated

(32) with the known spread sequence c.sub.j (correlator 53). The correlation result is supplied to the decision maker unit 50, which associates with the correlation result a bit succession d.sub.i that corresponds to the sent bit succession.

(33) In order to simplify the complex detection of the chip limits, the matched filtering of the received chip symbols can be combined with subsequent correlation to form matched filtering (with a modified impulse response h.sub.MF(t) that is dependent on the spread sequence c.sub.j). The resultant structure of the receiver is shown in FIG. 1c. On comparing FIGS. 1a and 2a and also FIGS. 1b and 2c, it can be seen that the BPSK transmission from FIG. 1 differs from the DSSS transmission from FIG. 2 at the transmitter end only by virtue of the multiplication (multiplier 5) of the bit succession d.sub.i that is to be transmitted by the spread frequency c.sub.j and at the receiver end only by virtue of the selection of the impulse response of the matched filter 40 or 40′.

(34) As explained at the outset, it may be desirable to configure the same transmission system both for wideband (through frequency spreading) transmission and for narrowband transmission. For reasons of implementation efficiency (for example required chip area), however, there is no intention to change over from a DSSS receiver to a BPSK receiver. Rather, the intention is to use the DSSS receiver for receiving narrowband phase-modulated signals.

(35) The DSSS transmission system shown as a block diagram in FIG. 3 allows reconfiguration for the transmission of narrowband BPSK-modulated signals. Particularly the complex algorithms that the DSSS receiver contains are reused for narrowband reception. These afford very good performance, particularly in respect of their efficiency concerning clock and data recovery. In comparison with ordinary FSK narrowband receiver implementations, it is possible to achieve a sensitivity that is improved by up to 7 dB.

(36) The transmission system shown in FIG. 3 essentially corresponds to the combination of the examples from FIG. 2a (transmitter) and FIG. 2c (receiver). At the transmitter end, however, the spread sequence c.sub.j, c.sub.j′ is in adjustable form. At the receiver end, the impulse response of the matched filter 40 can be set (on the basis of the spread sequence set in the transmitter). Optionally, it is also possible to set the symbol rate T.sub.SYMBOL, which possibly also requires conditioning of the clock CLK for the transmission impulse filter 10. Otherwise, the statements in relation to the examples cited above apply accordingly. Optionally, it is possible to choose between different bandwidths for the channel filters (not shown).

(37) The transmission system shown in FIG. 3 is thus usable in a simple manner both for wideband transmission (by means of DSSS method) and for narrowband transmission (e.g. using the BPSK method). This merely requires alteration of the spread sequence c.sub.j at the transmitter end and conditioning of the impulse response x(t) of the matched filter 40 at the receiver end.

(38) The properties of the spread sequence c.sub.j are considered in more detail below. The properties of the autocorrelation function (AKF) of the spread sequence c.sub.j used have considerable influence on the spectral properties of the transmitted signal s.sub.RF(t) and the achievable performance parameters of the receiver.

(39) Spread sequences that are optimally suited to DSSS transmission have an AKF having a steep and relatively high correlation peak, ideally approximately a Dirac impulse. Pseudorandom binary sequences (PRBS), for example what are known as maximum length sequences, have such autocorrelation properties and are therefore usually used as spread sequences c.sub.j for a spread spectrum transmission.

(40) Firstly, a steep correlation peak at the transmitter end results in an optimum spectrum spread (power spectral density as constant as possible for the spread transmission

(41) signal s(t)), and secondly this allows optimum sensitivity and immunity toward inband interference sources to be achieved in the receiver.

(42) In CDMA systems, what are known as gold sequences, for example, that is to say maximum length sequences linked to one another, are used for spectrum spreading that, although having less than optimum but usable AKF properties, additionally afford “good” suppression (that is to say good cross-correlation properties) in respect of other subscribers (with a different gold sequence). In general, the choice of the spread sequence is based on a wide variety of application and optimization aims, such as orthogonality, correlation properties, implementation complexity and also peak-to-average power ratio PAPR (PA design). The pseudorandom sequences (PRBS, pseudorandom binary sequences) and gold sequences cited here can be used for frequency spreading. Furthermore, a multiplicity of other spread codes are conceivable, however. Some spread codes require more complex signal processing rather than the simple multiplication of the input bit succession d.sub.i by a spread sequence that is shown in FIG. 2a. In general, all chip sequences that are suitable for a DSSS transmission method (i.e. for spectral spreading of the transmission signal) are called “spread sequences”.

(43) The left-hand graph in FIG. 4 shows a pseudorandom spread sequence (PRBS) c.sub.j. The spread sequence c.sub.j comprises 15 elements (chips), in the present case (1, 1, 1, 1, −1, 1, −1, 1, 1, −1, −1, 1, −1, −1, −1). The second graph from the left shows the bit succession d.sub.i=(1, −1, 1, −1) and also the resultant (spectrally spread) chip succession. This succession corresponds to the input signal succession s.sub.k of the transmission impulse filter 10′ in FIG. 3.

(44) The third graph shows the correlation between the received signal r(t) (cf. FIG. 3b) and the spread sequence c.sub.j. From the absolute value of the correlation function CCF, it is possible to see the bit limits situated precisely at the points of the maxima in the correlation function. The fourth graph (far right) shows the spectrum of the spread transmission signal s(t). In the present example, a square-wave transmission impulse g.sub.TX(t) has been used. A different transmission impulse form (e.g. with a roll-off factor of 1) would heavily suppress signal components outside the frequency range denoted by the vertical lines.

(45) FIG. 5 shows the same four graphs for a narrowband chip sequence c.sub.j′. On account of its narrowband nature, such a chip sequence is no longer suitable for a DSSS transmission and is therefore also not called a “spread sequence”. In the present example, this is c.sub.j′=(1, 1, 1, 1, 1, 1, 1, −1, −1, −1, −1, −1, −1, −1, −1). The succession c.sub.j thus contains precisely one hop from 1 to −1 between the 7 and 8 chips. The hop from 1 to −1 is therefore (almost) in the middle of the succession. The multiplication of the bit succession d.sub.i that is to be transmitted (in the present example 1, −1, 1, −1, scaled 0.5 in the illustration) by the chip sequence c.sub.j′ achieves, de facto, Manchester coding of the bit succession d.sub.i (cf. FIG. 3), a “1” bit being coded with a falling edge and a “−1” bit being coded with a rising edge. The associated correlation function is triangular and the spectrum of the sent signal has a significantly narrower bandwidth than in the preceding example of FIG. 4.

(46) A wideband spread sequence differs from a narrowband chip sequence at least in that, in the wideband spread sequence, at least two arithmetic sign changes are directly successive. By contrast, a narrowband chip sequence (suitable for a narrowband transmission) does not have two successive arithmetic sign changes. That is to say that a narrowband chip sequence contains neither the succession {1, −1, 1} nor the succession {−1, 1, −1}. The narrowband chip sequence also does not contain an arithmetic sign change after the first and before the last chip. That is to say that the sequences {1, 1, 1, 1, 1, 1, −1} and {−1, −1, −1, −1, −1, −1, 1} are also not narrowband on the basis of this criterion, even though only one arithmetic sign change occurs. For the assessment of this distinguishing

(47) criterion, the sequence c.sub.j can be continued cyclically (as already mentioned, j is equal to k mod L.sub.C).

(48) In the case of “genuine” spread sequences, transmitter-end reduction of the chip rate is therefore not possible (cf. explanation for FIGS. 6 and 7). Narrowband chip sequences allow reduction of the symbol rate (cf. explanation for FIGS. 6 and 7) anyway, since two or more successive like chips (i.e. two or more successive “1” chips or “−1” chips) can be combined at the transmitter end to form one symbol. In the previous example of symmetric Manchester coding with the chip sequence {1, 1, 1, 1, 1, 1, 1, −1, −1, −1, −1, −1, −1, −1, −1}, one symbol (i.e. an impulse response g.sub.TX(t−k.Math.T.sub.SYMB)) can be sent for the seven “1” chips and one symbol (i.e. an impulse response −g.sub.TX(t−k.Math.T.sub.SYMB)) can be sent for the eight “−1” chips, which leads to a reduction in the symbol rate from 600 kbaud to 80 kbaud.

(49) When the (pseudorandom) spread sequence c.sub.j is used, the signal energy is distributed over large portions within the frequency range denoted by the vertical lines, while the energy in the case of Manchester-coded bits is distributed essentially around the coordinate origin (f.Math.T.sub.BIT=0). Given appropriate conditioning of the impulse response x(t) of the matched filter 40″, the DSSS receiver can also be used for receiving narrowband signals, provided that correspondingly narrowband chip sequences are used at the transmitter end, for example a hopping sequence as shown in the left-hand graph in FIG. 5. The specific implementation of the DSSS transmitter (FIG. 3a) and particularly that of the DSSS receiver (FIG. 3b) is of no great significance in this case. As will be explained later, however, the use of narrowband chip sequences (when they no longer spread the spectrum) allows a significant reduction in the baud rate (modulation symbol rate) at the transmitter end (in comparison with the “normal” DSSS mode).

(50) The receiver shown in FIG. 3b shows e.g. a single-stage frequency conversion from the RF band to baseband. However, two—or multistage mixing is also possible. Different components of the transmitter or of the receiver can optionally be implemented by software that is executed by suitable signal processors. The radio frequency front end of the transmitter and of the receiver will normally be implemented using analog technology.

(51) In narrowband mode, in the case of a DSSS transmitter as shown in FIG. 3a, the transmitter can be operated at a significantly reduced symbol rate (baud rate), for example when a stepped chip sequence c.sub.j′ is used. This allows a further reduction in the bandwidth of the spectrum of the transmission signal s(t) or s.sub.RF(t). FIG. 6 shows, inter alia, the DSSS transmission of two bits and of a 15-fold spread (spread sequence having 15 chips) using timing diagrams. In the present example, a DSSS transmission system as shown in FIG. 3 is assumed, which operates with a symbol rate of 600 kbaud (600 000 chips per second) and a spread factor L.sub.C of 15.

(52) The diagram in FIG. 6a shows the two bits d.sub.i={1, −1}, where a “logic 0” is represented by −1 and a “logic 1” is represented by +1. Diagram (b) shows the resultant transmission signal s(t) when a pseudorandom spread sequence is used, in the present case {1, 1, 1, 1, −1, 1, −1, 1, 1, −1, −1, 1, −1, −1, −1}. In accordance with the polarity of the bit that is to be transmitted, the aforementioned spread sequence is transmitted in inverted or uninverted form, a corresponding signal with the appropriate polarity being produced for each chip. In this case, the symbols correspond to the impulse response g′.sub.TX(t−k.Math.T.sub.CHIP) of the transmitter-end filter (see FIG. 3a, filter 10), and the sum of all the pulses yields the transmission signal s(t) shown in the diagram in FIG. 6b. The spectrum of the resultant transmission signal s(t) has a relatively wide bandwidth in accordance with the spectral properties of the pseudorandom spread sequence.

(53) The diagram in FIG. 6c shows the same situation as in FIG. 6b with the difference that the chip sequence

(54) c.sub.j used is not a (pseudorandom and therefore wideband) spread sequence, but rather has the profile of a hopping function. That is to say that the pseudorandom spread sequence c.sub.j={1, 1, 1, 1, −1, 1, −1, 1, 1, −1, −1, 1, −1, −1, −1} is replaced by the narrowband chip sequence c.sub.j′={−1, −1, −1, −1, −1, −1, −1, 1, 1, 1, 1, 1, 1, 1, 1}. In the present example, the narrowband chip sequence accordingly consists of seven successive “−1” chips and eight successive “1” chips, with a corresponding signal (corresponding to the impulse response of the filter 10) being produced for each chip. The specific choice of chip sequence c.sub.j′ (seven “−1”s and eight “1”s) prompts almost symmetric Manchester coding of the bits that are to be transmitted. This slight asymmetry can be tolerated at the receiver end. According to the diagram from FIG. 6c, however, 15 symbols are transmitted as in the case of the DSSS transmission. A further reduction in the bandwidth is achieved if the symbol rate is reduced accordingly. In the present case of symmetric Manchester coding, the symbol rate can be reduced from the aforementioned 600 kbaud to 80 kbaud (80 000 chips per second) if only two symbols are now transmitted per bit. This merely requires the transmitter end to increase the sampling period T.sub.SYMB (see FIG. 3a) as appropriate and to reduce the clock rate for the (digital) filter 10 as appropriate. An impulse g.sub.TX(t) produces a correspondingly spread impulse g″.sub.TX(t)=g.sub.TX(t/R), where R corresponds to the factor by which the baud rate is reduced, in the present case R=600/80=7.5. Groups of “1” chips are combined to form a first symbol, and groups of “−1” chips are combined to form a second symbol. For each symbol, a corresponding impulse g″.sub.TX(t) is then sent. As already mentioned above, the groups of chips that are each combined to form a symbol do not necessarily have to be of the same size (i.e. have the same number of chips). It suffices if the groups have approximately the same number of chips (seven “−1”s and eight “1”s). The magnitude that the imbalance may have is dependent on the respective implementation. The chip sequence is thus decimated as appropriate without the signal profile thereof being significantly changed. At the receiver end, it is possible to use the same
algorithms as in the DSSS mode (i.e. with pseudorandom spread sequence). That is to say that the receiver continues to operate at the full symbol rate that is necessary for wideband DSSS transmission (in the present example 600 kbaud). As already mentioned, the receiver end merely requires conditioning of the impulse response of the matched filter 40″ (see FIG. 3b).

(55) FIG. 7 shows the same diagrams as FIG. 6, but for the case of asymmetric Manchester coding of the bits that are to be transmitted. In the present example, the narrowband chip sequence is c.sub.j={−1, −1, −1, −1, −1, −1, −1, −1, −1, −1, −1, −1, 1, 1, 1}. The resultant transmission signal without symbol rate reduction is shown in FIG. 7c. In a similar manner to the preceding example, the symbol rate can be reduced at the transmitter end. Instead of 15 chips, five symbols are now sent per bit (see FIG. 7d), meaning a symbol rate reduced to 200 kbaud. In the case of a stepped spread sequence, the baud rate can be reduced at least by the greatest common divisor (in the present example 3) from the number of “−1” chips (in the present example 12) and the number of “1” chips (in the present example 3).

(56) The use of a narrowband chip sequence (instead of a wideband spread sequence) that is shown in the preceding examples and a correspondingly reduced symbol rate can also be used when concatenated spread schemes are used. An example of a suitable transmitter is shown in FIG. 8. In DSSS mode, e.g. two pseudorandom sequences c.sub.n (inner sequence) and c.sub.m (outer sequence) are used.

(57) For narrowband mode, the inner sequence is filled with “1” or “−1” in particular constantly (that is to say fifteen “1”s or fifteen “−1”s), while the outer sequence, as in the preceding example, is chosen with a chip sequence for symmetric or asymmetric Manchester coding, for example.

(58) A reduction in the symbol rate (in comparison with the wideband DSSS mode) is then possible, beyond the inner spread, to

(59) a value that is required for synchronization to the narrowband outer sequence.

(60) By way of example, in the case of a 15×15—fold concatenated spread, the symbol rate of, by way of example, 600 kchip/s can be reduced by the factor 75 (15×5) at the transmitter end (8 kchip/s), provided that at the receiver end the inner chip sequence is chosen to be constant as “+1” or “−1” and the outer chip sequence is chosen as {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, −1, −1, −1, −1, −1} (ten “1”s followed by five “−1”s), for example. According to the present example, the DSSS receiver first of all uses the acquisition unit (see e.g. FIG. 3b) to synchronize itself to the inner spread sequence c.sub.n and then to the outer spread sequence c.sub.m. To this end, before the actual data (the payload), a range with single spreading (using the inner chip sequence) and a range with dual spreading (that is to say in concatenated form), for example, are sent at the same chip rate, for example, the respective data of which consist of training sequences that are known to the receiver.

(61) Since the inner sequence is filled with “1” or “−1” constantly, the acquisition relating to the inner chip sequence c.sub.n may possibly not produce any information about the bit limits. However, it is at least possible to determine the frequency error f.sub.E of the received signal (for the purposes of the accuracy of the acquisition for the inner spread).

LIST OF REFERENCE SYMBOLS

(62) 5 Multiplier (spread) 10, 10′ Filter (transmitter end) 20 Mixer (transmitter-end frequency conversion) 30 Mixer (receiver-end frequency conversion) 31 Mixer (receiver-end frequency correction) 40, 40′ Matched filter (receiver end) 40″ Filter (receiver end) 50 Decision maker unit 51 Tracking unit 52 Acquisition unit d.sub.i Bit succession (i=└k/L.sub.C┘) k Time index (k=1, 2, L.sub.C Sequence length j Sequence index (j=k mod L.sub.C) s.sub.k Chip succession s(t) Transmission signal (baseband) s.sub.RF(t) Transmission signal (RF band) r.sub.RF(t) Received signal (RF band) r(t) Received signal (baseband) g.sub.TX(t) Impulse response g.sub.RX(t) Impulse response h.sub.MF(t) Impulse response x(t) Impulse response δ(t) Dirac function f.sub.TX Transmitter-end carrier frequency f.sub.RX Receiver-end carrier frequency φ.sub.TX Transmitter-end carrier phase θ.sub.RX Receiver-end carrier phase