COMPONENT ARRANGEMENT, PACKAGE AND PACKAGE ARRANGEMENT, AS WELL AS PRODUCTION METHOD

Abstract

Provided is a component arrangement, including a carrier substrates; a spacer which is arranged on the carrier substrate so as to surround an installation space and has an outlet opening on a side facing away from the carrier substrate; an optical component arranged in the installation space; a contact connection which electrically conductively connects the optical component to external contacts arranged outside the installation space; a cover substrate which is arranged on the spacer and with which the outlet opening is covered in a light-permeable manner; and a light-reflecting surface which is formed on an anisotropically etched silicon component and is arranged in the installation space as an inclined surface at an angle of approx. 45° relative to the surface of the carrier substrate facing the installation space, in such a way that light radiated in a horizontal direction onto the light-reflecting surface can be radiated out in the vertical direction through the opening and the cover substrate, and vice versa.

Claims

1. A component arrangement, comprising: a carrier substrate; a spacer which is arranged on the carrier substrate so as to surround an installation space and has an outlet opening on a side facing away from the carrier substrate; an optical component arranged in the installation space; a contact connection which electrically conductively connects the optical component to external contacts arranged outside the installation space; a cover substrate which is arranged on the spacer and with which the outlet opening is covered in a light-permeable manner; and a light-reflecting surface which is formed on an anisotropically etched silicon component and is arranged in the installation space as an inclined surface at an angle of approximately 45° relative to a surface of the carrier substrate facing the installation space, in such a way that light radiated in a horizontal direction onto the light-reflecting surface can be radiated out in a vertical direction through the opening and the cover substrate, and vice versa.

2. The component arrangement according to claim 1, the anisotropically etched silicon component is arranged in the installation space surrounded by the spacer.

3. The component arrangement according to claim 1, the spacer is at least partially formed with the anisotropically etched silicon component.

4. The component arrangement according to claim 3, a first wall surface of the spacer, which faces the installation space and is arranged outside a region with the light-reflecting surface, is inclined relative to the vertical direction at a first angle different from 45°.

5. The component arrangement according to claim 4, a second wall surface of the spacer, which is different from the first wall surface, faces the installation space and is arranged outside the region with the light-reflecting surface, is inclined relative to the vertical direction at a second angle different from 45°, which is different from the first angle.

6. The component arrangement according to claim 1, wherein the cover substrate at least partially fills the installation space.

7. The component arrangement according to claim 1, wherein the light-reflecting surface has a surface-side mirror coating.

8. The component arrangement according to claim 1, wherein the optical component has a lateral optical outlet/inlet, through which light can exit/enter in the horizontal direction.

9. The component arrangement according to claim 1, wherein the optical component is arranged on a submount which is arranged on the carrier substrate.

10. A method, comprising: producing an anisotropically etched silicon component from a silicon single crystal by anisotropic etching, wherein the silicon single crystal is inclined by approximately 9.7° to the 100 crystal orientation, such that a 111 crystal plane with a slope of approximately 45° is formed; and producing the component arrangement according to claim 1 using the anisotropically etched silicon component, wherein a light-reflecting surface is formed in the component arrangement with the 111 crystal plane with the slope of approximately 45°.

11. A package, with a component arrangement according to claim 1 and a housing, in which the component arrangement is accommodated.

12. The package according to claim 11, wherein with respect to the housing, as viewed from a top side of the housing, a substantially central light exit/entry in the region of the outlet opening is formed.

13. A package arrangement having a flat arrangement of a plurality of packages according to claim 11.

14. The package according to claim 11, wherein the package is produced by wafer-level packaging.

15. The package arrangement according to claim 13, wherein the package arrangement is produced by wafer-level packaging.

Description

BRIEF DESCRIPTION

[0045] Some of the embodiments will be described in detail, with references to the following Figures, wherein like designations denote like members, wherein:

[0046] FIG. 1 shows a component arrangement in which an optical component is arranged in an installation space and is connected to external contacts via a contact connection through a carrier substrate;

[0047] FIG. 2 shows a component arrangement in which an optical component is arranged in an installation space and is connected to external contacts via a contact connection leading out laterally;

[0048] FIG. 3 shows a schematic representation of a component arrangement in which the installation space with the optical component is filled with a cover substrate;

[0049] FIG. 4 shows a schematic representation of a component arrangement in which a cladding is formed with the cover substrate, with which the installation space with the optical component is filled;

[0050] FIG. 5 shows a schematic representation of a component arrangement in which a light-reflecting surface is provided in the installation space by an anisotropically etched silicon component which is arranged in the installation space at a distance from a spacer;

[0051] FIG. 6 shows a schematic representation of a spacer formed as a frame, which spacer is formed by an anisotropically etched silicon component;

[0052] FIG. 7a shows a plan view from a light microscope of an etched frame structure in which a masking opening is selected for an anisotropic wet chemical etching process with a compensation structure;

[0053] FIG. 7b shows a plan view from a light microscope of a further etched frame structure in which a masking opening is selected for an anisotropic wet chemical etching process with a compensation structure;

[0054] FIG. 8 shows a schematic representation of a section of a wafer having a plurality of openings, each of which can be used to form a component arrangement in order to produce a cap array;

[0055] FIG. 9 shows a schematic representation of spacers, each formed with an anisotropically etched silicon component, wherein a central positioning of mirror surfaces in a frame geometry allows a central exit/entry of light;

[0056] FIG. 10 shows a schematic representation of an arrangement comprising a spacer formed by an anisotropically etched silicon component, on which a cover substrate is arranged, the spacer having a rear-side, structured bonding surface, for example, a metallization, on an underside;

[0057] FIG. 11 shows a schematic representation of an arrangement in which a portion of a glass fiber is arranged opposite the light-reflecting surface for coupling/uncoupling light;

[0058] FIG. 12 shows a schematic representation of an arrangement in which two individual mirror elements are arranged in a housing;

[0059] FIG. 13 shows a schematic representation of two components that have been manufactured in a panel or by wafer-level packaging;

[0060] FIG. 14 shows a schematic representation of an arrangement in which the installation space is formed by a spacer element which has a flank angle of the mirror surfaces of approximately 54.7 degrees;

[0061] FIG. 15 shows a schematic representation of a component in which the spacer element and the carrier substrate are made in one piece and the through contacts are provided by a dry etching process;

[0062] FIG. 16 shows a schematic representation of a component in which the spacer element and the carrier substrate are made in one piece and the through contacts are provided by a wet chemical etching process;

[0063] FIG. 17 shows a schematic representation of a component in which the walls of the installation space are approximately vertical with the exception of a 45-degree mirror plane;

[0064] FIG. 18 shows a schematic representation of a component arrangement, in which a lens is arranged on the cover substrate;

[0065] FIG. 19 shows a schematic representation of a component arrangement with a circumferential spacer element with mirror plane in combination with a single mirror element;

[0066] FIG. 20 shows a schematic representation of a component arrangement in which a lower opening in the spacer, which is designed as an anisotropically etched silicon component, is designed with an almost vertical chamfer; and

[0067] FIG. 21 shows a schematic representation of a component arrangement in which a lower opening in the spacer, which is designed as an anisotropically etched silicon component, is designed with an undercut relative to the surface of the spacer.

DETAILED DESCRIPTION

[0068] FIG. 1 shows a component arrangement in which an optical component 2 is arranged on a carrier substrate 1 in an installation space 1a. The optical component 2 is, for example, a light-emitting or light-receiving diode, for example, a laser diode or a photodiode. A spacer 3 is provided, which consists of silicon. A cover substrate 4 is arranged on the spacer 3.

[0069] The optical component 2 is mounted on a submount 5 in the exemplary embodiment, for example a submount made of silicon carbide or aluminum nitride. Alternatively, the optical component 2 can be arranged directly on the carrier substrate 1. The optical component 2 is mounted on the submount 5 or directly on the carrier substrate 1 by eutectic soldering, for example of gold and tin. However, other processes such as gold or indium bonding or sintered bonding can also be used. The chip can be mounted either by a flip-chip process, by contacting with wire bonds or a ground contact in combination with wire bonds.

[0070] The silicon spacer 3 is produced by anisotropic KOH etching from a silicon single crystal inclined by approximately 9.7 degrees to the 100 crystal orientation (off-oriented). As a result, a 111 crystal plane is formed, which has a slope 6 at an angle of approximately 45 degrees to the surface. The opposite plane then forms at an angle of approximately 64.5 degrees. The crystal planes at the side can have an angle of approximately 55.3 degrees, for example.

[0071] The spacer 3, which is designed as an anisotropically etched silicon component, has a metallic mirror coating 6a in the embodiment shown. Alternatively, another optical (light-reflecting) layer can be provided, for example a dielectric mirror for certain wavelengths. For the optional metallic mirror coating 6a, aluminum is used in the UV range, silver in the visible range, and gold in the IR/NIR range. A metallic copper mirror coating is advantageous from the “red” wavelength range (wavelengths greater than about 600 nm). Alternatively, the sloping side walls in a cavity can also be provided with different coatings. For example, the side walls that differ from 45 degrees can be provided with a particularly opaque/light-absorbing layer for the desired wavelength range in order to avoid reflections in the installation space.

[0072] The naturally grown monocrystalline 111 planes (light-reflecting surfaces/mirror surfaces) inclined at 45 degrees and produced by the wet chemical etching process described above are very smooth compared to other production methods, such as machining or dry etching methods. This results in a deflection of the beam with very low scattering and low loss.

[0073] The optical component 2 mounted on the carrier substrate 1 can be a side-emitting component, for example a laser diode. The slope 6 of 45 degrees enables light exiting laterally horizontally from optical component 2 to be emitted vertically by appropriate deflection.

[0074] The cover substrate 4 can, for example, consist of borosilicate glass such as Borofloat33 or Mempax from Schott AG, quartz glass, sapphire glass or also other glasses such as AF32, D263T, BK7 or B270 from Schott AG; Eagle XG or Pyrex from Corning; SD2 from Hoya; or EN-A1 from Asahi. The cover substrate 4 can also consist of silicon or germanium, for example for applications in the IR range. The cover substrate 4 can additionally have a substrate coating, for example an anti-reflection or a filter coating. The coatings can be designed for different wavelength ranges, one-sided or double-sided and, if necessary, structured. Opaque structured coatings can also be used for the wavelength ranges in order to form apertures, for example.

[0075] In addition, the integration of optical elements can be provided in one embodiment, for example, lenses on the cover substrate 4. For example, convex lenses made of polymer, glasses or other glass-like materials, silicon or germanium (see FIG. 18) can be considered here. The use of microstructured Fresnel lenses is also possible.

[0076] In the carrier substrate 1, through contacts 7, connected to one or more bonding connections 2a, are provided for the electrical contact of the optical component 2. In addition to the bonding connection 2a in this embodiment, a ground contact 2b is provided, which is also connected to a through contact 7. The contacts 8 on the rear side enable later mounting in SMD construction, for example by tin-silver wave soldering.

[0077] The carrier substrate 1 can, for example, consist of silicon, ceramics such as aluminum nitride, silicon carbide, aluminum oxide, LTTC ceramics (Low Temperature Cofired Ceramics) or HTCC ceramics (High Temperature Cofired Ceramics), glass or DBC (Direct Bonded Copper) substrates. Furthermore, the use of metal substrates, for example IMS (Insulated Metal Substrates) made of copper, aluminum or other metals, can be provided. The use of carrier substrates made of plastics such as FR4 is also conceivable.

[0078] A connection 9 between the spacer 3 and carrier substrate 1 can be made, for example, by a solder bond, for example by a eutectic bond. For this purpose, a metal combination with an appropriate eutectic composition, such as gold and tin, copper and tin, gold and germanium, tin and silver, gold and indium, copper and silver, tin with silver and copper or gold and silicon, is applied to the carrier substrate 1 or the rear side of the spacer 3. This forms a eutectic joining phase between the spacer 3 and carrier substrate 1 in the later soldering process. In order to achieve a layer adhesion of the metal combinations on the carrier substrate 1 or the spacer 3 as good as possible, a layer of pure titanium, tungsten titanium or also tungsten titanium nitride can be arranged underneath the applied metal stack. The latter has the advantage of providing a diffusion barrier with respect to gold. The bonding partner must be provided with a counter metallization for the joining process in order to ensure good wetting of the joining phase that forms during the soldering process.

[0079] In principle, solders containing lead can also be used for joining the carrier substrate 1 and the spacer 3. A sintering process such as silver or gold sintering can be provided as a further method for joining.

[0080] In addition, it can be provided, for example with thin metal layers, to place what is known as an alloy stop beneath the actual joining phase. In the case of eutectic bonding with gold and tin, for example, layers of platinum, nickel or alloys of chromium and nickel are suitable for this purpose.

[0081] By using very high surface qualities of Ra<1 nm, a direct bonding method can also be used. This can be a direct fusion bond, which is hydrophobic or hydrophilic in relation to the surface nature of the bond partners. The two bond partners are first connected to one another by van der Waals bonds via a pre-bond. In a subsequent annealing step, covalent bonds are then formed in the bond interface. The fusion bond can also be plasma-activated. This makes it possible to significantly reduce the temperature load during the annealing. An anodic boding can also be provided as a further direct bonding method. The advantage of the latter method is that the surface quality requirements of the bond partners are less demanding compared to fusion bonding.

[0082] As an alternative to the described methods, a reactive bonding process can also be used. In reactive bonding, a metal stack of alternating metallic layers is applied. An electrical or laser-induced pulse leads to a short-term, high-thermal reaction that “welds” the two bond partners together. The metal layers are bilayer periods, for example made of palladium and aluminum or made of copper oxide and aluminum. In addition, solid-liquid interdiffusion bonding, for example with metal combinations of gold and indium, gold and tin or copper and tin is also possible. In this method, the bonding process is determined during an annealing step by the diffusion of one bonding partner into the other. The actual connection phase then resists higher temperatures later on. Alternatively, glass-frit bonding can also be provided.

[0083] For example, a direct bonding method can be used for the connection 10 of the spacer 3 and cover substrate 4. Such methods are, for example, anodic bonding or fusion bonding. In the case of an anodic bond, the direct joining of silicon to the cover substrate made of an alkaline glass can be provided. Alternatively, the anodic joining of aluminum to the cover substrate made of an alkaline glass is also possible. In this case, the mirroring on the 45-degree mirror surface is not structured, i.e., the top side of the silicon spacer is completely coated with aluminum.

[0084] Reactive bonding or adhesive bonding can also be used. In addition, solid-liquid interdiffusion bonding is also possible here. Laser welding is additionally suitable for joining the spacer and the cover substrate. Here, two substrates are brought into an “optical contact” and then welded together using a laser. The joining of spacer and cover substrate can also be realized as a thermocompression bond, for example, of the metal combinations gold with gold, copper with copper or aluminum with aluminum.

[0085] Depending on the bonding method, the housing is hermetic or quasi-hermetic.

[0086] FIG. 2 shows the arrangement of the optical component 2 with a laterally realized contacting. Here, conductor traces 11 are applied to the carrier substrate 1 and are led outwards below the spacer 3. The spacer 3 and the realized contacting are separated from one another by an electrical insulation layer 12. This layer can consist of SiOx or silicon nitride, for example. The connection between cap and board or the insulation layer is established, for example, by a eutectic metal bond.

[0087] FIG. 3 shows the component arrangement without the cover substrate 4. In this case, the installation space 1a is filled, for example, with an epoxy resin or silicone and is quasi-hermetic. This arrangement can be used, for example, with short-pulsed lasers. The connection to the carrier substrate can also be made by adhesive bonding.

[0088] FIG. 4 also shows a component arrangement without a cover substrate. In this embodiment, not only is the installation space la filled, but the entire component is overmolded.

[0089] FIG. 5 shows an arrangement of a side-emitting component in a ceramic package, for example. In this package, a single anisotropically etched silicon component 50 is provided in the installation space la for deflection of the beam and serves as a mirror element. This type of arrangement can also be provided for classic TO housings.

[0090] FIG. 6 shows a plan view of the anisotropically etched structure of a mirror frame 60. A passage 61 in the silicon resulting from the inclination of the crystal is trapezoidal, both in the region of an upper opening 61a and in the region of a lower opening 61b, and axially symmetrical in one direction. The corner angles on the longer side with the 45-degree mirror plane are approximately 83.2 degrees each. On the opposite shorter side, the angles are approximately 96.8 degrees each. Edges of the upper and lower openings 61a, 61b run parallel to each other in pairs.

[0091] FIG. 7a shows a plan view of an anisotropically etched structure of a mirror frame 70. In this case, a masking opening for the anisotropic etching process is not chosen along the trapezoidal 111 crystal planes (see FIG. 6), but is formed with a compensation structure. As a result, at the passage 71, the upper opening 71a of the etch pit (in contrast to the lower opening 71b) is not completely trapezoidal in comparison to FIG. 6, but is limited in one direction of its extent. In this way, it is possible to reduce the lateral dimension of the passage 71 and thus to arrange a larger number of etched structures on the silicon substrate. Depending on the application, different compensation structures can be provided.

[0092] FIG. 7b shows a plan view of another anisotropically etched structure of a mirror frame 70. For the same features, the same reference signs are used in FIG. 7b as in FIG. 7a. The representation is based on a design of the etched silicon component in which the size and shape of the masking opening are selected in such a way that, for the lower opening 71b (as well as for the upper opening 71a), the trapezoid formed does not extend over the entire width of the passage 71, but substantially over a width of at least ⅔ of the total width of the passage. In this case, due to the inclined crystal, it is not possible to produce completely straight sides (i.e., without any buckling regions-continuous trapezoidal shape) of the upper and also the lower opening 71a, 71b by the etching process. To form parallel edges in the region of the upper and lower openings 71a, 71b (see FIG. 6), it is possible to provide a post-processing. With suitable substrate thicknesses, the number of etched structures on the silicon wafer can be further increased for certain lateral opening sizes of the masking.

[0093] FIG. 8 shows an arrangement of a plurality of openings in the form of an array 80. As a result of this arrangement, a plurality of components can be encapsulated simultaneously in the panel, thus saving space and, for example, increasing the light yield of the component arrangement. This is particularly advantageous for systems with a high light output. The array 80 can be designed as a panel solely consisting of spacers 3 with a 45-degree mirror surface or in combination with a cover substrate as a panel of encapsulations with a 45-degree mirror surface.

[0094] FIG. 9 shows a circumferential spacer 3, which is designed as an anisotropically etched silicon component with a 45-degree mirror surface. In this embodiment, the spacer 3 is designed in such a way that a light beam can exit or enter the package centrally (“center emission”). Such spacers 3 can also be designed with a cover substrate as encapsulation (cf. FIG. 10).

[0095] FIG. 10 shows a semi-finished product consisting of a spacer 3, which is designed as an anisotropically etched silicon component with a 45-degree mirror surface and a cover substrate. For joining to a carrier substrate 1, a structured bonding surface can be provided, for example a metallization. Different embodiments of this arrangement and corresponding methods for connecting a spacer 3 and a carrier substrate 1 are described in the embodiments for FIG. 1. This applies analogously to the joining of a spacer 3 and a cover substrate.

[0096] FIG. 11 shows an arrangement in which a silicon element with a 45-degree mirror surface is used for coupling a waveguide, for example a glass fiber. In this way, light can be uncoupled from the package or coupled into another waveguide (redirection of a signal).

[0097] FIG. 12 shows an arrangement of a side-emitting component, for example a laser diode or an LED, for example in a ceramic package. In comparison to FIG. 5, in this embodiment the placement of a plurality of silicon elements with 45-degree mirror surfaces is provided. This is advantageous if the side-emitting component emits light laterally in a number of directions. Laterally emitting light beams in one direction can also be provided, for example, to calibrate the laser diode via another monitor photodiode installed in the package.

[0098] FIG. 13 shows an arrangement, in which components 130, 131 are arranged in adjacent and separately formed installation spaces 132, 133. In this embodiment, the components 130, 131 are packaged at wafer level. For this purpose, a carrier substrate made of silicon, for example, can be provided. The silicon carrier substrate 1 is prepared with through contacts 7. The through contacts 7 can be realized, for example, by dry or wet etching with subsequent metal filling of the holes by an electroplating process. In addition, contacts for a component are provided on a front side of the carrier substrate and contacts for later mounting in SMD technology are provided on the rear side. For the electrical insulation of the through contacts, it can be provided that the carrier substrate 1 made of silicon is passivated by an inorganic layer prior to the electroplating and the generation of the contacts. For this purpose, a thermal oxidation of the silicon, the deposition, for example, of a nitride layer in an LPCVD process or other CVD processes (e.g. PECVD- plasma-enhanced CVD) for the deposition of insulation layers is conceivable. Prior to the electroplating of the metal filling of the through contacts, an electrically conductive seed layer must be applied to the previously deposited passivation layer. This can be done by sputtering processes, for example.

[0099] In this embodiment, a large number of components are first mounted serially on a prepared carrier substrate 1, which can be present in the form of a wafer or a rectangular panel, and are then joined in a further step by applying a cap wafer or cap array at wafer level or as a panel. In this way, a large number of encapsulated components are formed simultaneously. The individual packages are then provided when the composite is separated.

[0100] FIG. 14 shows an arrangement, in which the spacer 3 has been produced by anisotropic wet chemical etching from silicon of a single crystal not inclined to the 100 orientation. As a result, the 111 crystal planes are all formed with an angle of about 54.7 degrees. In this embodiment, the upward light emission from the package in a number of directions is favored. As previously described in FIG. 13, the production can also be represented as a packaging by wafer-level packaging.

[0101] FIG. 15 shows an arrangement in which the spacer 3 and the carrier substrate 1 are completely made in one piece of silicon. In this method, a cavity is etched into the silicon substrate on the front side by anisotropic wet chemical structuring. This cavity is connected on the rear side to dry-etched through contacts. The silicon substrate 1 is electrically insulated as described for FIG. 13.

[0102] FIG. 16 shows an arrangement in which the spacer 3 and the carrier substrate 1 are completely made in one piece of silicon. In this method, a cavity is etched into the silicon substrate on the front side by anisotropic wet-chemical structuring. This cavity is connected on the rear side with through contacts 7, which are produced by anisotropic wet chemical etching in contrast to FIG. 15. The silicon substrate 1 is electrically insulated as described in FIG. 13.

[0103] FIG. 17 shows an arrangement in which the installation space has first been etched approximately vertically using dry etching methods. In a subsequent wet-chemical anisotropic etching step, a 45-degree surface is then formed which can be used as a mirror plane. The advantage of this design is that the area coverage on a substrate can be further increased by combining different etching methods.

[0104] FIG. 18 shows a component on which a lens arrangement 180 is additionally arranged on the cover substrate 4. This embodiment is described in greater detail in conjunction with FIG. 1.

[0105] FIG. 19 shows a schematic representation of a component arrangement in which a mirror plane of 45 degrees is provided on the circumferential spacer 3 (silicon frame). A further element 190, which is designed as an anisotropically etched silicon component, with an inclined face 191 of likewise 45 degrees, is arranged on the carrier substrate 1 before the cap is mounted on it. With the inclined face 191, a light-reflecting surface is provided which has a mirror coating 191a in the embodiment shown.

[0106] FIG. 20 shows a schematic representation of a component arrangement, in which a lower opening 200 in the spacer 3, which is designed as an anisotropically etched silicon component, is designed with a chamfer 201, which is substantially vertically oriented in the example shown. On the one hand, this has the advantage of reducing the installation space 1 a and thus the overall size of the package, and on the other hand, it allows a side-emitting component to be arranged closer to the light-reflecting mirror surface. This favors the impact of a light beam widened by possible beam divergence on the provided mirror surface. In this way, light exiting laterally from the component can be guided out of the installation space 1 a even more efficiently and the component height can be reduced further still. In this embodiment, the chamfer 201 at the lower opening 200 of the spacer 3, for example, is realized by a dry etching process. However, it can also be provided to achieve the chamfer 201 by wet chemical overetching of the spacer 3, since in the anisotropic etching process, substantially vertical crystal planes in relation to the 100 orientation are achieved at convex edges of the silicon spacer 3.

[0107] FIG. 21 shows a schematic representation of a component arrangement in which a lower opening 210 in the spacer 3, which is designed as an anisotropically etched silicon component, is designed with an undercut 211 relative to the surface of the spacer 3. This offers the same advantages as already described for FIG. 20. The undercut 211, on the one hand, can be achieved as designed in FIG. 20 by suitable dry etching processes, and, on the other hand, a wet chemical anisotropic etching of the rear side of the spacer 3 is provided, with the opening and thus the undercut 211 being predetermined by a corresponding masking.

[0108] Although the invention has been illustrated and described in greater detail with reference to the preferred exemplary embodiment, the invention is not limited to the examples disclosed, and further variations can be inferred by a person skilled in the art, without departing from the scope of protection of the invention.

[0109] For the sake of clarity, it is to be understood that the use of “a” or “an” throughout this application does not exclude a plurality, and “comprising” does not exclude other steps or elements.