BALLAST CIRCUIT

Abstract

A ballast circuit suitable for driving an LED or similar load, comprises a primary switch mode converter, means for measuring a modulation, such as a phase cut, as used for dimming light levels, on an input AC supply, a current regulator positioned in series with the load, and a feedback controller for controlling operation of the switch mode controller based upon measured modulation levels. The feedback controller is adapted to interrupt normal switching of the switch mode converter if modulation levels detected lead to the ballast working at a lower than desired efficiency (deep dimming), or if voltage levels across the current regulator are higher than desired. The feedback controller may have a further feedback means for controlling switch mode parameters during lower levels of modulation (shallow dimming). The circuit allows large dimming levels to be achieved without generating appreciable light flicker in the load.

Claims

1. A ballast for converting a rectified AC input into a drive current output, said ballast comprising: a primary switch-mode converter, arranged to provide a charge to a capacitor, the converter having an interruption means, to interrupt the converter's regular switch mode operation, and means to control its internal pulse width modulation parameters; a current regulator which, in use, is in series with a load, said regulator and load being in parallel with the capacitor; means for determining a desired degree of power modulation to be applied to the drive current output a monitoring system arranged to monitor a voltage across the current regulator, and an interrupt feedback means for providing a feedback signal to the interruption means, and arranged to interrupt the primary switch-mode converter, based upon the monitored voltage across the current regulator, wherein the interrupt feedback signal is arranged to interrupt the primary switch-mode converter when the degree of modulation to be applied to drive current output reaches a given threshold.

2. A ballast as claimed in claim 1 wherein the desired degree of power modulation to be applied to the drive current output is set by a power modulation applied to the AC signal.

3. A ballast as claimed in claim 1 wherein the interrupt feedback signal is produced by a control voltage generation system, said control voltage generation system being further arranged to produce a shallow mode feedback signal, said shallow mode feedback signal being arranged to control PWM switching parameters of the primary switch mode converter based upon the voltage monitored across the current regulator.

4. A ballast as claimed in claim 1, said ballast further incorporating a load modulator for modulating the current flowing through the load based upon the degree of modulation applied to the AC signal.

5. A ballast as claimed in claim 4 wherein the load modulator is a pulse width modulator.

6. A ballast as claimed in claim 5, wherein the threshold at which the interrupt feedback signal becomes operative is when the duty cycle of the PWM signal applied to the load modulator falls to a level of between 50% and 10%, and more preferably when it falls to approximately 30%.

7. A ballast as claimed in claim 2 wherein the control voltage generation system is arranged to provide an analogue control signal to the current regulator.

8. A ballast as claimed in claim 1 wherein the interruption means is arranged, when fed with an appropriate feedback signal, to switch off the regular switch mode operation of the primary converter.

9. A ballast as claimed in claim 1 wherein the interrupt feedback signal is tuned to attempt to maintain the voltage across the current regulator between predetermined minimum and maximum voltages, said voltages being selected as allowing the current regulator to maintain a differential impedance above a predetermined minimum value.

10. A ballast as claimed in claim 1 wherein the interrupt feedback signal takes the form of a logical feedback signal generated within software residing within a processor, where the said software also generates the PWM switching waveform for the primary switch-mode converter and where the PWM switching waveform is interrupted by the interrupt feedback signal.

11. A ballast as claimed in claim 1, wherein the current regulator has a differential impedance greater than 500Ω, and more preferably greater than 1 kΩ, and even more preferably greater than 2 kΩ.

12. A ballast as claimed in claim 1 wherein the current regulator has a knee voltage of between 4V and 4.5V, and more preferably approximately 4.2V.

13. A ballast as claimed in claim 2 wherein the shallow-mode feedback signal, is arranged to control said switching parameters of the primary converter to stabilise the time-averaged voltage across the current regulator dependent upon the modulation applied to the AC signal.

14. A ballast as claimed in claim 1 wherein the load comprises a light emitting diode (LED) light source.

15. A ballast as claimed in claim 1 wherein the primary switch mode converter is a flyback converter.

16. A ballast as claimed in claim 1 wherein the primary switch mode converter is a buck converter.

17. A ballast as claimed in claim 1 wherein the primary switch mode converter is a boost converter.

18. A ballast as claimed in claim 4 wherein the means for monitoring the degree of modulation to be applied to the drive current output comprises an auxiliary switch-mode converter, having a capacitively smoothed output where the said auxiliary switch mode converter has as its input the modulated full wave rectified AC input signal and provides a signal responsive to the degree of modulation applied to the AC input.

19. A ballast as claimed in claim 4, wherein the means for monitoring the degree of modulation to be applied to the drive current output AC signal comprises an analogue to digital converter (ADC) arranged to sample the modulated AC signal.

20. A ballast as claimed in claim 1 wherein the monitoring system for monitoring the voltage across the current regulator, and the control voltage generation system are implemented using a microcontroller.

21. A ballast as claimed in claim 2 wherein the shallow feedback signal is arranged to control the switching frequency and/or pulse width of the converter using a power factor correction facility on said converter.

22. A ballast as claimed in claim 2 wherein, in use, the modulation applied to the AC signal is produced by a phase cutting dimmer.

23. A ballast as claimed in claim 22 wherein the shallow-mode feedback signal is arranged to be operative when the phase cutting dimmer is set to produce relatively low degrees of phase cutting, and the interruptor feedback is arranged to become operative when the degree of phase cutting reaches a threshold value.

24. A ballast as claimed in claim 1 wherein the means for determining the desired degree of power modulation to be applied to the drive current output comprises means for measuring an external input signal that varies according to the degree of modulation required.

25. An illumination apparatus incorporating a ballast as claimed in claim 1.

26. An illumination apparatus incorporating a ballast as claimed in claim 1 wherein said apparatus comprises an arrangement of one or more light emitting diodes.

27. A method of controlling an electrical load comprising the steps of: a) providing a switch mode converter, and arranging said converter to charge a capacitor; b) arranging the said load to be in series with a current regulator, and arranging said series arrangement across the capacitor; c) regularly monitoring a voltage level across the current regulator or across the load; d) interrupting the operation of the switch mode converter if the level monitored in step (c) is indicative of the voltage across the regulator being above a predetermined maximum level, wherein said interruption comprises preventing said converter from charging said capacitor; and e) removing the interruption to the switch mode converter if the level monitored in step (c) is indicative of the voltage across the regulator being below a predetermined minimum level; wherein said minimum and maximum levels are chosen as allowing the current regulator to maintain a differential impedance above a predetermined minimum value.

28. A method as described in claim 27 comprising the additional step of providing a shallow-mode feedback signal to the switch-mode converter, wherein said shallow-mode feedback signal is responsive to the voltage across the current regulator, and wherein the said shallow-mode feedback signal is used to control the switching parameters of the said switch-mode converter in such a manner as to maintain a substantially constant voltage across the current regulator;

29. A ballast as hereinbefore described, with reference to FIGS. 3 to 5.

Description

[0067] Embodiments of the invention will now be described in more detail, by way of example only, and with reference to the following Figures, of which:

[0068] FIG. 1 illustrates in simplified block diagrammatic form a power conversion circuit for driving a LED lighting unit from an AC (e.g. mains) voltage;

[0069] FIG. 2 shows a graph of a voltage waveform associated with a part of the circuit of FIG. 1;

[0070] FIG. 3a illustrates in block diagrammatic form a first embodiment of the present invention;

[0071] FIG. 3b illustrates in block diagrammatic form an alternate switching arrangement for the embodiment shown in FIG. 3a;

[0072] FIGS. 4(a) and 4(b) illustrate in more detail the circuit elements of embodiments of the present invention, wherein features are implemented in hardware and software respectively; and

[0073] FIG. 5 shows a simplified circuit for a current regulator, suitable for use in some embodiments of the present invention.

[0074] FIG. 3a shows the functional block diagram of a dimmable LED lighting ballast according to an embodiment of the present invention, operating from an AC power supply having some form of modulation, such as phase cutting, wherein said phase cutting may be achieved through the use of either a leading-edge phase cutter or trailing-edge phase cutter. The action of a leading-edge phase cutter is illustrated in the input voltage waveform of FIG. 2, where each half-cycle of the AC input voltage is blanked-out, or cut, from the low phase-angle end. In the case of a trailing-edge phase-cutter, each half-cycle of the AC voltage waveform is cut from the high phase angle end. Throughout the following summary, the action of a ballast based on the functional block diagram in FIG. 3 will be explained by reference to the use of a leading-edge phase cutter. It should, however, be clear to a person normally skilled in the art, that an equivalent set of operational conditions and overall operational algorithm exists in the case of a trailing-edge dimmed ballast of the same invention.

[0075] Referring to FIG. 3a an input AC supply voltage (301) is provided to a full-wave rectifier (303) via a phase cut dimmer (302). The resulting full-wave rectified voltage is then provided to two flyback converters, (304) and (305). A primary Flyback converter (304) provides a switch-mode converted current to a load (306) comprising a parallel combination of a smoothing capacitor (307) and a current-regulated load (308) where the current-regulated load (308) in turn comprises an LED load (309) and a dimmable DC current, or drive current, regulator (310) connected in series with the said LED load. The primary converter (304) operates under normal conditions at a switch mode frequency of several tens of KHz or higher, and thus any ripple appearing across the load at these frequencies is of no consequence as regards perceptible flicker.

[0076] An auxiliary Flyback converter (305) provides a switch-mode converted charging current to a parallel combination of a second capacitor (311), a fixed resistive load (not shown), and a voltage-follower (312) for buffering purposes. As the converter feeds a fixed resistive load, the voltage appearing across this load is related to the power, and hence the degree of phase cutting, being applied to the AC signal. This voltage therefore acts as a measure of the degree of dimming as demanded by a user by adjustment of a dimming switch.

[0077] The DC voltage output by the said voltage-follower (312) is then fed to a microcontroller (313) which is arranged to measure, using an analogue to digital converter (ADC) input, the voltage across the resistive load, as buffered by the voltage follower. The microcontroller (313) is then arranged to provide an output PWM waveform (314) having a duty cycle D responsive to the measured voltage, to a switch, or a dimming control input of current regulator (310) where the frequency of the said PWM waveform is sufficiently high to avoid the generation of directly or indirectly perceivable flicker within the LED load (309). The microcontroller provides, in an embodiment of the invention, a 1:1 transfer function D(V.sub.cntl) between the duty cycle, D of the PWM waveform and the control voltage V.sub.cntl, fed to the microcontroller.

[0078] The microcontroller (313) is connected also to a point between the LED load and the current regulator, and is arranged to measure, again using an ADC input, the voltage appearing at that point. This voltage provides a measure of the DC voltage across the current regulator.

[0079] One or more outputs (317) from the microcontroller are provided, back to the primary switch mode converter, which act as one or more feedback signals via feedback isolation and level shifting means (315) to control the output of the primary converter, as described in more detail below.

[0080] The current regulator may be modulatable (i.e. dimmable) by any suitable means. FIG. 3b shows in more detail how a current regulator may be modulated in an embodiment of the invention. Such a means for dimming the current regulator may be used in the embodiment of FIG. 3a, and may also be used with other embodiments described herein, as would be clear to a person normally skilled in the art. An LED load (309) similar to that described in relation to FIG. 3a is shown in series with current regulator (310). Located between the load (309) and regulator (310) is a MOSFET switch (316). The switch has an input on its gate connection from the microcontroller (313), with the microcontroller providing its PWM output to the gate input. The MOSFET switch is used to provide a direct connection between the current regulator (310) and the LED load (309) when the PWM waveform is in its ON state, and to electrically disconnect the LED load from the current regulator when the PWM waveform is in its OFF state.

[0081] Referring to both FIGS. 3a and 3b, in operation, during each ON-state period of the PWM waveform (i.e. when the microcontroller has switched the switch (316 of FIG. 3b) on), the microcontroller also sends a voltage feedback signal to the primary converter, so controlling its switching operation in such a manner as to keep the voltage measured across the current regulator (310) constant, to within the accuracy provided by the control loop comprising (304) (313) and (315).

[0082] The feedback signal from the microcontroller to the converter (304) is provided with isolation using an optical isolator (315) to provide further isolation between the high voltage input side and the lower voltage output side of the ballast.

[0083] Due to the action of the auxiliary flyback converter (305) and the voltage follower (312) a 1:1 transfer function V.sub.cntl(φ) is also provided, between the control voltage, V.sub.cntl and the phase-cut angle, φ. Consequently, the combined action of elements (305) (310) (311) (312) and (313) provides a 1:1 transfer function D(φ) between the duty cycle, D of the PWM current dimming waveform and the phase-cut angle, φ. This scheme implemented in this embodiment therefore provides a significant degree of freedom in the definition of the dimming profile D(φ). This degree of freedom can be exploited in two ways. Firstly, the dimming function D(φ) can be linear, geometric, or a combination of the two. Secondly, as is demonstrated later, such a mapping function can be adaptive, through the action of the microcontroller (313) in such a way as to map the available current dimming range of the dimmable current regulator (310) to the phase-cut angular range of the phase-cut dimmer (302).

[0084] As is illustrated later, the dimmable current regulator (310) is preferably of a type that exhibits high differential impedance, thereby suppressing current ripple in the LED load. Such current ripple can arise as a result of either voltage ripple across the smoothing capacitor (307) or, in an LED ballast according to the features of the present invention, a controlled hiccup mode, wherein, during dimmed operation, the voltage across capacitor (307) is allowed to vary between a maximum value and a minimum value, through the pulse-wise injection of charge into capacitor (307) by the flyback converter (304) wherein the action of (304) is controlled by the microcontroller (313) in response to the measurement, during each ON-state of the PWM dimming waveform, of the voltage across the dimmable regulator (310). Such a controlled hiccup mode is employed in ballasts according to embodiments of the present invention, in order to counter the effect, experienced by most LED ballasts, of reduced power supply efficiency and accompanying increases in LED flicker, during deeply dimmed operation, as previously mentioned.

[0085] The auxiliary converter arrangement of FIG. 3a is used to generate a control voltage related to the degree of modulation imposed on the rectified AC signal by a dimmer switch. Embodiments of the invention may be provided that generate the control voltage in different ways. An embodiment of the invention therefore comprises an arrangement as shown in FIG. 3a, but wherein the auxiliary controller and voltage follower are replaced by a digitiser for digitising the modulated, rectified AC signal, following suitable scaling. The digitiser is arranged to sample the AC signal at a rate sufficient to allow subsequent processing to measure the RMS voltage of the modulated AC signal to an accuracy dependent upon the desired optical dimming quantisation levels. The RMS voltage level is then used to generate the PWM signal controlling the current regulator as before.

[0086] The normally skilled person will be aware that other ways of determining the degree of modulation (e.g. the degree of phase cutting) applied to the AC signal exist, and may be used without departing from the nature and scope of the present invention.

[0087] Further details of the feedback control of the flyback converter and of the controlled hiccup mode when dimming are provided below.

[0088] FIGS. 4(a) and 4(b) show simplified circuit schematics relevant to a family of embodiments of the present invention. The embodiments are functionally similar to that of FIG. 3(a), and operation of the various elements common to both FIGS. 3(a) and 4(a) will generally be of a similar nature, whereas FIG. 4(b) differs in having some features implemented in software rather than hardware. As will be described later, the members of the family of embodiments vary according to the nature of the transfer function (dimming profile) D(φ).

[0089] Shown in FIG. 4(a) is a ballast wherein the main components comprise a main flyback converter (403), an auxiliary flyback converter (405), current regulator (410), LED load (409) and microcontroller (413). These are arranged in a similar fashion to the corresponding components in the embodiment shown in FIG. 3(a). The Microcontroller (413) has analogue inputs V.sub.cntl(φ) and V.sub.monitor from the output of the auxiliary flyback converter, via a voltage follower buffer circuit (420), and from the voltage at the current regulator (410) respectively. The microcontroller (413) provides a switching PWM output to the current regulator, and two feedback signals to the main flyback converter (403). A shallow-mode feedback signal, FB1 is fed to an optical isolator (421), with the opto isolated output FB2 then connected to main converter (403) to control PWM parameters thereof. An interrupt feedback signal FB3 from the microcontroller is fed to optical isolator (422) with the opto isolated output FB4 connected to main converter (403) to control an interrupt function of the converter. The inputs fed by FB3 and FB4 are more specifically fed to a power factor controller (416) within the main converter (403).

[0090] In the family of illustrative embodiments represented by FIG. 4(a), the drive current regulator (410) can take the form of two regulators in parallel, each of the type disclosed in aforementioned patent application WO2013/005002, which, as well as providing a DC current regulation function, also provide high differential impedances, thereby reducing the current ripple in the LED load (409) arising as a result of voltage ripple across the smoothing capacitor (407) to a low level (typically around 0.1%, for a peak-to-peak voltage ripple of 3.5 Volts in certain embodiments thereof). The use of such a regulator with high differential impedance also leads to the suppression of current ripple arising as a result of controlled hiccup moding within the power converter (403) under the control of microcontroller (413). In both undimmed operation and during shallow-dimming, the mean voltage across the said drive current regulator is maintained at a substantially constant level, slightly above its knee voltage, through the action of the opto-coupler (421) which, in response to a control signal, FB1 from the microcontroller (413) provides a feedback signal, FB2, to the main Power Factor Correction Controller (416) in response to which, the said Power Factor Correction Controller alters its switching characteristics (combination of on-time, off-time, frequency) in order to maintain the said substantially constant voltage across the current regulator. During deep-dimming, however, depending upon the nature of the dimming profile, D(φ) there will be a dimming depth, below which, the power taken by the load, comprising the series combination of the LED cluster (409) and the current regulator (410) will be less than the power available from the power converter (403) and where countering this by altering one or more of the switching parameters of Power Factor Controller (416) would give rise to a significant reduction in the efficiency of power converter (403). At that point, and for any dimming depth greater (deeper) than this, the power converter (403) is placed into a controlled hiccup mode, under the control of the Microcontroller (413). Such a controlled hiccup mode is actuated by means of an interrupt control signal, FB3, sent by the Microcontroller (413) when the PWM duty cycle generated by the Microcontroller is below a level (typically between 10% and 50% and preferably 30%) below which the efficiency of power converter (403) is known to fall to more than 10 percentage points below its undimmed value.

[0091] The controlled hiccup mode in this embodiment is characterised in that the microcontroller (413) when required to reduce the duty cycle of the dimming PWM signal below a level at which the efficiency of the power supply (403) is known to fall by more than around 10 percentage points, allows the voltage across the current regulator to increase to a pre-determined maximum level, V.sub.chm(Max) before sending, via a second opto isolator (422) a feedback signal, FB4, at a level that provides an interrupt signal to the switch-mode controller (403). During the period when FB4 is held at this level, no charge is supplied to capacitor (407) by power supply (403). Consequently, during this period, the voltage across capacitor (407) falls and therefore, the voltage across regulator (410) also falls. When the voltage across regulator (410) as detected by the microcontroller (413) falls to a pre-determined minimum, V.sub.chm(Min) the microcontroller (413) removes the interrupt signal and the controlled hiccup mode begins again.

[0092] The maximum and minimum current regulator voltages used during controlled hiccup mode, V.sub.chm(Max) and V.sub.chm(Min) are chosen to encompass a range of voltages across which the current regulator (410) gives a high differential impedance. In an illustrative example, where the current regulator (410) has a knee voltage of 6V, and where it is known to give a high differential impedance over a 2:1 voltage range, beginning at this knee voltage, V.sub.chm(Max) and V.sub.chm(Min) would typically be chosen as 12V and 8V respectively.

[0093] An example of a flyback converter that incorporates a built-in Power Factor Correction Controller that can be interrupted in this fashion is provided by Linear Tech's LT3799—through use of the INTVcc pin.

[0094] FIG. 4(b) illustrates a further embodiment of the present invention, wherein like numerals refer to equivalent or similar features as shown in FIG. 4(a). Operation is generally similar to that of FIG. 4(a) except as described below, and hence a full description of its operation is not provided. In this embodiment, the power factor controller (416) within the main switch-mode converter (403) of FIG. 4(a) is eliminated, through the transfer of the switch-mode control software for the converter (413) from the power factor controller (416) of FIG. 4(a) to the Microcontroller (413). In such an embodiment, the signal fed from the Microcontroller (413) to the main flyback converter (403) takes the form of a PWM voltage waveform applied to the gate terminal of the switch-mode FET (423) of the flyback converter (403) via opto-isolator (421). In the case of such an embodiment, the interrupt function is implemented by means of a software interrupt feedback signal, whereby the PWM waveform applied to FET (423) is interrupted within the said switch-mode control software, in response to the measurement during each ON-state of the PWM dimming waveform, of the voltage on the dimmable regulator (410). Therefore, in the embodiment illustrated in FIG. 4(b) the hardware interrupt feedback shown in FIG. 4(a) as feedback FB3, Opto-isolator (522) and feedback FB4, is eliminated.

[0095] The normally skilled person will appreciate that opto-isolator 421 shown in FIG. 4(b) may be eliminated in circumstances where the drain to gate feedback isolation of the switch-mode FET (423) is sufficient to provide isolation of the Microcontroller (413) from signal surges and voltage spikes, occurring at the input to the ballast.

[0096] In applications requiring high ballast efficiency at low LED load voltages, it is appreciated by the inventor that the precise regulator architecture disclosed in WO2013/005002 represents a non-ideal solution, having as it does, a knee voltage of around 6V. In order, therefore, to accommodate a peak-to-peak voltage swing of around 1 V, the current regulator would need to be operated, in undimmed conditions, at a voltage of just above 7 V. Such a regulator would therefore be operated with a voltage across it maintained, in undimmed operation, at around 8V. In view of the fact that the primary switch mode converter (403) may preferably operate, at full load, with an efficiency of around 95%, in order for the entire ballast to have an efficiency greater that 85% for all loads, the regulator would need to be operating at an efficiency of at least 89.5%. The operational efficiency of the current regulator is given simply by the ratio of the LED load voltage, to the total voltage dropped across the LED load and the regulator. It can therefore, easily be calculated, that the minimum LED load voltage necessary to ensure that an overall efficiency of at least 85% is achieved for the ballast, when using the precise regulator architecture disclosed in WO2013/005002, is 68 V.

[0097] For an application requiring an LED load power, when undimmed, of around 10 Watts—typical for an A19 or similar LED bulb replacement for a 60 W input incandescent—it is more usual for the LED load to operate at a voltage of 48V and correspondingly, an LED current of 208 mA. For such an application, using a ballast of the present invention would require the current regulator to have a lower knee voltage, in order to maintain high efficiency.

[0098] FIG. 5 shows a current regulator (500) based on the overall architecture disclosed in WO2013/005002. This shows a pair of elemental current regulators (501, 502), with the first elemental regulator (501) cross coupled to the second elemental regulator (502), similar in basic structure to the embodiment of FIG. 6 of WO2013/005002. In the present variant of the current regulator, a parallel stack of series-connected silicon diodes (503) and resistors replaces a parallel Zener stack in one of the elemental regulators of the referenced device. In this manner, through appropriate selection of component values, a significantly reduced knee voltage can be obtained.

[0099] Using the current regulator architecture of FIG. 5 of the present application, a knee voltage of around 4.2V can be achieved, using the following resistor values, together with standard Silicon rectifier diodes, and with four Zener diodes in the parallel Zener stack, whereby each Zener diode carries a current of 25 mA and has a Zener voltage at this current of 3 V:

RL=22Ω, Ru1=4.8Ω, Ru2=15.2Ω

[0100] These values relate to the circumstance where each Silicon rectifier diode has a voltage drop of 0.8V and where the base-emitter voltage of each bipolar transistor is 0.7V.

[0101] The modified current regulator architecture of FIG. 5 can, through the appropriate selection of resistor values, number of rectifier diodes and Zener diodes, be used to address a range of currents required for low-voltage ballasts of the present invention, where the upper end of such range is determined primarily by the current handling capabilities of the PNP and NPN bipolar transistors.

[0102] Referring to the overall ballast architectures of FIGS. 4(a) and 4(b), if the efficiency of the primary converter (403) is around 95% then, using a value of 220 μF for smoothing capacitor (407) the peak-to-peak ripple voltage across capacitor (407) at a constant DC load current of 208 mA will be, to a good engineering approximation, 2.6V. This allows the regulator to be operated at around 1.4V above its knee voltage, with sufficient margin to ensure that throughout the voltage ripple, it remains within its high differential impedance region (i.e. above its knee voltage). This means that a current regulator of this type, operated within the architecture of the present invention, would be operated at a regulator voltage of 5.6V. For an LED load voltage of 48V, this corresponds to a regulator efficiency of (481(48+5.6))×100%, namely 89.6%. This in turn, gives an overall efficiency for the ballast, of 95% of 89.4%, namely 85%.

[0103] Such a ballast, operating at this current level would require only one current regulator of the type disclosed. Consequently, the current regulator will have a differential impedance of around 10KΩ). Therefore, the peak-to-peak voltage of 2.6V experienced by the regulator in this example, would give rise to a peak-to-peak current ripple of 0.26 mA (0.125% of the LED current) corresponding to a percentage flicker at 100-120 Hz, of 0.05%.

[0104] Similarly, the 4 Volt peak-to-peak voltage swing experienced during controlled hiccup mode would give rise to a peak-to-peak current ripple of around 0.4 mA, equating to a percentage peak-to-peak current ripple of 0.2%. This in turn corresponds to a flicker percentage in the light emitted by the LED load, of 0.1%.

[0105] The same modified current regulator would also be suitable for use in lamps using higher LED load voltages, and correspondingly lower LED currents. For example, if the LED load voltage is 100V, and the LED current is 100 mA—again giving an LED load power of 10 W—and the smoothing capacitor (407) is 122 μF, then the peak-to-peak voltage ripple across the smoothing capacitor would again be 2.3V. The current regulator is therefore again, as in the previous example, operated at a voltage of 5.5V, leading to a regulator efficiency of (100/(100+5.5))×100%, namely 94.8%. This, together with the 95% efficiency of the flyback converter, would lead to an overall ballast efficiency of 90%. Furthermore, the peak-to-peak current ripple at 100-120 Hz in the LED load would be 0.23 mA as before, corresponding to 0.2% of the LED current, thereby giving a flicker percentage of 0.1%.

[0106] It should be appreciated by a person normally skilled in the art, that ballasts according to the present invention could incorporate, in the manner outlined above, other types of current regulator that possess the same or broadly similar differential impedance and dimming capabilities as those outlined above whilst still providing a good performance, and that other current regulators of lesser performance may also be used, while still providing an adequate (albeit reduced) performance.

[0107] In the same family of preferred embodiments of the present invention, the main flyback converter (403) is provided with a Power Factor Correction (PFC) functionality by use of a Power Factor Correction Controller (416) which can use a constant on-time, constant off-time, or any similar switch-mode primary control function, or combination of functions, for the purposes of maintaining high Power Factor. By contrast, the auxiliary flyback converter (405) preferably uses a constant on-time controller (417). This difference in switch-mode control actuation ensures that whilst the Power Factor of the overall ballast can be controlled, and thereby maximised, the auxiliary circuit, comprising the auxiliary flyback converter (405) the resistive divider R1, R2, and the voltage follower (420) provides a DC voltage output V.sub.cntl that is directly related to the phase-cut angle, φ.

[0108] By consideration of the operational modes of the two flyback converters, and in each case applying conservation of charge over the mains AC cycle, the peak of the average secondary current for each (drawn through the secondary winding inductors of the main flyback transformer (418) and the auxiliary flyback transformer (419)) can be expressed as:

[00001]$\begin{array}{cc}〈I_{\mathrm{se}.Math..Math.c.Math..Math.1}〉,p=K.Math.\pi .Math.I_{\mathrm{reg},0}.Math.\frac{D}{\mathrm{Cos}\left(\varphi \right)+1}& \left(\mathrm{Equation}.Math..Math.1\right)\end{array}$
And

<I.sub.sec2>,p=K.Math.π.Math.<V.sub.c2>/((R1+R2).Math.(Cos(φ))+1))  (Equation 2)

[0109] Wherein:

For φ≦90 degrees, K=1
For φ>90 degrees, K=Sin(φ)
<I.sub.sec1>,p is the peak average secondary current in the flyback transformer (418) of the main flyback converter
<I.sub.sec2>,p is the peak average secondary current in the flyback transformer (419) of the auxiliary flyback converter
I.sub.reg,0 is the undimmed value of the regulated LED current, controlled by the current regulator (410)
D is the duty cycle of the PWM waveform applied to the current regulator (410)
φ is the cut-angle of the full-wave rectified voltage waveform at the input to the ballast, for the case where the said waveform has, prior to rectification, been subjected to leading-edge dimming
<V.sub.c2> is the time-average voltage across capacitor, C2

[0110] The time-average voltage across capacitor, C2 is applied, via a resistive divider comprising resistances R1 and R2, to the non-inverting input of a voltage follower (420). The action of such a voltage follower is to provide a DC output, V.sub.cntl, which will follow <V.sub.+> (the time-average voltage across R2) for values of V.sub.+ in the range 0 to V.sub.r,vf, where V.sub.r,vf is the rail supply voltage provided to voltage follower (420).

[0111] In view of the fact that the auxiliary flyback converter (405) uses a constant on-time and constant switching frequency, the peak average secondary current <I.sub.sec2>,p is given by:

<I.sub.sec2>,p=K.Math.V.sub.p.Math.ton.sup.2.Math.f.sub.sw/(2.Math.Lp.sub.2.Math.n.sub.2)  (Equation 3)

[0112] Wherein:

V.sub.P is the peak voltage of the full-wave rectified voltage waveform
t.sub.on is the constant on-time of the switch-mode controller (417)
f.sub.sw is the constant switching frequency of the switch-mode controller (417)
n.sub.2 and L.sub.p2 are in turn, the turns ratio (output to input) and primary inductance of the flyback transformer (419) of the auxiliary flyback converter (405).

[0113] Combining Equations 2 and 3, and in sight of the operation of voltage follower (20) the control voltage, V.sub.cntl, can be expressed as a function of cut-angle φ:

[00002]$\begin{array}{cc}{V}_{\mathrm{cntl}}\left(\varphi \right)=R.Math..Math.2.Math.V_p.Math.{\mathrm{ton}}^2.Math.f_{\mathrm{sw}}.Math.\frac{\mathrm{Cos}\left(\varphi \right)+1}{2.Math.\pi .Math.n_2.Math.L_{p.Math..Math.2}}& \left(\mathrm{Equation}.Math..Math.4\right)\end{array}$

[0114] In view of the fact that equation 2 is derived from conservation of charge over a mains cycle, the expression given in equation 4, providing the mapping function between V.sub.cntl and φ, is identical for leading-edge and trailing edge dimming, making the control voltage independent of dimmer type.

[0115] In response to this voltage input, the microcontroller (413) adjusts the duty cycle of the PWM waveform, according to an algorithm provided through a pre-loaded look-up table within the microcontroller. The said algorithm provides the 1:1 mapping between duty cycle, D and V.sub.cntl and therefore, via equation 4, between D and φ.

[0116] An example of such an algorithm is given by Equations 5 and 6. This is a specific example of a so-called ‘logarithmic’ or more accurately, geometric profile, where D=1 when φ=φ.sub.min and D=D.sub.min when φ=φ.sub.max.

D(φ)=10.sup.f(φ)  (Equation 5)

[0117] Where:

[00003]$\begin{array}{cc}f\left(\varphi \right)=\left(\varphi -{\varphi }_{m.Math..Math.i.Math..Math.n}\right).Math.\frac{\log .Math..Math.D_{m.Math..Math.i.Math..Math.n}}{{\varphi }_{\mathrm{ma}.Math..Math.x}-{\varphi }_{m.Math..Math.i.Math..Math.n}}& \left(\mathrm{Equation}.Math..Math.6\right)\end{array}$

[0118] Through the combination of Equations 5 and 6 with Equation 4, a transfer function is constructed, between the cut-angle, φ, the control voltage V.sub.cntl fed to the microcontroller and the PWM duty-cycle provided by the microcontroller.

[0119] Current regulators based on the architecture of FIG. 5 may, in some embodiments, achieve dimming, through the methods described herein, down to 0.1%, and in some cases even further. Through the use of an algorithm contained within the Microcontroller (413), in the form of a look-up table, or collection of look-up tables, the entire dimming range of 100% regulated current, down to 0.1% of regulated current, can be mapped on to the phase-cut angle range of a leading or trailing-edge dimmer. Furthermore, due to the high differential impedance of the current regulator described herein, together with the use of the controlled hiccup mode described herein, low levels of photometric flicker can be achieved throughout the entire range of a dimmer switch, regardless of whether the dimmer switch provides leading or trailing edge dimming.

[0120] It is desirable for the ballast to be able to adjust its operations, in order to map its available dimming range onto the phase-cut angle range of a phase-cutting dimmer to which it is connected, without prior knowledge of this angular range. This ensures that the dimming profile of the ballast exhibits no ‘dead travel’ at either end of the dimming range. The following discussion details how this can be achieved.

[0121] Adaptive Dimming:

[0122] Within any given country, or region within which a nominal mains RMS voltage is defined, such as 230V in the UK, there is some variability between properties (typically of order +/−10%) in the actual mains voltage delivered. In addition to this, variations exist between phase-cut dimmers, in terms of the minimum and maximum values of cut-angle, φ.sub.min and φ.sub.max. These can lie, for typical commercially available phase-cut dimmers, between around 5 and around 90 degrees or more for φ.sub.min and between around 100 and 179 degrees for φ.sub.max.

[0123] An emerging requirement in retro-fit LED lighting equipment is for such equipment to be compatible with the range of commercially available and pre-installed phase-cut dimmers. This implies, amongst other things, the need for ballasts to be able to operate across their full dimming range, where the said range is mapped in any particular case, to the phase-cut angle range of the dimmer to which the ballast is connected. In the context of the circuit architecture of an isolated ballast, this implies a need for the architecture to provide a voltage, or current, which is used in controlling the dimming function. A strategy for ensuring compatibility would then involve the detection of such voltages or currents that lie outside a pre-assumed, minimum, range and the re-mapping of the dimming function in such a way as to accommodate the new maximum and minimum values of the detected voltage or current. In the context of a ballast according to the present invention, the voltage V.sub.cntl can be used to affect such a re-mapping process, thereby providing wide-ranging and preferably universal dimmer compatibility. The process would involve initially centring the transfer function V.sub.cntl(φ) onto a minimum range of values of φ (((φ).sub.min).sub.assumed to ((φ).sub.max).sub.assumed) and then upon detecting values of V.sub.cntl that lie outside the corresponding range (V.sub.cntl,max).sub.assumed to (V.sub.cntl,min).sub.assumed) proceed to re-map the function V.sub.cntl(φ) across the newly-encountered range of φ. Similarly, the function D(φ) would be re-mapped over the new range of φ.

[0124] In its initial state (before a lamp, or separate ballast, is installed into a lighting system) the algorithm loaded into the microcontroller assumes that the range of V.sub.cntl to be received by the microcontroller is that which, for the known values of n.sub.2, t.sub.on and L.sub.p,2 and an assumed value of Vp, corresponds to a minimum phase-angle range (φ.sub.min to φ.sub.max) where V.sub.cntl has its minimum value when φ=φ.sub.max and has its maximum value when φ=φ.sub.min. The algorithm then maps the dimming range of the current regulator and therefore of the ballast (D.sub.min to 1) onto this initially assumed range of V.sub.cntl.

[0125] Following installation, if the Microcontroller receives a value of V.sub.cntl that lies outside of this initially assumed range, the algorithm is re-mapped, such that the minimum PWM duty cycle, D.sub.min is mapped onto the new maximum value of V.sub.cntl, and the maximum PWM duty cycle (i.e. unity) is re-mapped onto the new minimum value of V.sub.cntl.

[0126] By using the architecture of FIG. 4(a) or 4(b), wherein the auxiliary flyback converter uses a constant on-time controller, and where the current regulator has a known dimming range, variations between dimming switches, in parameters Vp, φ.sub.min and φ.sub.max can be accommodated, whilst achieving full-range dimming, regardless of whether the dimmer switch uses a leading-edge or trailing-edge dimming method.

[0127] Note that, although embodiments of the invention have been presented having a flyback converter as the primary or auxiliary switch mode converter, it will be appreciated by a person of ordinary skill in the art, that equivalent circuit topologies exist, and may be substituted therefore, without changing the nature of the invention, and without requiring any inventive activity. For example, Buck converters or Boost converters may be used, and the normally skilled person will appreciate any design implications thereof, and any changes and modifications required.

[0128] Note also that the term Light Emitting Diode, and LED refers to light emitting diodes of all types, including semiconductor and organic LEDs, that may be configured to generate radiation in the visible, the infra-red and/or the ultra-violet wavelengths.

[0129] Note that, although the invention is described largely in the context of use with an LED lighting system, it will also have application in other areas where power to a load needs to be controlled across a particular large range of input powers, using a phase cutting technique or other technique to reduce the AC power fed to the switch mode converter.