DIFFERENTIAL MEASUREMENT CIRCUIT, AND BALANCE WITH FORCE COMPENSATION
20170234720 · 2017-08-17
Inventors
Cpc classification
G01G9/00
PHYSICS
International classification
Abstract
A differential measurement circuit (1) is implemented in a balance with electromagnetic force compensation. The circuit receives input from two photo currents (I.sub.1, I.sub.2) generated by photodiodes (D1, D2) and generates an output signal proportional to their difference. A switch (SW) controls the flow of current through a node (K.sub.Δ) to which the two photo currents are directed, by flipping between two states (z.sub.t1, z.sub.t2) within two phases (t.sub.1, t.sub.2) of a time period T. The switch is controlled so a reference current (I.sub.Ref) from a voltage or current source (U.sub.Ref) is superimposed alternatingly within the time phases on one of the two photo currents which continuously flow into the node. The node lies at the input of an integrator (INT) whose integrator signal (s.sub.INT) can be compared in a comparator (CMP) to a cyclically recurring ramp signal (s.sub.RAMP) which conforms to the time period. At the output of the comparator, a rectangular-shaped comparator signal (s.sub.PWM) can be generated whose duty cycle ratio is defined by the intersection of the integrator signal with the ramp signal and which can be directed to a control input of the switch.
Claims
1. A differential measurement circuit for a balance with electromagnetic force compensation, the circuit being arranged to receive, as inputs, two photo currents (I.sub.1, I.sub.2) generated by two photodiodes (D1, D2) and to generate from the inputs an output signal that is proportional to a difference between the photo currents, the circuit comprising: a switch (SW), arranged to be flipped between two states (z.sub.t1, z.sub.t2) within two phases (t.sub.1, t.sub.2) of a time period (T) to control the flow of current through a node (K.sub.Δ) to which the two photo currents (I.sub.1, I.sub.2) are directed, wherein the switch (SW) is further arranged to be controlled such that a reference current (I.sub.Ref) delivered to the switch from a voltage or current source (U.sub.Ref) is superimposed alternatingly within the time phases (t.sub.1, t.sub.2) on one of the two photo currents (I.sub.1, I.sub.2) which continuously flow into the node (K.sub.Δ); and wherein the node (K.sub.Δ) lies at an input of an integrator (INT), the integrator signal (s.sub.INT) of which is compared in a comparator (CMP) to a cyclically recurring ramp signal (s.sub.RAMP) which conforms to the time period (T), while at the output of the comparator (CMP) a rectangular-shaped comparator signal (s.sub.PWM) is generated, a duty cycle ratio of which is defined by the intersection of the integrator signal (s.sub.INT) with the ramp signal (s.sub.RAMP) and which is directed to a control input of the switch (SW).
2. The circuit of claim 1, wherein: the first electrode of the first photo diode (D1) is connected directly to the node (K.sub.Δ); the first electrode of the second photodiode (D2) is connected to the node (K.sub.Δ) by way of an inverter (INV) in which the second photo current (I.sub.2) is inverted; and the respective second electrodes of the two photodiodes (D1, D2) are connected to a common voltage potential U.sub.B.
3. The circuit of claim 2, further comprising a first operational amplifier (OA.sub.INV) in the inverter (INV), an inverting input of the first operational amplifier (OA.sub.INV) connected to the first electrode of the second photo diode (D2), and with an output of the first operational amplifier (OA.sub.INV) connected, through a first resistor (R1), to the inverting input and, through a second resistor (R2) of equal magnitude, to the node (K.sub.Δ).
4. The circuit of claim 2, wherein the voltage- or current source (U.sub.Ref) is an operating voltage source of the differential measurement circuit that is also used for other components.
5. The circuit of claim 1, further comprising a light source, preferably a light-emitting diode (D3), is arranged so that the radiation therefrom reaches the photo diodes (D1, D2) by passing through a movable light barrier.
6. The circuit of claim 3, further comprising a second operational amplifier (OA.sub.INT) working in an integrator circuit, an inverting input of the second operational amplifier (OA.sub.INT) being connected to the node (K.sub.Δ) and the output of the second operational amplifier (OA.sub.INT) being connected through a capacitor (C.sub.INT) to the inverting input, to deliver the integrator signal (s.sub.INT).
7. The circuit of claim 6, further comprising a third operational amplifier (OA.sub.CMP) working in a comparator circuit, a first input of the third operational amplifier (OA.sub.CMP) receiving the integrator signal (s.sub.INT), a second input of the third operational amplifier (OA.sub.CMP) receiving the ramp signal (s.sub.RAMP) and an output of third operational amplifier (OA.sub.CMP) delivering the comparator signal (s.sub.PWM).
8. The circuit of claim 7, further comprising a first counter which for the duration of a period T counts from an initial value upward to an ending value and is then reset, thereby generating the ramp signal (s.sub.RAMP).
9. The circuit of claim 8, wherein a digital measurement quantity (d.sub.MG) which is at least approximately proportional to the displacement of the movable light barrier is obtained, and based on either: the difference of the time phases t.sub.1, t.sub.2 of the period T or a part thereof, preferably by means of a second counter, or the duty cycle ratio of the comparator signal (s.sub.PWM).
10. The circuit of claim 9, wherein a controller (R.sub.D) receives the digital measurement quantity (d.sub.MG) as a deviation from a control target and generates a corresponding digital regulating quantity (d.sub.SG) as a means for returning the movable light barrier towards an initial position between the two photodiodes (D1, D2).
11. The circuit of claim 9, further comprising: a digital-to-analog converter (9) receives the digital regulating quantity (d.sub.SG) which delivers a corresponding analog regulating quantity (a.sub.SG) to a driver circuit (2), causing a compensating current (I.sub.comp) proportional to the analog regulating quantity (a.sub.SG) to flow through a coil (110) which is movable in a magnetic field, held by a pivotally supported measurement lever (106) with a first end section (106c) where the force to be measured can be applied and a second end section (106b) where the movable light barrier is arranged.
12. A balance operating under an electromagnetic force compensation principle, comprising: a cantilevered extension from which a force is measured; a pivotally supported measurement lever having first and second end sections, a coupling member that transmits the measured force to the first end section a coil, on the second end section, supported in a magnetic field; a light source; a pair of photodiodes, arranged one above the other; a light barrier vane, supported on the second end section, positioned between the light source and the pair of photodiodes, such that light from the light source passes through the light barrier vane and onto the pair of photodiodes, where each photodiode generate a photo current; and a differential measurement circuit according to claim 1, wherein the pair of generated photo currents are used as a controlling input variable, the differential measurement circuit arranged in a controller device, the differential measurement circuit operable to generate a corresponding digital comparator signal (s.sub.PWM) for which a corresponding digital regulating quantity (d.sub.SG) is calculated in a controller (R.sub.D) and wherein said digital regulating quantity (d.sub.SG) is converted in a digital-to-analog converter into a corresponding analog regulating quantity (a.sub.SG) for which a corresponding compensation current (I.sub.comp) can be generated in a driver circuit (2) and sent through the coil.
13. The balance of claim 12, wherein the controller (R.sub.D) is a computer in which an operating program is implemented through which measurement processes can be controlled, wherein the digital regulating quantity (d.sub.SG) can be calculated by taking the controlled measurement processes into account.
14. The balance of claim 12, wherein the controller (R.sub.D) is connected to sensors by means of which disturbances (x) can be quantitatively detected, and that subroutines are implemented in the controller (R.sub.D) through which the digital regulating quantity (d.sub.SG) can be calculated by taking the disturbances into account.
15. The balance of claim 12, wherein the controller (R.sub.D) is a PID-controller equipped with an appropriately configured regulating element.
16. The circuit of claim 1, further comprising a first operational amplifier (OA.sub.INV) in the inverter (INV), an inverting input of the first operational amplifier (OA.sub.INV) connected to the first electrode of the second photo diode (D2), and with an output of the first operational amplifier (OA.sub.INV) connected, through a first resistor (R1), to the inverting input and, through a second resistor (R2) of equal magnitude, to the node (K.sub.Δ).
17. The circuit of claim 16, further comprising a second operational amplifier (OA.sub.INT) working in an integrator circuit, an inverting input of the second operational amplifier (OA.sub.INT) being connected to the node (K.sub.Δ) and the output of the second operational amplifier (OA.sub.INT) being connected through a capacitor (C.sub.INT) to the inverting input, to deliver the integrator signal (s.sub.INT).
18. The circuit of claim 17, further comprising a third operational amplifier (OA.sub.CMP) working in a comparator circuit, a first input of the third operational amplifier (OA.sub.CMP) receiving the integrator signal (s.sub.INT) , a second input of the third operational amplifier (OA.sub.CMP) receiving the ramp signal (s.sub.RAMP) and an output of third operational amplifier (OA.sub.CMP) delivering the comparator signal (s.sub.PWM).
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0050] In the following, the invention will be explained in more detail by referring to the drawings, wherein:
[0051]
[0052]
[0053]
[0054]
[0055]
[0056]
[0057]
DETAILED DESCRIPTION
[0058] The balance with electromagnetic force compensation shown in
[0059]
[0060] The differential measurement circuit 1 of
[0061] The cathodes of the photodiodes D1 and D2 are permanently connected to a common voltage potential U.sub.B rather than being connected to a switch as was the case in the circuit arrangement of
[0062] In the inverter circuit, the second photo current I.sub.2 is directed to the inverting input of a second operational amplifier OA.sub.INV, whose output is connected by way of a first resistor R1 to the inverting input and by way of a second resistor R2 to the node K.sub.Δ.
[0063] The second photo current I.sub.2 flows through the first resistor R1 and as a result there is a voltage in the amount of I.sub.2*R1 across the resistor R1. Since the first as well as the second resistor R1, R2 have one end connected to virtual mass, the voltage potential across the second resistor R2 is the same as across R1. Since the resistors R1, R2 are of the same magnitude but are connected to mass at opposite ends, the current flowing in the resistor R2 has the same magnitude as the current flowing in the resistor R1, but the opposite sign. The second photo current I.sub.2 therefore flows with reverse polarity to the node K.sub.Δ.
[0064] The switch SW, which is flipped once forward and back again in each period, has the effect that during a first time phase t.sub.1 with the switch in position z.sub.t1 a reference current I.sub.Ref1 is superimposed on the first photo current I.sub.1. During a second time phase t.sub.2 with the switch in position z.sub.t2 the reference current I.sub.Ref2 is superimposed on the second photo current I.sub.2.
[0065] The symbolically represented toggle contact of the switch SW, which is configured preferably as a semiconductor switch, is connected to a reference voltage U.sub.Ref by way of a reference resistor R.sub.Ref. The reference current I.sub.Ref is therefore determined by the quotient U.sub.Ref/R.sub.Ref. Both points at which the reference currents I.sub.Ref1, I.sub.Ref2 are superimposed on the respective photo current I.sub.1 or I.sub.2, are connected to virtual mass, so that in both positions of the switch SW the voltage across R.sub.Ref is U.sub.Ref and the two reference currents I.sub.Ref1, I.sub.Ref2 are identical and can therefore be referred to as a single reference current I.sub.Ref.
[0066] Since there is no switching between the photo currents I.sub.2 and I.sub.2 and, instead, the reference current IRef is being switched, the operating conditions are more stable, which opens up the advantageous possibility of using an operating voltage of the circuit arrangement instead of a reference voltage source for the reference voltage U.sub.Ref.
[0067] The node K.sub.Δ lies at the input of an integrator INT, specifically at the inverting input of a second operational amplifier OA.sub.INT which is part of the integrator and whose output is connected to the node K.sub.Δ by way of a capacitor C.sub.INT. Thus, the respective differential currents entering the node during the time phases t.sub.1, t.sub.2 are flowing into the capacitor C.sub.INT as integrator current I.sub.INT and are charging or discharging the capacitor C.sub.INT. If the currents cancel each other mutually at the node K.sub.Δ, the charge of the capacitor C.sub.INT and its output signal, i.e. the integrator signal s.sub.INT at the output of the second operational amplifier OA.sub.INT, stays unchanged. With the alternating addition of the reference current I.sub.Ref in the two time phases t.sub.1, t.sub.2, the state where the currents at the node K.sub.Δ cancel each other should be reached as soon as the integrator signal s.sub.INT is proportional to the displacement of the light barrier and to the difference of the photo currents I.sub.1, I.sub.2, at the time when the integrator signal s.sub.INT and the ramp signal s.sub.RAMP intersect each other. Thus, the integrator signal s.sub.INT needs to be measured and compared to a reference signal. Dependent on the comparison, a corresponding switching signal for the switch SW needs to generated, so that the differential current at the node K.sub.Δ vanishes when the integrator signal s.sub.INT has reached a value that is proportional to the displacement of the light barrier.
[0068] To make this comparison, the integrator signal s.sub.INT is directed to a comparator CMP, specifically to the non-inverting input of a third operational amplifier OA.sub.CMP that is part of the comparator and to whose inverting input a ramp signal s.sub.RAMP is applied which preferably corresponds to the voltage range that can be swept by the integrator signal s.sub.INT. The ramp signal s.sub.RAMP is generated by a ramp generator RG which receives at its first input a counter signal of a first counter. The first counter Z1 performs a periodic upward count while the ramp generator RG generates a corresponding analog signal. After the completion of each period, the first counter Z1 is reset and starts a new up-count. As soon as the ramp signal s.sub.RAMP reaches the value of the integrator signal, the comparator (i.e. the operational amplifier OA.sub.CMP) is switched over, so that the result is a pulse-width modulated comparator signal s.sub.PWM at the output of OA.sub.CMP.
[0069] The comparator signal s.sub.PWM is then directed to the controlling input of the switch SW, so that the time phases t.sub.1, t.sub.2 in which the reference current is superimposed on the respective photo current I.sub.1, I.sub.2 continue to be adjusted until the difference between the currents arriving at the node K.sub.Δ is zero on average and the charges flowing into and out of the capacitor C.sub.INT cancel each other.
[0070] The comparator signal S.sub.PWM is further used for the control of the light barrier. This is accomplished with a digital measurement quantity or position-restoring quantity which is derived from the comparator signal s.sub.PWM in a second counter Z2. The second counter Z2 counts for example the number of steps from the occurrence of the polarity change until the target position of the light barrier has been reached or, if a displacement of the light barrier has occurred in the opposite direction, the number of steps from the detection of the target position until the polarity change occurs.
[0071] The first and the second counter Z1, Z2 are preferably part of a common counter module Z. For example, the controller R.sub.D mentioned below is realized by means of a processor which includes several counters that are selectively programmable.
[0072] After the digital measurement quantity or position-restoring quantity s.sub.MG has been determined, it is sent from the output of the differential measurement circuit 1 to the input of a digital controller R.sub.D. As the digital reference quantity d.sub.FG is preferably equal to zero and the measurement- or position-restoring quantity s.sub.MG therefore represents the deviation from the control target and needs to be regulated to zero, it is sent to a controller element which calculates a corresponding digital regulating quantity d.sub.SG by means of which the light barrier is returned to the initial position. As explained above, when there is a change in weight, the required change of the regulating quantity d.sub.SG is calculated which was previously used for a specific weight to bring the light barrier back to the initial position. The regulating quantity calculated by the controller R.sub.D is thus added to a stored regulating quantity which corresponds to the weight and which was measured before the weight change.
[0073]
[0074]
[0075] As the diagrams illustrate, when a deviation from the control target has occurred, it is corrected by the regulation, and the pulse-width modulated comparator signal s.sub.CMP as well as the two first signals I.sub.Ref1, I.sub.Ref2 which depend on s.sub.CMP are regulated towards a duty cycle ratio of 50/50. Consequently, the integrator current I.sub.INT likewise changes accordingly. The integrator signal s.sub.INT rises and ends up at about one-half of the height of the ramp signal s.sub.RAMP, with the result that the pulse-width modulated comparator signal s.sub.CMP returns to a duty cycle ratio of 50/50.
[0076]
[0077] In this configuration of the circuit arrangement, the preferably pulse-width modulated signal s.sub.PWM, rather than the deviation from the control target, is transmitted to the controller R.sub.D. Therefore, the expanded processor-controlled regulating unit R.sub.D determines the deviation from the control target for example as described above and calculates a digital regulating variable d.sub.SG which is passed on to a D/A converter 9. The latter transmits a corresponding analog regulating variable a.sub.SG to a driver circuit 2 which causes a compensation current I.sub.comp to flow through the compensation coil 110.
[0078] In preferred embodiments according to the invention, the processing of signals in the control loop of
[0079] Disturbances x affecting the balance are detected by means of sensors 4, and corresponding measurement signals mx are sent to the controller R.sub.D. To deal with these disturbances, software routines 7 are stored in the controller with instructions for taking appropriate countermeasures in the control loop.
[0080] Disturbances x affecting the regulation process can also be caused by movements of the measurement objects. These movements of the measurement objects can also be detected by sensors 4 and can be addressed by operating programs in the balance or in a central computer L.
[0081] The individual control parameters are preferably controlled by taking the aforementioned extraneous effects of disturbances appropriately into account. If a PID controller is used, the respective weight factors of the P, I and D component are appropriately adjusted. Furthermore, an anticipatory control excursion can be applied, by means of which an expected weight change is compensated.
[0082] Furthermore, digital filters 5 can be employed, or their respective filter parameters can be adjusted for the filtering of the signals that are processed in the digital controller R.sub.D.