MULTI-LAYER COATING

Abstract

The invention relates to a method for coating a substrate 40, a coating system for carrying out the method, and a coated body. In a first method step 62, the substrate 40 is to pretreated in a ion etching process. In a second method step 64, a first coating layer 56a with a thickness of 0.1 μm to 6 μm is deposited on the substrate 40 by means of a PVD process. In order to achieve a particularly high-quality and durable coating 50, the surface of the first coating layer 56a is treated by means of an ion etching process in a third method step 66, and an additional coating layer 56b with a thickness of 0.1 μm to 6 μm is deposited on the first coating layer 56a by means of a PVD process in a fourth method step 68. The coated body comprises at least two coating layers 56a, 56b, 56c, 56d with a thickness of 0.1 μm to 6 μm on a substrate 40, wherein an interface region formed by ion etching is arranged between the coating layers 56a, 56b, 56c, 56d.

Claims

1. A method for coating a substrate, wherein in a first method step, the substrate is pretreated in a ion etching process, in a second method step, a first coating layer with a thickness of 0.1 μm to 6 μm is deposited on the substrate by means of a PVD cathode sputtering process, in a third method step, the surface of the first coating layer is treated by means of an ion etching process, in a fourth method step, at least one additional coating layer with a thickness of 0.1 μm to 6 μm is deposited on the first coating layer by means of a PVD cathode sputtering process, wherein the thickness of the coating layers deposited on top of each other is 12 μm to 30 μm in total.

2. The method according to claim 1, characterized in that following on from the fourth method step, once or multiple times, initially, the surface of the uppermost coating layer is treated by means of an ion etching process, and subsequently, an additional coating layer is deposited on the underlying coating layer by means of the PVD cathode sputtering process.

3. The method according to claim 1, characterized in that at least the second, third and fourth method step are performed without the vacuum being interrupted.

4. The method according to claim 1, characterized in that a bias voltage is applied to the substrate in each case in the first, second, third and fourth method step, wherein the bias voltage is higher in the third method step than in the second and fourth method step.

5. (canceled)

6. The method according to claim 1, characterized in that metal ions are generated during the ion etching process and accelerated by means of a bias voltage towards the substrate surface.

7. (canceled)

8. The method according to claim 1, characterized in that the cathode sputtering method is a HIPIMS coating method.

9. The method according to claim 8, characterized in that the HIPIMS coating method is carried out while a bias voltage is applied to the substrate, wherein the bias voltage is applied in bias pulses, and wherein the bias pulses are temporally synchronized with HIPIMS pulses, which are applied to a cathode.

10. The method according to claim 1, characterized in that one or more of the coating layers at least substantially comprises a composition selected from the group comprising
Al—Ti—N,
Ti—B,
Ti—Si—N,
Al—Ti—Si—N,
Ti—C—N,
Ti—Al—C—N,
Al—Ti—Cr—Si—N.

11. The method according to claim 1, characterized in that a plurality of the coating layers are produced from the same elements.

12. The method according to claim 1, characterized in that the substrate is a tool having at least one cutting edge.

13. A coating system for carrying out the method according to claim 1, comprising a vacuum chamber, a device for arranging a substrate in the vacuum chamber, means for generating a plasma in the vacuum chamber, means for generating a bias voltage on the substrate, and control means for controlling the coating system in order to automatically carry out the method.

14. A coated body, comprising a substrate, and a coating of a thickness of 12 μm-30 μm applied to the substrate by means of a PVD cathode sputtering method and comprising at least two coating layers each with a thickness of 0.1 μm to 6 μm, wherein an interface region formed by means of ion etching is arranged between the coating layers, wherein the coating layers comprise a first coating layer and a second coating layer thereon, between which the interface region is arranged, and wherein the structure of the second coating layer adjoining the inter-face region is finer than the structure of the first coating layer adjoining the interface region.

15. The coated body according to claim 14, wherein the coating comprises three or more coating layers each with a thickness of 0.1 μm to 6 μm, wherein an interface region formed by means of ion etching is arranged between each of the coating layers.

16. (canceled)

17. The coated body according to claim 14, wherein the coating has lower residual stresses than a continuous coating of the same thickness formed without an interface region.

18. The method according to claim 1, characterized in that an interface region is formed between the first coating layer and a second coating layer thereon, wherein the structure of the second coating layer adjoining the interface region is finer than the structure of the first coating layer adjoining the interface region.

Description

[0053] In the following, exemplary embodiments will be described in more detail with reference to the drawings, in which:

[0054] FIG. 1 is a schematic representation in top view of a coating system;

[0055] FIG. 2 is a schematic representation in perspective view of parts of the coating system from FIG. 1;

[0056] FIG. 3 shows an embodiment of a coated body in the form of an indexable insert;

[0057] FIG. 4 is a schematic sectional view of a coating of the coated body from FIG. 3 with multiple coating layers;

[0058] FIG. 5 is a flow diagram of an exemplary embodiment of a coating process;

[0059] FIG. 6 is a graph showing the course of various electrical variables over time during a coating step;

[0060] FIG. 7a is a photograph of a calotte grinding of a coating according to the exemplary embodiment;

[0061] FIG. 7b is a photograph of a calotte grinding of a coating according to a reference method;

[0062] FIG. 7 is an SEM image of a coating on a substrate;

[0063] FIG. 7d is an enlarged view of part of the SEM photo from FIG. 7c.

[0064] FIG. 1 and FIG. 2 show a PVD coating system 10 comprising a vacuum chamber 12. An interior 20 of the vacuum chamber 12 can be evacuated by means of a vent 14 in order to produce a vacuum. A process gas, preferably a noble gas or mixture of various noble gases, e.g. argon and/or krypton, can be fed in via an inlet 16. A reactive gas such as nitrogen can be fed in via an inlet 18. In alternative embodiments, the inlets 16, 18 may be replaced with a common inlet for a process gas and a non-combustible reactive gas.

[0065] Four magnetron cathodes 22a, 22b, 22c, 22d, each having plate-shaped sputter targets 24a, 24b, 24c, 24d, are arranged in the interior 20 of the vacuum chamber 12. FIG. 2 shows only two magnetron cathodes 22a, 22b for a better overview.

[0066] The magnetron cathodes 22a, 22b, 22c, 22d are oriented with their sputter targets 24a, 24b, 24c, 24d towards the center of the vacuum chamber 12. There is a rotatable substrate table 30 on which a number of rotatable substrate plates 32 having substrate holders 34 are arranged. In the example shown, indexable inserts 40 are loaded as substrates. The substrate holders 34 are upright, rod-like holders on which the indexable inserts 40 are placed. The indexable inserts 40 are electrically connected to the substrate table 30 via the substrate holders 34 and substrate plates 32. FIG. 2 shows only the substrate holders 34 of one substrate plate 32 for a better overview.

[0067] An indexable insert 40 is shown in FIG. 3. It comprises a rake face 42 and a flank face 44. In the arrangement shown in FIG. 2, the flank face 44 is arranged in parallel with the sputter targets 24a, 24b, 24c, 24d of the magnetron cathodes 22a, 22b, 22c, 22d. The edges between the faces 42, 44 are intended for use as cutting edges during machining. The indexable insert 40 consists of a WC/Co sintered hard metal.

[0068] The indexable insert 40 is merely an example of a substrate to be coated. Alternatively, components or tools of different shapes can be loaded on suitably shaped substrate holders 34 in each case.

[0069] The magnetron cathodes 24a, 24b, 24c, 24d are connected to a respective controllable electrical power supply 26a, 26b, 26c, 26d, by means of which an electrical voltage can be applied relative, to the electrically conductive wall of the vacuum chamber 12.

[0070] A controllable bias power supply 36 by means of which an electrical voltage relative to the wall of the vacuum chamber 12 can be applied to the substrate table 30, substrate holders 34 and substrates 40 is attached to the substrate table 30.

[0071] The power supplies 26a, 26b, 26c, 26d, 36 are, in this case, each shown merely schematically as controllable electrical voltage supplies. They may be conventional DC power supplies, pulsed power supplies and/or HIPIMS power supplies. In the example shown, the power supplies 26a, 26b, 26c, 26d are controlled such that they can switch between DC and HIPIMS operating modes. In alternative embodiments, respective dedicated DC and HIPIMS cathodes may be arranged inside the vacuum chamber 12 and be connected to dedicated DC and HIPIMS power supplies, which can then be activated or deactivated as desired upon actuation by means of the central control unit 36.

[0072] The power supplies 26a, 26b, 26c, 26d, 36 and pumps (not shown) at the inlets and outlets 14, 16, 18 are each attached to a central control unit 36 of the system 10. The central control unit 36 can be programmed such that all parameters of the pretreatment and coating methods taking place in the interior 20 of the vacuum chamber 12 are controlled by means of the control unit 36.

[0073] In the following, the sequence of a coating process programmed in the central control unit 36 will be explained by way of example:

Example: PVD Hard Material Coating With Large Thickness

[0074] A hard material coating with a particularly large thickness of more than 10 μm is to be applied in order to coat substrates such as the indexable insert 40. Coatings of this thickness usually cannot be applied with sufficient coating adhesion for machining applications.

[0075] FIG. 5 schematically shows a sequence of the coating process automatically prescribed by programming of the central control unit 36. Titanium plates are each provided with aluminum plugs as the sputter targets 24a, 24b, 24c, 24d inside the system 10. In a preparation step 60, the substrates 40 are charged inside the system to, and the vacuum chamber 12 is evacuated to a pressure of 350 mPa and heated.

[0076] Subsequently, the surface 54 of the hard metal material 52 of the substrates 40 is etched in a first etching step 62. In the example shown, the first etching step 62 is a combined etching step with a first and second etching substep, by means of which the substrate surface is cleaned and etched by means of gas ions.

[0077] In the first etching substep, ion etching takes place, wherein a plasma is initially ignited by means of the magnetron cathodes 22a, 22b, 22c, 22d.

[0078] The bias power supply 36 is thus actuated such that a bias voltage of −650 V and pulsed at medium frequency (240 kHz) in a bipolar manner against the chamber wall is applied to the substrate 40. In this way, gas ions of the plasma are accelerated onto the surface 54 of the substrate 40.

[0079] The first etching substep is applied for a period of approx. 15 minutes. This results in a low etch removal rate of 0.1 μm/h.

[0080] In the second etching substep, ion etching takes place again, wherein a plasma is again initially ignited by means of the magnetron cathodes 22a, 22b, 22c, 22d.

[0081] The bias power supply 36 is actuated for a treatment time of 60 minutes, with an argon/krypton mixture being supplied as the process gas, such that the substrate 40 is subjected to a constant DC bias voltage of −200 V with a negative potential.

[0082] The etch removal in the second etching substep is approx. 0.5 μm/h.

[0083] The etching step 62 is followed by a coating step 64 on account of switching on the part of the central control unit 36 and without the vacuum being interrupted, in which coating step the power supplies 26a, 26b, 26c, 26d of the magnetron cathodes 22a, 22b, 22c, 22d are actuated such that they are operated in HIPIMS mode with short, high voltage pulses. Each of the four magnetron cathodes 22a, 22b, 22c, 22d is supplied with a peak power of approx. 100 kW during the coating step 64.

[0084] The bias voltage supply 36 is actuated, such that a pulsed bias voltage of, for example, −50 to −150 V is applied, wherein the bias pulses are synchronized with the power pulses of the magnetron cathodes 22a, 22b, 22c, 22d. In this connection, the bias voltage is provided with an offset, such that the bias pulses start with a slight time delay with respect to the HIPIMS pulses.

[0085] During the coating time of approx. 100 minutes, nitrogen is fed in as the reactive gas in addition to argon/krypton as the process gas.

[0086] FIG. 6 shows examples of time curves for various electrical variables during the coating step 64, namely for the voltage 80 at the magnetron cathodes 24a, 24b, 24c, 24d (solid line), the cathode current 82 (dotted line), the cathode peak power 84 (dashed-dotted line), the bias voltage 86 (the dashed-double dotted line) and the bias current 88 (dashed line). As is clearly visible, the voltage 80 is applied to the magnetron cathodes 24a, 24b, 24c, 24d in pulses 90, while the bias voltage 86 is applied in temporally trailing bias pulses 92.

[0087] FIG. 4 schematically shows the structure of a coating 50 on the hard metal substrate material 52. A first coating layer 56a is produced there in the coating step 64. The coating rate is approx. 2 μm/h, such that a thickness of the first coating layer 56a of approximately 3 μm is produced at the end of the coating step 64.

[0088] The material system of the first coating layer 56a is Al—Ti—N. An Al share x (among the metallic elements) of approximately 60% is achieved.

[0089] By delaying the bias pulses 92 with respect to the HIPIMS pulses 90, relatively few gas ions are implanted in the coating layer 56a, which thus has a relatively low residual stress.

[0090] An intermediate etching step 66 follows on from the coating step 64. In the example shown, the intermediate etching step 66 is performed using the same parameters as in the first etching step 62, i.e. with two successive etching substeps. As already mentioned, it is alternatively possible to perform the etching steps 62, 66 using different parameters, in particular with the intermediate etching step being of shorter duration than the first etching step 62.

[0091] The amount of material removed in the intermediate etching step 66 is significantly less than the values indicated above for the first etching step 62, since the etched coating layer 56a is harder than the substrate surface etched in the first etching step 62.

[0092] Subsequently, an additional coating step 68 follows. In the present example, the coating step 68 corresponds to the previous coating step 64 in terms of all parameters used. In the example shown, the coating step 68 is also performed for the duration as the previous coating step 64. Alternatively, different coating steps can be performed using different parameters, such that coating layers that differ, for example, in terms of thickness, structure and/or composition are produced.

[0093] In the current example, the cycle of coating/intermediate etching/coating, controlled by programming of the central control unit 36 in the form of a loop, is repeated until a total of four coating layers 56a, 56b, 56c, 56d are deposited one on top of the other in each case with intermediate etching of the underlying surface (FIG. 4). Afterwards, the substrates 40 are cooled in the subsequent step 70.

[0094] By interrupting the layer growth at the respective points by means of the intermediate etching steps 66, there is no continuation of the growth of crystallites after the subsequent coating step 68 is started again, but rather new crystallization nuclei are formed. Although the coating steps 64, 68 are each performed using identical parameters in the example given above, the resulting coating 50 has a structure with recognizably separate coating layers 56a, 56b, 56c, 56d.

[0095] FIG. 7a shows this with calotte grinding on the surface 44 of a coated body 40. The interface regions between the coating layers 56a, 56b, 56c, 56d and formed by means of the intermediate etching steps can be seen as rings. In contrast, FIG. 7b shows a continuously produced coating after calotte grinding without such rings.

[0096] FIG. 7c is an SEM photo of the substrate material 52 with the coating layers 56a, 56b, 56c, 56d formed thereon. The interface regions are indicated by means of white frames. The respective change in coating morphology is difficult to discern in places at the magnification shown, but is clearer to see with a higher magnification (FIG. 7d). FIG. 7c and FIG. 7d show, the latter more clearly, that the coating morphology changes from a coarser structure to a substantially finer structure at least for the first interface region—viewed from the substrate surface. In the structure zone model according to Thornton, this corresponds to a change from structure zone 1 to structure zone T.

[0097] The surface of the coating 50 proves to be smooth, dense and largely free from pores. The tool 40 coated therewith therefore has a high resistance for different applications, in particular for machining purposes.

[0098] The coating 50 has a total thickness of approx. 12 μm. Whereas a reference coating applied using the same parameters but continuously exhibits very high coating residual stress and poor adhesion to the substrate material 52, the coating 50 with the same thickness only has a compressive stress of approx. −1.4 GPa and good coating adhesion.

[0099] Other possible embodiments can be taken from the table below, which specifies the coating materials, total coating thickness and the number of coating layers as well as the type of tool coated, its application and the workpiece material to be machined with said tool for various examples.

[0100] In the examples, coating layers that each have at least substantially the same thickness have been assumed for the sake of simplicity, i.e., for example, with a total coating thickness of 12 μm and 4 coating layers each 3 μm thick.

TABLE-US-00001 Coating Number of No. Coating thickness layers Tool Application Workpiece 1 AlTiN 12 μm 4 Indexable inserts Turning Steel, cast, stainless steel 2 AlTiN 12 μm 4 Indexable inserts Drilling Steel, cast, stainless steel 3 AlTiN 12 μm 4 Indexable inserts Milling Steel, cast, stainless steel 4 AlTiN 12 μm 4 Indexable inserts Grooving Steel, cast, stainless steel 5 AlTiN 4.5 μm 3 Solid carbide drills Drilling Steel, cast, stainless steel 6 AlTiN 3 μm 3 Solid carbide drills Drilling Steel, cast, stainless steel 7 AlTiN 1.5 μm 3 Solid carbide drills Drilling Steel, cast, stainless steel 8 AlTiN 1.0 μm 3 Solid carbide drills Drilling Steel, cast, (micro drills stainless steel with functional diameter < 1 mm) 9 AlTiN 0.6 μm 3 Solid carbide drills Drilling Steel, cast, (micro drills stainless steel with functional diameter < 1 mm) 10 AlTiN 0.6 μm 3 Reamers Reaming Steel, cast, stainless steel 11 AlTiN 3 μm 3 Solid carbide milling Milling Steel, cast, cutters stainless steel 12 AlTiN 1.5 μm 3 Solid carbide milling Milling Steel, cast, cutters stainless steel 13 AlTiN 1.0 μm 3 Solid carbide milling Milling Steel, cast, cutters (micro milling stainless steel cutters with functional diameter < 1 mm) 14 AlTiN 0.6 μm 3 Solid carbide milling Milling Steel, cast, cutters (micro milling stainless steel cutters with functional diameter < 1 mm) 15 TiAlSiN 12 μm 4 Indexable inserts Turning Stainless steel, titanium alloys, Ni-based alloys 16 TiAlSiN 12 μm 4 Indexable inserts Drilling Stainless steel, titanium alloys, Ni-based alloys 17 TiAlSiN 12 μm 4 Indexable inserts Milling Stainless steel, titanium alloys, Ni-based alloys 18 TiAlSiN 12 μm 4 Indexable inserts Grooving Stainless steel, titanium alloys, Ni-based alloys 19 TiAlSiN 4.5 μm 3 Solid carbide drills Drilling Stainless steel, titanium alloys, Ni-based alloys 20 TiAlSiN 3 μm 3 Solid carbide drills Drilling Stainless steel, titanium alloys, Ni-based alloys 21 TiAlSiN 1.5 μm 3 Solid carbide drills Drilling Stainless steel, titanium alloys, Ni-based alloys 22 TiAlSiN 1.0 μm 3 Solid carbide drills Drilling Stainless steel, (micro drills titanium alloys, with functional Ni-based alloys diameter < 1 mm) 23 TiAlSiN 0.6 μm 3 Solid carbide drills Drilling Stainless steel, (micro drills titanium alloys, with functional Ni-based alloys diameter < 1 mm) 24 TiAlSiN 0.6 μm 3 Reamers Reaming Stainless steel, titanium alloys, Ni-based alloys 25 TiAlSiN 3 μm 3 Solid carbide milling Milling Stainless steel, cutters titanium alloys, Ni-based alloys 26 TiAlSiN 1.5 μm 3 Solid carbide milling Milling Stainless steel, cutters titanium alloys, Ni-based alloys 27 TiAlSiN 1.0 μm 3 Solid carbide milling Milling Stainless steel, cutters (micro milling titanium alloys, cutters with functional Ni-based alloys diameter < 1 mm) 28 TiAlSiN 0.6 μm 0 Solid carbide milling Milling Stainless steel, cutters (micro milling titanium alloys, cutters with functional Ni-based alloys diameter < 1 mm) 29 TiB2 4 μm 4 Indexable inserts Turning Aluminum, non-ferrous metals 30 TiB2 4 μm 4 Indexable inserts Drilling Aluminum, non-ferrous metals 31 TiB2 4 μm 4 Indexable inserts Milling Aluminum, non-ferrous metals 32 TiB2 4 μm 4 Indexable inserts Grooving Aluminum, non-ferrous metals 33 TiB2 2 μm 3 Indexable inserts Turning Aluminum, non-ferrous metals 34 TiB2 2 μm 3 Indexable inserts Drilling Aluminum, non-ferrous metals 35 TiB2 2 μm 3 Indexable inserts Milling Aluminum, non-ferrous metals 36 TiB2 2 μm 3 Indexable inserts Grooving Aluminum, non-ferrous metals 37 TiB2 2 μm 3 Solid carbide drills Drilling Aluminum, non-ferrous metals 38 TiB2 1 μm 3 Solid carbide drills Drilling Aluminum, (micro drills non-ferrous with functional metals diameter < 1 mm) 39 TiB2 0.6 μm 3 Solid carbide drills Drilling Aluminum, (micro drills non-ferrous with functional metals diameter < 1 mm) 40 TiB2 0.6 μm 3 Reamers Reaming Aluminum, non-ferrous metals 41 TiB2 2 μm 3 Solid carbide milling Milling Aluminum, cutters non-ferrous metals 42 TiB2 1 μm 3 Solid carbide milling Milling Aluminum, cutters (micro milling non-ferrous cutters with functional metals diameter < 1 mm) 43 TiBs 0.6 μm 3 Solid carbide milling Milling Aluminum, cutters (micro milling non-ferrous cutters with functional metals diameter < 1 mm)

[0101] Although exemplary embodiments of the method have been given above merely by way of example, a person skilled in the art will recognize that the principle can be applied to various material systems, layer structures, coating types and coating parameters as well as to a wide variety of applications. Although the advantages have been presented above for particularly thick coatings 50, there can also be advantages for thin coatings, for example a coating with a total thickness of less than 1 μm on a very fine drill (micro drill) and formed, for example, of three coating layers each measuring 0.2 μm.

[0102] The PVD coating system 10 and, in particular, the assembly of magnetron cathodes 22a, 22b, 22c, 22d therein, as well as the electrical circuitry thereof, should merely be considered as examples. A different number of magnetron cathodes could alternatively be provided inside the vacuum chamber 12. Different cathodes could be connected to different types of electrical power supply, for example also to pure DC power supplies. As shown, the power supplies could be connected to the chamber wall or, alternatively, a separate anode that is electrically isolated from the chamber wall could be provided. For DC of the magnetron cathodes operation, in particular, it is preferable for the magnetron cathodes to be connected to an anode of this kind.