DETECTION CIRCUIT, ELECTROSTATIC HOLDING DEVICE AND METHOD FOR DETECTING A COMPONENT ON AN ELECTROSTATIC HOLDING DEVICE
20170236736 · 2017-08-17
Inventors
- Peter PREUSS (Gosen-Neu Zittau, DE)
- Gunnar HEINZE (Luebbenau, DE)
- Michael FALL (Berlin, DE)
- Alexander STEIN (Berlin, DE)
Cpc classification
H03L7/099
ELECTRICITY
G01R27/26
PHYSICS
H03L7/0805
ELECTRICITY
H03B5/08
ELECTRICITY
G01R31/2893
PHYSICS
International classification
H01L21/67
ELECTRICITY
H03B5/08
ELECTRICITY
H03L7/099
ELECTRICITY
Abstract
Detection circuit for detecting electrical capacitance of electrode device in electrostatic holding device with clamp carrier, particularly for detecting component held by holding device, includes phase control circuit couplable to electrode device and has reference oscillator device, phase comparator and VCO circuit (VCOC). Phase comparator is arranged to generate a control voltage of VCOC as a function of reference signal from reference oscillator device and of VCO feedback signal from VCOC, at least one phase control circuit is configured for controlling VCOC as a function of capacitance to be detected, and for outputting an output signal characteristic of capacitance based on control voltage of VCOC, phase control circuit is configured for connection to electrode device such that VCOC contains capacitance to be detected as frequency-determining component, and reference oscillator device is configured for generating reference signal with adjustable reference frequency. Electrostatic holding device includes at least one such detection circuit.
Claims
1. A detection circuit which is configured for detecting an electrical capacitance of an electrode device in an electrostatic holding device with a clamp carrier, comprising at least one phase control circuit which can be coupled to the electrode device and which has a reference oscillator device, a phase comparator and a voltage-controlled oscillator circuit (VCO circuit), wherein the phase comparator is arranged for generating a control voltage of the VCO circuit in dependency on a reference signal from the reference oscillator device and on a VCO feedback signal from the VCO circuit, and the at least one phase control circuit is configured for controlling the VCO circuit in dependency on the capacitance to be detected, and for outputting an output signal characteristic of the capacitance based on the control voltage of the VCO circuit, wherein the at least one phase control circuit is configured for a connection to the electrode device such that the VCO circuit contains the capacitance to be detected as a frequency-determining component, and the reference oscillator device is configured for generating the reference signal with an adjustable reference frequency.
2. The detection circuit according to claim 1, wherein the reference oscillator device comprises a reference oscillator and an oscillator processor, wherein the oscillator processor is configured for outputting the reference signal and for setting the reference frequency based on an output signal from the reference oscillator.
3. The detection circuit according to claim 2, wherein the oscillator processor is coupled to the phase comparator and is configured for calculating the reference frequency in dependency on a comparator output signal from the phase comparator.
4. The detection circuit according to claim 1, wherein the electrode device comprises measurement electrodes which can be coupled to the VCO circuit and indicate the capacitance contained in the VCO circuit when the detection circuit is coupled to the electrode device.
5. The detection circuit according to claim 1, wherein the electrode device comprises clamp electrodes for generating electrostatic holding forces, which can be coupled to the VCO circuit and determine the capacitance contained in the VCO circuit when the detection circuit is coupled to the electrode device.
6. The detection circuit according to claim 1, wherein the VCO circuit can be coupled to the electrode device via blocking condensers, wherein the at least one phase control circuit is configured for operation at a lower voltage potential than the electrode device.
7. The detection circuit according to claim 6, wherein a protection circuit is provided which is configured for protecting the at least one phase control circuit against voltage peaks.
8. The detection circuit according to claim 1, wherein the electrode device and a voltage source can be coupled to the VCO circuit for loading the electrode device with a clamp voltage, such that the VCO circuit can be operated at the same voltage potential as the electrode device.
9. The detection circuit according to claim 8, wherein the VCO circuit is galvanically separated from other components of the at least one phase control circuit.
10. The detection circuit according to claim 8, wherein an entirety of the at least one phase control circuit is configured for operation on the same voltage potential as the electrode device.
11. The detection circuit according to claim 1, which is configured for detecting a component held by the electrostatic holding device.
12. An electrostatic holding device which is configured for holding a component by electrostatic holding forces, comprising a clamp carrier which is configured to receive the component, an electrode device with at least one pair of clamp electrodes configured for generating electrostatic holding forces, and at least one detection circuit according to claim 1 which is coupled to the electrode device.
13. The electrostatic holding device according to claim 12, wherein the electrode device comprises several pairs of clamp electrodes and several detection circuits are provided, wherein each pair of clamp electrodes is coupled to one of the detection circuits, respectively.
14. The electrostatic holding device according to claim 12, wherein a voltage source is connected to the electrode device via inductances or gyrator circuits.
15. A method for detecting a component which is held by an electrostatic holding device according to claim 12, comprising the steps (A) output of the output signal of the at least one phase control circuit which is characteristic of the capacitance, and (B) analysis of the output signal with detection of at least one of a placing and a clamped state of the component on the electrostatic holding device.
16. The method according to claim 15, wherein the reference frequency of the reference oscillator device is set in dependency on an output signal from the phase comparator such that the VCO circuit is operated in a capture range of the at least one phase control circuit.
17. The method according to claim 16, wherein the reference frequency of the reference oscillator device in a first operating phase is set to detect the placing of the component on the electrostatic holding device, and in a second operating phase, if the placing of the component on the electrostatic holding device has been detected, to detect the clamped state of the component on the electrostatic holding device.
18. The method according to claim 16, wherein the electrode device comprises several pairs of clamp electrodes and several detection circuits are provided, wherein each pair of clamp electrodes is coupled to one of the detection circuits, and the analysis of the output signal from the detection circuits comprises detection of the position of the component on the clamp carrier.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Further details and advantages of the invention are described below with reference to the enclosed drawings. These show in:
[0034]
[0035]
[0036]
[0037]
[0038]
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
[0039] Features of preferred embodiments of the invention are described below with reference to the electrical configuration of the detection circuit in conjunction with an electrostatic holding device. Details of the electrostatic holding device, in particular the mechanical and geometric structure of the clamp carrier and the embedding of the electrode device in the clamp carrier, and its operation, in particular the reception, movement and deposit of components, in particular semiconductor wafers, are not described since these are known from the prior art. The clamp carrier may in particular have receiving surfaces which are flat on one or both sides and each of which is provided to receive a component. Although the invention is described with reference to the holding of semiconductor wafers as an example, the use of the invention is not restricted to the holding of wafers but it may also be used with other components.
[0040]
[0041] The electrode device 210 embedded in the clamp carrier 220 comprises at least two clamp electrodes 212 (shown as condenser plates) which provide the capacitance 211 to be detected and are connected to the voltage source 230 via inductances 213. The inductances 213 serve to supply the charge current to the electrode device 210. They are selected such that no resonance arises in cooperation with the capacitance 211, and their value amounts for example to 10 mH to 100 mH. The inductances 213 constitute chokes which decouple the clamp electrodes for alternating current voltage from the voltage source 230 and block undesirable voltage peaks from the voltage source 230. The voltage source 230 is configured to generate a high voltage. The voltage applied at the clamp electrodes of the electrode device 210 is for example +/−3000 V.
[0042] The detection circuit 100 is configured to detect the capacitance change in both operating phases of placing of the wafer 1 on the clamp carrier 220 and of transition into the clamped state, and hence to detect the state of the wafer 1. The capacitance 211 when the clamp carrier 220 is empty amounts for example to 600 pF, and when the clamp carrier 220 is occupied by a wafer 1 (see
[0043] The detection circuit 100 comprises the phase control circuit 110, the blocking condensers 120 and the protection circuit 130. The blocking condensers 120 form a series circuit with the capacitance 211 to be detected of the electrode device 210, wherein the blocking condensers 120 are arranged for potential separation of the phase control circuit 110 from the electrode device 210. The blocking condensers 120 for example have a capacitance of 680 pF. The protection circuit 130 comprises two varistors which are switched conductively when voltage peaks occur at the blocking condensers 120 against ground potential. For example, 6V varistors are used which form a short-circuit to ground potential on voltage peaks above a voltage of 6 V.
[0044] The phase control circuit 110 comprises a reference oscillator device with a reference oscillator 111 and an oscillator processor 112, a phase comparator 113, a VCO circuit 114, a low-pass filter 115 and an analogue-digital converter 116.
[0045] The reference oscillator 111 comprises for example a quartz oscillation circuit, the output signal of which has a base frequency of for example 8 MHz. The output signal is processed by the oscillator processor 112 for output of the reference signal with the reference frequency F.sub.ref. For this, the oscillator processor 112 contains for example a frequency splitter which is controlled as a function of a locked state signal derived from the comparator output signal. Further information on the situation of the detection range of the phase control circuit is given for example by the analogue-digital converter 116.
[0046] The VCO circuit 114 is a voltage-controlled oscillator, wherein the frequency-determining component of which is provided by the capacitance 211 of the electrode device 210. For this, the blocking condensers 120 are connected to the VCO circuit 114. The VCO circuit 114 gives a VCO feedback signal with a VCO frequency F.sub.VCO. The VCO feedback signal with the VCO frequency F.sub.VCO and the reference signal with the reference frequency F.sub.ref are applied at the inputs to the phase comparator 113, the comparator output signal Ph from which is characteristic for the phase error between the two frequencies F.sub.VCO and F.sub.ref. The low-pass filter 115 delivers a direct voltage U.sub.LP based on the phase error Ph, which voltage is characteristic of the phase error and is given as an input parameter firstly to the VCO circuit 114 and secondly to the analogue-digital converter 116. For the VCO circuit 114, the direct voltage U.sub.LP serves as a control voltage for tracking the VCO frequency. In locked state, the direct voltage U.sub.LP also gives the desired information on the capacitance 211 to be detected, or on the state of the wafer 1 to be detected. The analogue-digital converter 116 provides information on the locked state of the phase control circuit 110 which is used to control the oscillator processor 112.
[0047] The locked state of the phase control circuit 110 is detected so as to check whether the direct voltage U.sub.LP lies in the middle of a predefined detection range, and corresponds for example to half the operating voltage of the VCO circuit 114. This test may be carried out software-based with the oscillator processor 112. If said condition is not fulfilled, the reference frequency F.sub.ref is changed using the oscillator processor 112 until the locked state is detected (e.g. detection of a locked signal with oscillator processor 112).
[0048] The series connection of the capacitance 211 to be detected and the blocking condensers 120 forms a total capacitance C.sub.RF which determines the frequency of the VCO circuit 114. The capacitance C.sub.RF is calculated as follows:
C.sub.RF=[C.sub.A.sup.−1+C.sub.B.sup.−1+(C.sub.211+ΔC.sub.211).sup.−1].sup.−1,
[0049] wherein C.sub.A and C.sub.B are the capacitances of the blocking condensers 120, and C.sub.211 is the capacitance value of the capacitance 211 to be detected.
[0050] Detection of the capacitance gives a linear dependency of the direct voltage U.sub.LP on the capacitance C.sub.RF in the VCO circuit 114 when the phase control circuit 110 is in the locked state. The linear dependency may be used both to detect the locked state and to determine the amount of the capacitance 211 to be detected.
[0051] One advantage of the first embodiment of the invention according to
[0052] The value of the voltage U.sub.LP is provided as information to an external device for signal analysis, in particular an external control device, in order to detect whether the wafer 1 is placed on the clamp carrier 220 and the high voltage can be switched on, and whether, after switching on the high voltage, the wafer 1 is in the clamped state. If the clamped state has been detected, the electrostatic holding device 200 may be operated, e.g. the wafer 1 may be moved to a station in a processing line for semiconductor processing. Alternatively, these steps may be performed by the oscillator processor 112.
[0053] The diagrammatic depiction of the first embodiment of the invention in
[0054] The first embodiment of the invention according to
[0055]
[0056] According to
[0057] By deviation from the first embodiment according to
[0058] Furthermore, if the entire detection circuit 100 is laid to high voltage potential, this can also be provided as an integral component of the clamp carrier 220. Here the phase control circuit 110 is operated as described above with reference to
[0059]
[0060] The part electrodes of each pair of clamp electrodes 212, 212A are each loaded with the same bipolar high voltage. For this, both clamp electrodes are connected via inductances 213 to the same high-voltage source 230. The inductances 213 prevent a short-circuit for alternating current voltage in the detection circuit 100 since they have a choke effect for voltage peaks.
[0061]
[0062]
[0063] According to a further variant of an electrostatic holding device with several clamp electrodes 212, 212A, these are connected together in nested fashion as illustrated schematically in
[0064] The features of the invention disclosed in the description above, the drawings and the claims may be important, both individually and in combination or sub-combination, for implementing the invention in its various embodiments.