PSRR control loop with configurable voltage feed forward compensation

Abstract

The present document relates to the compensation of voltage variations within power converters. A driver circuit for a solid state light source is described. The driver circuit comprises a switched-mode power converter comprising a switch; wherein the switched-mode power converter is configured to convert an input voltage at an input of the switched-mode power converter into an output voltage at an output of the switched-mode power converter. Furthermore, the driver circuit comprises current sensing means configured to determine a sensed current signal indicative of a current through the switch; and voltage sensing means configured to determine a sensed voltage signal indicative of the input voltage. In addition, the driver circuit comprises a control unit configured to determine a gate control signal for putting the switch into an off-state, based on the sensed current signal and based on the sensed voltage signal.

Claims

1. A driver circuit for a solid state light source, wherein the driver circuit comprises a switched-mode power converter comprising a switch; wherein the switched-mode power converter is configured to convert an input voltage at an input of the switched-mode power converter into an output voltage at an output of the switched-mode power converter; a current sensing circuit configured to determine a sensed current signal indicative of a current through the switch; voltage sensing circuit configured to determine a sensed voltage signal indicative of the input voltage; and a control unit configured to determine a gate control signal for putting the switch into an off-state, based on the sensed current signal and based on the sensed voltage signal, such that a degree of modulations comprised within the output voltage and/or a degree of modulations comprised within a current provided at the output of the switched-mode power converter is reduced with respect to a degree of modulations comprised within the input voltage, wherein the control unit is configured to compensate for a delay between a first time instant when the sensed current signal is determined and a second time instant when the switch is put into the off-state, subject to the gate control signal which corresponds to the sensed current signal at the first time instant.

2. The driver circuit of claim 1, wherein the control unit is configured to determine an estimate of the current through the switch at the second time instant based on the sensed current signal at the first time instant, using the sensed voltage signal.

3. The driver circuit of claim 1, wherein the switched-mode power converter comprises an inductor having an inductance L, arranged in series with the switch; and the control unit is configured to compensate for the delay also based on the inductance L.

4. The driver circuit of claim 3, wherein the control unit is configured to determine an estimate of the current through the switch at the second time instant based on the rule $\mathrm{Id}=\frac{\mathrm{Vin}\times \mathrm{Td}}{L}$ wherein Vin is the input voltage, Td is the delay and Id is an offset between the sensed current signal at the first time instant and the estimate of the current through the switch at the second time instant.

5. The driver circuit of claim 1, wherein the control unit comprises a transistor arranged in series with a first resistor, wherein the transistor is controlled using the sensed voltage signal, thereby yielding a first signal; a reference unit configured to offset the first signal, thereby yielding a correction signal; and a comparator unit configured to compare the sensed current signal with the correction signal to yield an offset current signal; wherein the gate control signal is determined based on the offset current signal.

6. The driver circuit of claim 5, wherein the reference unit comprises a reference resistor and a reference current source arranged in parallel to the transistor and the first resistor; and the reference resistor and/or the reference current source depend on the inductance L.

7. The driver circuit of claim 5, wherein the control unit comprises a fine tuning unit configured to compensate for temperature variations and/or for component variations.

8. The driver circuit of claim 1, wherein the control unit comprises an analog-to-digital converter for converting the sensed current signal and the sensed voltage signal into respective digital signals; and the control unit is configured to determine the gate control signal in the digital domain based on the digital signals.

9. The driver circuit of claim 1, wherein the current sensing circuit comprise a current sensing resistor arranged in series to the switch.

10. The driver circuit of claim 1, wherein the voltage sensing circuit comprise a voltage divider arranged in parallel to the input of the switched-mode power converter; and/or an auxiliary winding of a transformer comprised within the switched-mode power converter.

11. The driver circuit of claim 1, wherein the switched-mode power converter comprises one or more of: a flyback converter, a buck converter, a boost converter, a buck-boost converter, and a single-ended primary-inductor converter.

12. The driver circuit of claim 1, further comprising an output capacitor at the output of the switched-mode power converter, configured to store an electrical charge to be provided to the solid state light source; wherein the driver circuit is configured to transfer electrical energy from an inductor of the switched-mode power converter to the output capacitor during the off-state of the switch.

13. A light bulb assembly comprising: a housing; a solid state light source, located within the housing; an electrical connection module, attached to the housing, and adapted for connection to a mains supply; and a driver circuit, located within the housing, connected to receive an electricity supply signal from the electrical connection module, and operable to supply an output voltage to the light source, wherein the driver circuit comprises a switched-mode power converter comprising a switch; wherein the switched-mode power converter is configured to convert an input voltage at an input of the switched-mode power converter into an output voltage at an output of the switched-mode power converter; a current sensing circuit configured to determine a sensed current signal indicative of a current through the switch; a voltage sensing circuit configured to determine a sensed voltage signal indicative of the input voltage; and a control unit configured to determine a gate control signal for putting the switch into an off-state, based on the sensed current signal and based on the sensed voltage signal, such that a degree of modulations comprised within the output voltage and/or a degree of modulations comprised within a current provided at the output of the switched-mode power converter is reduced with respect to a degree of modulations comprised within the input voltage, wherein the control unit is configured to compensate for a delay between a first time instant when the sensed current signal is determined and a second time instant when the switch is put into the off-state, subject to the gate control signal which corresponds to the sensed current signal at the first time instant.

14. A method for operating a driver circuit, the method comprising controlling a switch of a switched-mode power converter such that an input voltage at an input of the switched-mode power converter is converted into an output voltage at an output of the switched-mode power converter; determining a sensed current signal indicative of a current through the switch; determining a sensed voltage signal indicative of the input voltage; and determining a gate control signal for putting the switch into an off-state, based on the sensed current signal and based on the sensed voltage signal, such that a degree of modulations comprised within the output voltage and/or a degree of modulations comprised within a current provided at the output of the switched-mode power converter is reduced with respect to a degree of modulations comprised within the input voltage wherein the control unit compensates for a delay between a first time instant when the sensed current signal is determined and a second time instant when the switch is put into the off-state, subject to the gate control signal which corresponds to the sensed current signal at the first time instant.

15. The method for operating a driver circuit of claim 14, wherein the control unit determines an estimate of the current through the switch at the second time instant based on the sensed current signal at the first time instant, using the sensed voltage signal.

16. The method for operating a driver circuit of claim 14, wherein the switched-mode power converter comprises an inductor having an inductance L, arranged in series with the switch; and the control unit compensates for the delay also based on the inductance L.

17. The method for operating a driver circuit of claim 16, wherein the control unit determines an estimate of the current through the switch at the second time instant based on the rule $\mathrm{Id}=\frac{\mathrm{Vin}\times \mathrm{Td}}{L}$ wherein Vin is the input voltage, Td is the delay and Id is an offset between the sensed current signal at the first time instant and the estimate of the current through the switch at the second time instant.

18. The method for operating a driver circuit of claim 14, wherein the control unit comprises a transistor arranged in series with a first resistor, wherein the transistor is controlled using the sensed voltage signal, thereby yielding a first signal; a reference unit which offsets the first signal, thereby yielding a correction signal; and a comparator unit which compares the sensed current signal with the correction signal to yield an offset current signal; wherein the gate control signal is determined based on the offset current signal.

19. The method for operating a driver circuit of claim 18, wherein the reference unit comprises a reference resistor and a reference current source arranged in parallel to the transistor and the first resistor; and the reference resistor and/or the reference current source depend on the inductance L.

20. The method for operating a driver circuit of claim 18, wherein the control unit comprises a fine tuning unit which compensates for temperature variations and/or for component variations.

21. The method for operating a driver circuit of claim 14, wherein the control unit comprises an analog-to-digital converter for converting the sensed current signal and the sensed voltage signal into respective digital signals; and the control unit determines the gate control signal in the digital domain based on the digital signals.

22. The method for operating a driver circuit of claim 14, wherein the current sensing circuit comprise a current sensing resistor arranged in series to the switch.

23. The method for operating a driver circuit of claim 14, wherein the voltage sensing circuit comprise a voltage divider arranged in parallel to the input of the switched-mode power converter; and/or an auxiliary winding of a transformer comprised within the switched-mode power converter.

24. The method for operating a driver circuit of claim 14, wherein the switched-mode power converter comprises one or more of: a flyback converter, a buck converter, a boost converter, a buck-boost converter, and a single-ended primary-inductor converter.

25. The method for operating a driver circuit of claim 14, further comprising an output capacitor at the output of the switched-mode power converter, to store an electrical charge to be provided to the solid state light source; wherein the driver circuit transfers electrical energy from an inductor of the switched-mode power converter to the output capacitor during the off-state of the switch.

Description

SHORT DESCRIPTION OF THE FIGURES

(1) The invention is explained below in an exemplary manner with reference to the accompanying drawings, wherein

(2) FIG. 1a illustrates a block diagram of an example light bulb assembly;

(3) FIG. 1b illustrates the impact of an example delay on the sensed current of the switch of a switched-mode power converter;

(4) FIG. 2 illustrates a block diagram of an example power converter;

(5) FIG. 3 shows a circuit diagram of an example driver circuit;

(6) FIG. 4 illustrates example experimental results; and

(7) FIG. 5 shows a flow chart of an example method for operating a driver circuit.

DETAILED DESCRIPTION

(8) In the present document, a light bulb “assembly” includes all of the components required to replace a traditional incandescent filament-based light bulb, notably light bulbs for connection to the standard electricity supply. In British English (and in the present document), this electricity supply is referred to as “mains” electricity, whilst in US English, this supply is typically referred to as power line. Other terms include AC power, line power, domestic power and grid power. It is to be understood that these terms are readily interchangeable, and carry the same meaning.

(9) Typically, in Europe electricity is supplied at 230-240 VAC, at 50 Hz (mains frequency) and in North America at 110-120 VAC at 60 Hz (mains frequency). The principles set out in the present document apply to any suitable electricity supply, including the mains/power line mentioned, and a DC power supply, and a rectified AC power supply.

(10) FIG. 1a is a schematic view of a light bulb assembly. The assembly 1 comprises a bulb housing 2 and an electrical connection module 4. The electrical connection module 4 can be of a screw type or of a bayonet type, or of any other suitable connection to a light bulb socket. Typical examples for an electrical connection module 4 are the E11, E14 and E27 screw types of Europe and the E12, E17 and E26 screw types of North America. Furthermore, a light source 6 (also referred to as an illuminant) is provided within the housing 2. Examples for such light sources 6 are a CFL tube or a solid state light source 6, such as a light emitting diode (LED) or an organic light emitting diode (OLED) (the latter technology is referred to as solid state lighting, SSL). The light source 6 may be provided by a single light emitting device, or by a plurality of LEDs.

(11) Driver circuit 8 is located within the bulb housing 2, and serves to convert supply electricity received through the electrical connection module 4 into a controlled drive current for the light source 6. In the case of a solid state light source 6, the driver circuit 8 is configured to provide a controlled direct drive current to the light source 6.

(12) The housing 2 provides a suitably robust enclosure for the light source and drive components, and includes optical elements that may be required for providing the desired output light from the assembly. The housing 2 may also provide a heat-sink capability, since management of the temperature of the light source may be important in maximising light output and light source life. Accordingly, the housing is typically designed to enable heat generated by the light source to be conducted away from the light source, and out of the assembly as a whole.

(13) FIG. 2 illustrates a block diagram of an example switched-mode power converter 200. In the illustrated example, the power converter 200 is a flyback converter comprising a transformer 201. Other examples for switched-mode power converters are buck converters, boost converters, buck-boost converters or Single-ended primary-inductor converters (SEPIC). The switched-mode power converter 200 is configured to convert an input voltage 230 into an output voltage 231 for a light source 6 (not illustrated). The power converter 200 comprises a switch 202 (e.g. a transistor such as a metal oxide semiconductor, MOS, field effect transistor, FET). The switch 202 is controlled via a gate control signal 232 (e.g. a gate voltage) which is configured to put the switch 202 into an on-state and an off-state in an alternating rate at a commutation cycle rate (e.g. 100 kHz) and with a particular duty cycle (wherein the duty cycle indicates the duration of an on-state relative to the duration of a commutation cycle). Furthermore, the power converter 200 comprises a diode 204 which is configured to prevent a reverse energy flow from the output of the power converter 200 to the input of the power converter 200 during an off-state of the switch 202.

(14) The power converter 200 (in particular the switch 202) may be controlled using a regulator 206. The regulator 206 may receive a regulator input signal 235 which is derived from a current Is through the switch 202 (i.e. a current through the primary side P1 of the transformer 201 which is arranged in series to the switch 202). The current Is through the switch 202 may be determined using current sensing means 203. In the illustrated example, the current sensing means 203 comprise a shunt resistor arranged in series with the switch 202, thereby providing a sensed current signal 233 (which corresponds to the voltage drop across the shunt resistor 203, i.e. which is proportional to the current through the switch 202).

(15) The regulator 206 may be configured to generate the gate control signal 232 based on the regulator input signal 235 which may be derived from the current Is through the switch 202. By way of example, the regulator 206 may be configured to turn off the switch 202 once the current Is through the switch 202 has received a pre-determined peak current Ip. Typically, the control loop from the current sensing means 203 via the regulator 206 to the gate of the switch 202 comprises an overall delay Td which may be in the range of e.g. 200 ns or 250 ns. As a result of such a delay Td, the gate control signal 232 at a time instant T which is generated based on a sensed current signal 233 at the time instant T-Td may not ensure that the switch 202 is put to the off-state at the time instant when the current Is through the switch 202 reaches the pre-determined peak current Ip.

(16) Furthermore, it should be noted that the input voltage 230 of FIG. 2 of the power converter 200 may comprise modulations which may be due to various sources, e.g. due to a rectifier comprised within the driver circuit 8 of the light bulb assembly 1, and/or due to distortions comprised within the mains supply which may be due to the use of a phase-cut dimmer. These modulations of the input voltage 230 may lead to modulations of the output voltage 231 and modulations of the current provided to the light source 6, which could cause undesirable flickering effects at the light source 6. This is illustrated in FIG. 4, where it can be seen how a modulation 400 of the input voltage 230 leads to a modulation 401 of the output voltage 231.

(17) As such, it is desirable to enable a regulation of the power converter 200 of FIG. 2 (using the regulator 206) which allows compensating such modulations of the input voltage 230. As indicated above, the switch 202 should be regulated such that the switch 202 is turned off as soon as the current Is through the switch 202 reaches the pre-determined peak current Ip. For this purpose, a sensed current signal 233 is determined. The regulator 206 may be configured to take into account the (fixed) delay Td of the regulation loop when generating the gate control signal 232 (e.g. the gate voltage) for controlling the state of the switch 202. This delay Td may be used to determine an estimate of the current Is through the switch 202 at a time instant T, when the sensed current signal 233 at the time instant T-Td is known.

(18) This is illustrated in FIG. 1b. The current through the switch 202 ramps up according to a ramp 101 which depends on the inductance L of the transformer 201. The regulator 206 may make use of the ramp 101 to determine an estimate 111 of the current Is through the switch 202 at time instant T based on a sensed current signal 112, 233 at time instant T-Td, with Td being illustrated by reference numeral 103. As such, under the assumption of a stable input voltage 230, the regulator 206 may compensate the delay Td 103 using the ramp 101.

(19) However, as indicated above, the input voltage 230 cannot typically be regarded as being stable. The input voltage 230 typically comprises modulations, notably in cases where the mains supply has been submitted to a phase-cut dimmer. As a result, the ramp 101 of FIG. 1b may vary. This may be seen when analyzing the circuit diagram of FIG. 2. When the switch 202 is in on-state, the current Is through the switch 202 is given by

(20) $L\times \frac{d\mathrm{Is}}{dt}=V$

(21) wherein the voltage V may be approximated by the input voltage Vin 230. As such, the current Is through the switch 202 is given by

(22) $\mathrm{Is}=\int \frac{\mathrm{Vin}}{L}dt=\frac{\mathrm{Vin}\times T}{L}$

(23) wherein T represents a time interval. It should be noted that there may be other factors, which have an influence of the delay and behavior of the control loop. The above mentioned equation typically shows the most dominant factor. A fine tuning of the control loop, which takes into account other factors may e.g. be performed during printed circuit board (PCB) calibration of the driver circuit and/or during calibration of the assembled light bulb. During calibration, the second order effects can be adjusted. Hence, the current Is through the switch 202 also depends on the input voltage Vin 230 and variations of the input voltage Vin 230 lead to variations of the ramp 101. This is illustrated in FIG. 1b where a second ramp 102 is illustrated, wherein the input voltage 230 for ramp 102 is higher than the input voltage 230 for ramp 101. It can be seen that due to the higher input voltage 230 (and the resulting higher slope of ramp 102), the current offset Id1 between the current Is through the switch 202 at time instant T and the sensed current signal 233 at time instant T-Td differs from the current offset Id2 for the lower input voltage 230 (corresponding to ramp 101). The current offset Id for the delay Td may be expressed as

(24) $\mathrm{Id}=\frac{\mathrm{Vin}\times \mathrm{Td}}{L}$

(25) As a consequence, the regulator 206 cannot correctly compensate the delay Td 103 if only the sensed current signal 233 is known, because the current offset Id also depends on the input voltage 230. In view of this, it is proposed to make the regulation of the switch 202 (notably for the determination of the switch-off time instants for the switch 202) also dependent on the input voltage 230. For this purpose, input voltage sensing means 207 may be provided which are configured to determine a sensed voltage signal 234 which is indicative of (e.g. proportional to) the input voltage 230. In the illustrated example of FIG. 2, the input voltage sensing means 207 comprise a voltage divider with the resistors 208, 209. Furthermore, the input voltage sensing means 207 may comprise a current source 210 which is configured to offset the sensed voltage signal 234 (e.g. for tuning purposes). In addition, the input voltage sensing means 207 may comprise an operational amplifier 211 for amplifying/offsetting the sensed voltage signal 234.

(26) As such, the gate control signal 232 may be determined based on the sensed current signal 233 and based on the sensed voltage signal 234. By doing this, it can be ensured that during regulation the correct offset Id is taken into account when compensating for the delay Td of the regulation loop (also referred to as control loop). The regulation may be performed in an analog manner (as illustrated e.g. in FIG. 2) or in a digital manner (as illustrated e.g. in FIG. 3).

(27) FIG. 2 illustrates an example regulation loop which is configured to compensate the voltage dependence of the offset current Id in the analog domain. The sensed voltage signal 234 (which is indicative of the input voltage 230) may be used to control a transistor 212 which is used in its linear region, i.e. which is used as a current source. By doing this, a correction signal 236 may be generated which is used to offset the sensed current signal 233, thereby yielding the offset current signal 235 as an input to the regulator 206. A comparator unit 205 (e.g. an operational amplifier) may be used to determined the offset current signal 235 by offsetting the sensed current signal 233 with the correction signal 236.

(28) The effect of the correction signal 236 is illustrated in FIG. 1b. If it is assumed that the sensed current signal 233 corresponds to the current 112, the offset current signal 235 may be such that in case of a first input voltage 230 (corresponding to ramp 101), the offset current signal 235 corresponds to current 111; and that in case of a second input voltage 230 (corresponding to ramp 102), the offset current signal 235 corresponds to current 110. As a result, the regulator 206 may determine the gate control signal 232 based on the offset current signal 235, wherein the offset current signal 235 takes into account variations of the input voltage 230. This leads to a control of the switch 202 which allows compensating for variations of the input voltage 230. This is illustrated in FIG. 4 which shows the output voltage 402 obtained when taking into account the input voltage 230 for controlling the switch 202. It can be seen that the modulations of the input voltage 230 can be compensated by the regulator 206, thereby yielding a stable output voltage 402 in FIG. 4 and 231 in FIG. 2.

(29) The generation of the correction signal 236 may make use of various tuning components. In particular, an operational point of the correction signal 236 may be set using the reference circuitry 214, 215. The reference circuitry 214, 215 comprises a resistor 214 and a voltage source 215. The reference circuitry 214, 215 is configured to offset the signal provided by the current source 212, thereby offsetting the correction signal 236 by a pre-determined amount. Hence, the sensed voltage signal 234 may control the current source 212 via the operational amplifier 211 such that the sensed voltage signal 234 is converted into a current which may offset a reference current provided by the reference circuitry 214, 215, thereby yielding the correction signal 236.

(30) Furthermore, fine tuning circuitry 216 may be used to fine tune the correction signal 236. The fine tuning circuitry 216 may be adjusted during a calibration phase of the light bulb assembly 1. The fine tuning circuitry 216 comprises e.g. a sample-and-hold unit 220, 218 which is configured to sample the sensed current signal 233 at a particular time instant. The sampled signal may be compared (using a comparing unit 217) to the signal provided by the voltage source 215, and the difference signal may be used to control an adjustable resistor 213 (using the control unit 220), thereby adjusting the correction signal 236. FIG. 2 shows an example analog implementation for fine tuning. Typically such a circuit is not able to make a 100% calibration, because the fine tuning circuitry 216 does not have direct access to the delay of the external switch 202. The delay caused by the external switch 202 can e.g. be eliminated by system calibration or by an additional compensation, which can be programmable.

(31) As indicated above, the voltage-dependent control of the switch 202 may alternatively or in addition be performed in the digital domain. This is illustrated in FIG. 3. FIG. 3 shows a circuit diagram of an example driver circuit 300, 8 of a light bulb assembly 1. The driver circuit 300 comprises an electromagnetic interference (EMI) filter unit 301 and a rectifier 302, in order to generate a rectified voltage from the main supply 330. Furthermore, the driver circuit 300 comprises a controller 306 which is configured to control a two-stage power converter. The controller 306 may be started using the start-up resistor 305. In the illustrated example, the driver circuit 300 comprises a two-state power converter with the first stage being a Boost converter 304 and the second stage being a flyback converter as shown e.g. in FIG. 2. The flyback converter of FIG. 3 comprises a transformer 307 having an additional auxiliary coil for measurement purposes. The auxiliary winding may be used to provide information to the controller 306 regarding the output voltage 231 of the driver circuit 300. Furthermore, the driver circuit 300 comprises an output capacitor (or storage capacitor) 308 which stores the energy to be provided to the light source 6, 309.

(32) In a similar manner to FIG. 2, the input voltage 230 (which in FIG. 3 is the input voltage to the second converter stage) is sensed using input voltage sensing means 208, 209, thereby providing the sensed voltage signal 234. Furthermore, the sensed current signal 233 is determined using current sensing means 203. The controller 306 may be configured to determine a gate control signal 232 for putting the switch 202 of the second converter stage into an off-state once the current Is through the switch 202 reaches a pre-determined peak current Ip. For this purpose, the controller 306 may make use of the sensed current signal 233 and of the sensed voltage signal 234, thereby ensuring that variations of the input voltage 230 can be compensated and corresponding variations of the output voltage 231 may be reduced or avoided, thereby reducing or preventing a flickering effect of the light source 309.

(33) As outlined above, in the present document, a power converter and a driver circuit for solid state light sources are described. Furthermore, control schemes for controlling the one or more switches comprised within the power converter/driver circuit are described.

(34) Due to safety isolation requirements which have to be met by light bulb assemblies 1, the current through the light source 6, 309 cannot typically be sensed and regulated directly. For this so called “primary side control” techniques may be used which regulate the current through the light source 6, 309 indirectly using signal processing. As outlined above, the current Is through the power converter switch 202 may be used to regulator the current through the light source 6, 309. These indirect methods are limited in accuracy and dynamic range. In particular, the chain of propagation delays between turn-on of the power switch 202 and the sensing of the respective current Is may cause a substantial impact of the input voltage 230 onto the current provided to the light source 6, 309. As a consequence, the light-output may be subject to flicker and inaccuracies. To overcome these limits it is proposed to introduce a feedforward compensation path. The feedforward compensation path may make use of a sensed voltage signal 234 which is indicative of the input voltage 230, thereby maintaining the current through the light source 6, 309 virtually constant for a wide range of input voltages 230. Furthermore, the feedforward compensation path may use calibration data for maintaining the current through the light source 6, 309 virtually constant for a wide range of input voltages 230.

(35) Notably when using digital regulators 206, 306 dead times or delays Td may occur. The dead times produce an incorrect measurement of the current through the light source 6, 309 by only measuring the primary side transformer current Is. As outlined above, a compensation of the dead times may be used to obtain an accurate estimate of the current at the primary side.

(36) It is proposed to compensate the delay Td in the regulation loop (e.g. caused by the operational amplifier 205 in FIG. 2, by the driver of the FET switch 202 and/or by the regulator 206). The delay Td is typically a constant value, without considering variations caused by the manufacturing process and the temperature. As outlined in conjunction with FIG. 1b, the current at the shunt resistor 203 typically depends on the input voltage Vin 230 and on the time constant L of the coil of the transformer 201. A reference (i.e. the correction signal 236) of the comparator 205 may be modulated in respect of the input voltage 230 and thereby generates an offset current signal 235, which may be used for a stable regulation of the switch 202.

(37) The optional circuit 216 may allow for a fine tuning for manufacturing process variations and/or for temperature drifts. Additionally or alternatively, a fine tuning can be performed during a circuit test and/or a calibration of the light bulb assembly 1. In other words, fine tuning can also be done with OTP (one time programmable) or Flash EEPROM or other programming storage calibration.

(38) FIG. 5 shows a flow chart of an example method 500 for operating a driver circuit 300. The method 500 comprises the step of controlling 501 a switch 202 of a switched-mode power converter 200, such that an input voltage 230 at an input of the switched-mode power converter 200 is converted into an output voltage 231 at an output of the switched-mode power converter 200. Furthermore, the method 500 comprises the step of determining 502 a sensed current signal 233 indicative of a current through the switch 202, and the step of determining 503 a sensed voltage signal 234 indicative of the input voltage 230. In addition, the method comprises the step of determining 504 a gate control signal 232 for putting the switch 202 into an off-state, based on the sensed current signal 233 and based on the sensed voltage signal 234, such that a degree of modulations comprised within the output voltage 231 and/or a degree of modulations comprised within a current provided at the output of the switched-mode power converter 200 is reduced with respect to a degree of modulations comprised within the input voltage 230.

(39) It should be noted that the description and drawings merely illustrate the principles of the proposed methods and systems. Those skilled in the art will be able to implement various arrangements that, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope.

(40) Furthermore, all examples and embodiment outlined in the present document are principally intended expressly to be only for explanatory purposes to help the reader in understanding the principles of the proposed methods and systems. Furthermore, all statements herein providing principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass equivalents thereof.