INTEGRATED CIRCUIT WITH AUXILIARY ELECTRICAL POWER SUPPLY PINS

Abstract

Disclosed is an integrated circuit (1) including two electrical power supply terminals (2a, 2b), respectively positive and ground, forming part of a first electrical power supply system (2) internal to the integrated circuit and providing its electrical power supply using an electrical power supply source external to the integrated circuit. The integrated circuit includes two pins (3a, 3b), respectively positive and ground, forming part of a second electrical power supply system (3) and providing an auxiliary electrical connection of the integrated circuit with the outside, the second power supply system being in parallel with the first power supply system, the first power supply system being open when the second power supply system is closed and vice versa.

Claims

1. Integrated circuit (1) comprising two electrical power supply terminals (2a, 2b), respectively positive and ground, forming part of a first electrical power supply system (2) internal to the integrated circuit (1) and providing its electrical power supply using an electrical power supply source external to the integrated circuit (1), the integrated circuit further comprising two pins (3a, 3b), respectively positive and ground, forming part of a second electrical power supply system (3) and providing an auxiliary electrical connection of the integrated circuit (1) with the outside, the second power supply system (3) being in parallel with the first power supply system (2), the first power supply system (2) being open when the second power supply system (3) is closed and vice versa.

2. Integrated circuit (1) according to claim 1, in which each terminal (2a, 2b) or pin (3a, 3b) of the first and second power supply systems (2, 3) is connected to the rest of the system (2, 3) by a respective electrical connection comprising a micro-switch (4a, 4b; 5a, 5b), the micro-switches (4a, 4b) of the first power supply system (2) being in the open position when the micro-switches (5a, 5b) of the second power supply system (3) are in the closed position and vice versa.

3. Integrated circuit (1) according to claim 2, which is equipped with means for detecting a voltage on the pins (3a, 3b) of the second electrical power supply system (3), with means for setting the micro-switches (4a, 4b) of the first electrical power supply system (2) to the open position and with means for setting the micro-switches (5a, 5b) of the second electrical power supply system (3) to the closed position as soon as a voltage is detected on the pins (3a, 3b) of the second electrical power supply system (3).

4. Integrated circuit (1) according to claim 2, which is equipped with means for detecting a voltage across the terminals (2a, 2b) of the first electrical power supply system (2), with means for setting the micro-switches (5a, 5b) of the second electrical power supply system (3) to the open position and with means of setting the micro-switches (4a, 4b) of the first electrical power supply system (2) to the closed position as soon as a voltage is detected across the terminals (2a, 2b) of the first electrical power supply system (2).

5. Electronic board comprising at least one integrated circuit (1) according to claim 1.

6. Method for testing an integrated circuit (1) according to claim 1, test stimulation pulses being sent by a testing apparatus to the integrated circuit (1), the testing apparatus being electrically connected to the integrated circuit (1) during the test, wherein the testing apparatus is electrically connected to the integrated circuit (1) by the second power supply system (3) parallel to the first power supply system (2), the first power supply system (2) being maintained in the open position.

7. Method according to claim 6, which comprises the following steps: connection of a testing apparatus to the pins (3a, 3b), respectively positive and ground, of the second electrical power supply system (3), opening of the first electrical power supply system (2) and closing of the second electrical power supply system (3) as soon this connection is made, implementation of the test by sending stimulation pulses from the testing apparatus to the integrated circuit (1) via the second electrical power supply system (3), after completion of the test, opening of the second electrical power supply system (3), disconnection of the testing apparatus from the pins (3a, 3b), respectively positive and ground, of the second electrical power supply system (3), and closing of the first electrical power supply system (2).

8. Test device for the implementation of the method according to claim 7, the device comprising a stimulation pulse generator sending the stimulation pulses to the integrated circuit (1), means for receiving responses from the integrated circuit (1) following the stimulation pulses, further comprising electrical contact means (10a, 10b) in the form of a contact mechanism carried by the apparatus positioning itself on each pin (3a, 3b) or of a wire soldered to each pin (3a, 3b) and connected to the pulse generator.

9. Test device according to claim 8, in which each contact mechanism (10a, 10b) takes the form of a clip equipped with two jaws gripping between them a respective pin (3a, 3b) of the second electrical power supply system (3) of the integrated circuit (1).

10. Integrated circuit (1) according to claim 3, which is equipped with means for detecting a voltage across the terminals (2a, 2b) of the first electrical power supply system (2), with means for setting the micro-switches (5a, 5b) of the second electrical power supply system (3) to the open position and with means of setting the micro-switches (4a, 4b) of the first electrical power supply system (2) to the closed position as soon as a voltage is detected across the terminals (2a, 2b) of the first electrical power supply system (2).

11. Electronic board comprising at least one integrated circuit (1) according to claim 2.

12. Electronic board comprising at least one integrated circuit (1) according to claim 3.

13. Electronic board comprising at least one integrated circuit (1) according to claim 4.

14. Method for testing an integrated circuit (1) according to claim 2, test stimulation pulses being sent by a testing apparatus to the integrated circuit (1), the testing apparatus being electrically connected to the integrated circuit (1) during the test, wherein the testing apparatus is electrically connected to the integrated circuit (1) by the second power supply system (3) parallel to the first power supply system (2), the first power supply system (2) being maintained in the open position.

15. Method for testing an integrated circuit (1) according to claim 3, test stimulation pulses being sent by a testing apparatus to the integrated circuit (1), the testing apparatus being electrically connected to the integrated circuit (1) during the test, wherein the testing apparatus is electrically connected to the integrated circuit (1) by the second power supply system (3) parallel to the first power supply system (2), the first power supply system (2) being maintained in the open position.

16. Method for testing an integrated circuit (1) according to claim 4, test stimulation pulses being sent by a testing apparatus to the integrated circuit (1), the testing apparatus being electrically connected to the integrated circuit (1) during the test, wherein the testing apparatus is electrically connected to the integrated circuit (1) by the second power supply system (3) parallel to the first power supply system (2), the first power supply system (2) being maintained in the open position.

17. Method for testing an integrated circuit (1) accommodated within an electronic board according to claim 5, test stimulation pulses being sent by a testing apparatus to the integrated circuit (1), the testing apparatus being electrically connected to the integrated circuit (1) during the test, wherein the testing apparatus is electrically connected to the integrated circuit (1) by the second power supply system (3) parallel to the first power supply system (2), the first power supply system (2) being maintained in the open position.

18. Method for testing an integrated circuit (1) accommodated within an electronic board according to claim 11, test stimulation pulses being sent by a testing apparatus to the integrated circuit (1), the testing apparatus being electrically connected to the integrated circuit (1) during the test, wherein the testing apparatus is electrically connected to the integrated circuit (1) by the second power supply system (3) parallel to the first power supply system (2), the first power supply system (2) being maintained in the open position.

19. Method for testing an integrated circuit (1) accommodated within an electronic board according to claim 12, test stimulation pulses being sent by a testing apparatus to the integrated circuit (1), the testing apparatus being electrically connected to the integrated circuit (1) during the test, wherein the testing apparatus is electrically connected to the integrated circuit (1) by the second power supply system (3) parallel to the first power supply system (2), the first power supply system (2) being maintained in the open position.

20. Method for testing an integrated circuit (1) accommodated within an electronic board according to claim 13, test stimulation pulses being sent by a testing apparatus to the integrated circuit (1), the testing apparatus being electrically connected to the integrated circuit (1) during the test, wherein the testing apparatus is electrically connected to the integrated circuit (1) by the second power supply system (3) parallel to the first power supply system (2), the first power supply system (2) being maintained in the open position.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Other features, aims and advantages of the present invention will become apparent upon reading the detailed description that follows and with regard to the appended drawings presented by way of non-limiting examples and in which:

[0031] FIG. 1 is a schematic representation of an integrated circuit according to the prior art, where the electrical power supply from the outside of this integrated circuit needs to be unsoldered with a view to testing the integrated circuit prior to its initial power-up,

[0032] FIG. 2 is a schematic representation of an integrated circuit according to one non-limiting embodiment of the present invention, the electrical power supply of the integrated circuit and its electrical power supply designed to be connected to a testing apparatus being different and placed in parallel within the integrated circuit, the electrical power supply being suspended when a test is undertaken and, conversely, the electrical power supply connected to the testing apparatus being suspended during normal operation of the integrated circuit,

[0033] FIG. 3 shows a flow diagram detailing the various steps of a method for testing an integrated circuit according to the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0034] With reference to FIGS. 1 and 2, for the features that are common to the integrated circuits according to the prior art and the present invention, an integrated circuit 1 comprises two electrical power supply terminals 2a, 2b, respectively positive and ground, forming part of a first electrical power supply system 2 internal to the integrated circuit 1 and providing the main electrical power supply of the integrated circuit 1 using an electrical power supply source external to the integrated circuit 1.

[0035] The external electrical power supply source may be a battery. Depending on the integrated circuit 1 to be powered, this battery may be chosen to deliver a specific voltage, for example 5 or 3.3 Volts. Such an integrated circuit 1 usually forms part of an electronic board being soldered to the latter for its connections, notably for its electrical power supply connections.

[0036] FIGS. 1 and 2 show a main external electrical power supply connection 9 to the integrated circuit 1, this connection 9 being connected to the two electrical power supply terminals 2a, 2b of the first power supply system 2 of the integrated circuit 1. The connection 9 comprises a connection between the +ve pole of a battery, as power supply source external to the integrated circuit, with the positive terminal 2a of the first electrical power supply system 2 and a connection between the ground terminal 2b of the first electrical power supply system 2 with the earth referenced T in the figures.

[0037] The two connections of the main external connection 9 comprise means for contact 9a, 9b respectively with the positive terminal 2a and the ground terminal 2b of the first electrical power supply system 2. These contact means 9a, 9b usually take the form of solder joints.

[0038] The integrated circuit 1 comprises inputs 6 and outputs 7 for its connection with other elements mounted on an electronic board or external to an electronic board. In the figures, three inputs 6 and three outputs 7 are shown, which is non-limiting.

[0039] As previously mentioned, the aim of the invention is notably to test a component of the integrated circuit type 1, notably, but not limited to, an application-specific integrated circuit 1, directly on its original board without having to remove it hence avoiding heating it during the unsoldering operation and isolating the integrated circuit 1 from the rest of the electronic board. This original board may comprise elements other than the integrated circuit.

[0040] With reference to FIG. 2, according to the invention, the integrated circuit 1 comprises two pins 3a, 3b, respectively positive and ground, forming part of a second electrical power supply system 3 providing an auxiliary electrical connection of the circuit with the outside.

[0041] An auxiliary external connection 10 is connected to the two pins 3a, 3b forming part of the second electrical power supply system 3, internal to the integrated circuit 1, the pins 3a, 3b being disposed on the periphery of the integrated circuit 1.

[0042] The auxiliary external connection 10 is principally, but not exclusively, used for the implementation of a diagnostic or test operation on the integrated circuit. In this case, the second electrical power supply system 3 is advantageously connected to a stimulation pulse generator sending the stimulation pulses to the integrated circuit 1 via the second electrical power supply system 3 in order to perform a test on the integrated circuit 1. This will be described in more detail hereinbelow.

[0043] If the two electrical power supply terminals 2a, 2b of the first power supply system 2 of the integrated circuit 1 are physically connected to an electronic board accommodating the integrated circuit 1, the two pins 3a, 3b forming part of the second electrical power supply system 3 are not necessarily physically connected to the electronic board but may be connected indirectly such as for example in the form of connecting lugs or an equivalent arrangement.

[0044] The second electrical power supply system 3 is shown in parallel with the first power supply system 2 and in opposition, in other words the first power supply system 2 is open not allowing any current to flow when the second power supply system 3 is closed allowing a current to flow and vice versa.

[0045] In FIG. 2, the second electrical power supply system 3 is connected to an auxiliary external connection 10. It is this second electrical power supply system 3 that may be designed to be connected to a testing apparatus generating stimulation pulses and sending them to the integrated circuit 1. During the test, the main electrical power supply of the integrated circuit 1 is not enabled, the first electrical power supply system 2 being open, whereas the second power supply system 3 is closed and receives the stimulation pulses generated by the testing apparatus.

[0046] The auxiliary external circuit 10 preferably therefore forms part of the testing apparatus connecting the integrated circuit 1 to a stimulation pulse generator. It is however to be considered that this auxiliary external circuit 10 may have another function, for example it may be an external backup circuit for the power supply of the integrated circuit 1.

[0047] Generally speaking, each terminal or pin of the first and second electrical power supply systems 2, 3 may be connected to the rest of the system to which it belongs via a respective electrical connection comprising a micro-switch 4a, 4b; 5a, 5b.

[0048] As the electrical power supply systems 2, 3 do not stay open or closed simultaneously, the micro-switches 4a, 4b of the first system 2 are in the open position when the micro-switches 5a, 5b of the second system 3 are in the closed position and vice versa.

[0049] In order to trigger the opening and the closing of the micro-switches 4a, 4b; 5a, 5b, the integrated circuit 1 possesses detection means allowing it to identify whether the integrated circuit 1 is in test mode, in which case the second electrical power supply system 3 is closed by closing its micro-switches 5a, 5b and the first system 1 is opened by opening micro-switches 4a, 4b.

[0050] The detection means can detect a normal operation of the integrated circuit 1 with, in this case, the first electrical power supply system 2 closed by closing its micro-switches 4a, 4b and the second system 3 opened by opening its micro-switches 5a, 5b.

[0051] In one preferred embodiment of the present invention, the integrated circuit 1 can be equipped with means for detecting a voltage on the pins 3a, 3b of the second electrical power supply system 3. It is then also equipped with means for setting the micro-switches 4a, 4b of the first electrical power supply system 2 to the open position as soon as a voltage is detected on the pins 3a, 3b of the second electrical power supply system 3.

[0052] The converse applies for the micro-switches 5a, 5b of the second power supply system 3 which are opened whenever an absence of electrical contact to the second power supply system 3 is detected and closed whenever a contact to the second power supply system 3 is detected. Such a voltage on the pins 3a, 3b of the second electrical power supply system 3 means that a test of the integrated circuit 1 will take place.

[0053] In another preferred embodiment of the present invention which may be combined with the first one, the integrated circuit 1 can be equipped with means for detecting a voltage on the terminals 2a, 2b of the first electrical power supply system 2, with means for setting the micro-switches 5a, 5b of the second electrical power supply system 3 to the open position and with means for setting the micro-switches 4a, 4b of the first electrical power supply system 2 to the closed position as soon as a voltage is detected across the terminals 2a, 2b of the first electrical power supply system 2.

[0054] The invention also relates to an electronic board, being noteworthy in that it comprises at least one such integrated circuit 1. This electronic board may carry electronic elements other than the integrated circuit 1. In order to avoid undesirable power supply connections between the test electrical power supply and the electrical power supply for the electronic board, the electrical power supply for the electronic board incorporating the integrated circuit, advantageously soldered to it, may be disconnected from its power supply system when the board is not powered. Indeed, without taking this disconnection measure, a connection between test and the board power supplies could still be possible via one or various passive components that may be present on the board.

[0055] In an electronic board incorporating such an integrated circuit 1, it could also have been possible to place micro-switches 4a, 4b; 5a, 5b externally to the integrated circuit 1 within the electrical connections before the respective terminals 2a, 2b or pins 3a, 3b of the first and second electrical power supply systems 2, 3. This is not however a preferred solution.

[0056] In this case, the means for detecting a voltage on the pins 3a, 3b of the second electrical power supply system 3 and the means for setting the micro-switches 4a, 4b of the first electrical power supply system 2 in the open position in the first preferred embodiment described previously may be external to the integrated circuit 1. The same goes for the means for detecting an electrical contact to the pins 3a, 3b of the second electrical power supply system 3 and for the means setting the position of the micro-switches 5a, 5b of the second electrical power supply system 3 so as to close these micro-switches 5a, 5b.

[0057] The aim of equipping an integrated circuit 1 with a second electrical power supply system 3 is essentially to be able to carry out a test on the integrated circuit 1 without having to use the first power supply system 2, which would for example require the unsoldering of its external electrical power supply for normal operation so as to effect the connection to a testing apparatus sending stimulation pulses to it.

[0058] The steps will now be detailed of a method for testing an integrated circuit with more particular reference to FIG. 3 while considering FIGS. 1 and 2 for the numerical references not illustrated in FIG. 3.

[0059] The step referenced 11 symbolizes the start of the use of an integrated circuit 1. In normal operation, hence without implementation of a test process, the two electrical power supply terminals 2a, 2b, respectively positive and ground, forming part of a first power supply system 2, are electrically powered using an electrical power supply source external to the integrated circuit 1, it being given that their associated micro-switches 4a, 4b are closed. This is shown at the step 12. Simultaneously, the micro-switches 5a, 5b of the second electrical power supply system 3 are in the open position. This is shown at the step 13.

[0060] If no voltage is detected on the pins 3a, 3b of the second electrical power supply system 3, which is symbolized by the branch N, the closed state of the micro-switches 4a, 4b of the first power supply system 2 and the open state of the micro-switches 5a, 5b of the second power supply system 3 are maintained.

[0061] On the other hand, as soon as a voltage is detected on the pins 3a, 3b of the second electrical power supply system 3, which is symbolized by the response Y indicating a ‘yes’ to this question 14, the operations are carried out for opening the micro-switches 4a, 4b of the first power supply system 2, according to the step 15, and for closing the micro-switches 5a, 5b of the second electrical power supply system 3, according to the step 16.

[0062] If a voltage is detected on the terminals 2a, 2b of the first electrical power supply system 2, which is symbolized by the branch Y going from the question 17, the steps 12 and 13 are repeated, in other words the micro-switches 4a, 4b of the first power supply system 2 are closed and the micro-switches 5a, 5b of the second power supply system 3 are opened.

[0063] For as long as no voltage is detected across the terminals 2a, 2b of the first electrical power supply system 2, which is symbolized by the branch N going from the question 17, the closed state of the micro-switches 5a, 5b of the second power supply system 3 and, as a consequence, the open state of the micro-switches 4a, 4b first power supply system 2 persist.

[0064] Subsequently, at the question 18, if the response is ‘yes’ Y, namely if a voltage is detected on the pins 3a, 3b of the second electrical power supply system 3, this implies that the test is still in progress and that the steps 15 and 16 are being repeated.

[0065] As it is possible that the pins 3a, 3b of the second electrical power supply system 3 are powered by electrical pulses leaving an interval of time between them, it is possible to consider a latency time below which a detection of a zero voltage on the pins 3a, 3b of the second power supply system 3 is not taken into account.

[0066] At this question 18, if the response is ‘no’ N, namely that no voltage is detected on the pins 3a, 3b of the second electrical power supply system 3, this means that the test operation is finished. This has then reached the end of the method for testing an integrated circuit 1 symbolized by 19.

[0067] According to one method for testing such an integrated circuit 1 or an integrated circuit 1 accommodated in an electronic board conforming to the present invention, test stimulation pulses are sent by a testing apparatus to the integrated circuit 1. For this purpose, the testing apparatus is electrically connected to the integrated circuit 1 during the test via the second electrical power supply system 3 held in the closed position parallel to the first power supply system 2, the first power supply system 2 being open during the test.

[0068] In one advantageous embodiment, the method comprises the step for connection of a testing apparatus to the pins 3a, 3b, respectively positive and ground, of the second electrical power supply system 3. Simultaneously, the opening of the first electrical power supply system 2 and the closing of the second electrical power supply system 3 is effected as soon as this connection is made.

[0069] The method subsequently comprises the step for implementing the test by sending stimulation pulses from the testing apparatus to the integrated circuit 1 via the second electrical power supply system 3. This performs the test per se in order to discover whether the integrated circuit 1 is operating correctly or not.

[0070] After completion of the test, the opening of the second electrical power supply system 3 and the closing of the first electrical power supply system 2 are effected, this being carried out either simultaneously or just prior or just after the disconnection of the testing apparatus from the pins 3a, 3b, respectively positive and ground, of the second electrical power supply system 3. The closing of the first power supply system 2 following the disconnection of the testing apparatus from the pins 3a, 3b is preferred.

[0071] The invention also relates to a test device for the implementation of such a method. Conventionally, the test device comprises a stimulation pulse generator sending the stimulation pulses to the integrated circuit 1, means for receiving the responses from the integrated circuit 1 following the stimulation pulses and means 10a, 10b for electrical contact with each terminal 3a, 3b of the second electrical power supply system 3 of the integrated circuit and referenced on a test power supply.

[0072] The electrical contact means 10a, 10b may take the form of a readily removable contact mechanism carried by the apparatus that can be positioned on each pin 3a, 3b. Indeed, in one preferred embodiment of the invention, the contact between the second electrical power supply system 3 and the auxiliary external connection 10 is only temporary, for example only lasting for the time of a test of the integrated circuit. It is therefore advantageous for the electrical contact means 10a, 10b to be readily removable.

[0073] Preferably, each contact mechanism can take the form of a clip equipped with two jaws gripping between them a respective pin 3a, 3b of the second electrical power supply system 3 of the integrated circuit 1. As an alternative, the electrical contact means 10a, 10b may take the form of a wire soldered to each pin 3a, 3b and connected to the pulse generator.