Digital radio transmissions

Abstract

A digital radio receiver adapted to receive radio signals modulated using continuous phase frequency shift keying, CPFSK. The receiver comprises means for receiving a radio signal (2), a correlator (8) arranged to estimate a frequency offset between the carrier frequency of the received radio signal and a nominal carrier frequency, means for correcting said frequency offset (4) and outputting a frequency-corrected radio signal (6), and a matched filter bank, MFB, which comprises a plurality of filters (20,22), each of which corresponds to a different bit pattern, for determining a bit sequence (36) from the frequency-corrected radio signal (6).

Claims

1. A digital radio receiver adapted to receive radio signals modulated using continuous phase frequency shift keying, the receiver comprising a radio reception portion for receiving an analogue radio signal having a carrier frequency, a correlator arranged to estimate a frequency offset between said carrier frequency and a nominal carrier frequency, a correction portion for correcting for said frequency offset and a matched filter bank (MFB) comprising a plurality of filters each of which corresponds to a different bit pattern for determining a bit sequence from said analogue radio signal, wherein the digital radio receiver further comprises a drift estimator arranged to estimate a frequency drift in said carrier signal by comparing a phase determined by a given filter of the MFB when it is the matched filter with the phase determined on a subsequent matching occasion after a period in which there are an equal number of high and low bits received, said receiver being arranged to record the phase with a timestamp each time a filter is matched, and the next time said filter is matched, to perform a check to see whether an equal number of high and low bits has been identified since the previous match.

2. The digital radio receiver as claimed in claim 1 wherein the correlator is a Joint Frame and Frequency offset data-aided estimator.

3. The digital radio receiver as claimed in claim 1 arranged to make a frequency drift estimate each time a filter is matched and there is an equal number of high and low bits received.

4. The digital radio receiver as claimed in claim 1 arranged to apply a correction to said carrier frequency based on said drift estimate.

5. The digital radio receiver as claimed in claim 4 arranged to apply said correction only if it is above a predetermined minimum and/or below a predetermined maximum.

6. The digital radio receiver as claimed in claim 1 arranged to use the K most recent bit observations of each bit to make a bit decision, where K is the number of bits per filter.

7. A digital radio receiver adapted to receive radio signals modulated using continuous phase frequency shift keying, the receiver comprising a radio reception portion for receiving an analogue radio signal having a carrier frequency, a correlator arranged to estimate a frequency offset between said carrier frequency and a nominal carrier frequency, a correction portion for correcting for said frequency offset and a matched filter bank (MFB) comprising a plurality of filters each of which corresponds to a different bit pattern for determining a bit sequence from said analogue radio signal, wherein the digital radio receiver further comprises a drift estimator arranged to estimate a frequency drift in said carrier signal by comparing a phase determined by a given filter of the MFB when it is the matched filter with the phase determined on a subsequent matching occasion after a period in which there are an equal number of high and low bits received, said receiver being arranged not to estimate said frequency drift if said period exceeds a threshold time.

8. A digital radio receiver adapted to receive radio signals modulated using continuous phase frequency shift keying, the receiver comprising a radio reception portion for receiving an analogue radio signal having a carrier frequency, a correlator arranged to estimate a frequency offset between said carrier frequency and a nominal carrier frequency, a correction portion for correcting for said frequency offset and a matched filter bank (MFB) comprising a plurality of filters each of which corresponds to a different bit pattern for determining a bit sequence from said analogue radio signal, wherein the digital radio receiver further comprises a drift estimator arranged to estimate a frequency drift in said carrier signal, said receiver being arranged to apply a correction to said carrier frequency based on said drift estimate only if a predefined minimum time has elapsed since the last correction was applied.

9. A digital radio receiver adapted to receive radio signals having a carrier frequency and modulated using continuous phase frequency shift keying, the receiver comprising a radio reception portion for receiving said radio signal, and a matched filter bank (MFB) comprising a plurality of filters each of which corresponds to a different bit pattern for determining a bit sequence from said signal, wherein the receiver is arranged to: obtain information from one of said filters relating to a phase of said signal when said filter is matched to a bit pattern on a first occasion; obtain information from said filter relating to a phase of said signal when said filter is matched to the bit pattern on a second occasion; and estimate a frequency drift of said carrier frequency using a difference in phase between the phase determined on the first occasion and the phase determined on the second occasion if said bit sequence between said first and second occasions comprises an equal number of high and low bits.

10. The digital radio receiver as claimed in claim 9 arranged to make a frequency drift estimate each time a filter is matched and there is an equal number of high and low bits received.

11. A method of decoding a radio signal modulated using continuous phase frequency shift keying comprising: receiving an analogue radio signal having a carrier frequency; using a correlator to estimate a frequency offset between said carrier frequency and a nominal carrier frequency; correcting for said frequency offset; using a matched filter bank (MFB) comprising a plurality of filters each of which corresponds to a different bit pattern to determine a bit sequence from said analogue radio signal; estimating said frequency drift by comparing a phase determined by a given filter of the MFB when it is the matched filter with the phase determined on a subsequent matching occasion after a period in which there are an equal number of high and low bits received; and recording the phase with a timestamp each time a filter is matched; and the next time said filter is matched, perform a check to see whether an equal number of high and low bits has been identified since the previous match.

12. The method as claimed in claim 11 wherein the correlator is a Joint Frame and Frequency offset data-aided estimator.

13. A method of estimating a frequency drift in a radio signal modulated using continuous phase frequency shift keying, the method comprising: receiving said radio signal having a carrier frequency; determining a bit sequence from said radio signal using a matched filter bank comprising a plurality of filters each of which corresponds to a different bit pattern; obtaining information from one of said filters relating to a phase of said signal when said filter is matched to a bit pattern on a first occasion; obtaining information from said filter relating to a phase of said signal when said filter is matched to the bit pattern on a second occasion; and estimating a frequency drift of said carrier frequency using a difference in phase between the phase determined on the first occasion and the phase determined on the second occasion if said bit sequence between said first and second occasions comprises an equal number of high and low bits.

14. The method as claimed in claim 13 comprising making a frequency drift estimate each time a filter is matched and there is an equal number of high and low bits received.

15. A method of decoding a radio signal modulated using continuous phase frequency shift keying comprising: receiving an analogue radio signal having a carrier frequency; using a correlator to estimate a frequency offset between said carrier frequency and a nominal carrier frequency; correcting for said frequency offset; using a matched filter bank (MFB) comprising a plurality of filters each of which corresponds to a different bit pattern to determine a bit sequence from said analogue radio signal; estimating a frequency drift by comparing a phase determined by a given filter of the MFB when it is the matched filter with the phase determined on a subsequent matching occasion after a period in which there are an equal number of high and low bits received; and not estimating said frequency drift if said period exceeds a threshold time.

16. A method of decoding a radio signal modulated using continuous phase frequency shift keying comprising: receiving an analogue radio signal having a carrier frequency; using a correlator to estimate a frequency offset between said carrier frequency and a nominal carrier frequency; correcting for said frequency offset; using a matched filter bank (MFB) comprising a plurality of filters each of which corresponds to a different bit pattern to determine a bit sequence from said analogue radio signal; estimating a frequency drift by comparing a phase determined by a given filter of the MFB when it is the matched filter with the phase determined on a subsequent matching occasion after a period in which there are an equal number of high and low bits received; and applying a correction to said carrier frequency based on said drift estimate correction only if a predefined minimum time has elapsed since the last correction was applied.

Description

(1) An embodiment of the invention will now be described, by way of example only, with reference to the accompanying drawings in which:

(2) FIG. 1 is a schematic system diagram of a digital radio receiver embodying the invention; and

(3) FIG. 2 is a schematic diagram the ‘majority vote’ feature of some aspects of the invention;

(4) Turning first to FIG. 1 there may be seen a schematic architecture diagram. It may be seen that in the top left-hand corner is the input 2 comprising complex baseband samples representing the signal which is received by the antenna and passes through analogue to digital conversion and appropriate digital filtering stages. The complex baseband signals 2 are fed into a complex rotator block 4 which carries out complex rotation on them to compensate for a carrier frequency offset as estimated by a module 8 (described in more detail below).

(5) The complex baseband input signals 2 are also fed to a estimator module 8 which, as will be explained below, comprises a correlator and which performs timing recovery, frame synchronization and initial frequency offset estimation. There is a corresponding output 10 from this module 8 which is the input to a phase accumulator module 12 that supplies the complex rotator block 4 with the accumulated phase angle needed by this block to carry out complex rotation.

(6) A frequency drift estimator module 14 also provides an input 16 to the phase accumulator module 12 as will also be described in greater detail below.

(7) The waveforms 6 output by the complex rotation block 4 are fed into a matched filter bank 18. There are a total of 2.sup.K filters 20 each of K bits length. Thus to take an example where K=3, there would be eight filters 20, each of three bits. The filters 20 are applied to the incoming signals 6 by carrying out a complex multiplication as will be described in greater detail later. The multiplications for each filter 20 are summed in a respective summing stage 22. A further module 24 determines which filter 20 gives the maximum output as given by the magnitude of the complex valued filter output, the index i of which is provided as an input 26 to the majority vote module 28. The same information is also provided as an input 30 to the frequency drift estimator module 14. The actual value of the matching filter output C.sub.i is provided as a further input 32 to the drift estimator 14.

(8) The timing recovery performed by the estimator module 8 provides a strobe output 34 to the maximum output determining module 24 and the majority vote module 28.

(9) The majority vote module 28 determines the best estimate of the next bit based on the K previous filter indices and outputs the finally determined bit from its output 36. Again this process is explained in greater detail below.

(10) The operation of the system set out briefly above will now be described in more detail.

(11) As mentioned before, the incoming signal 2 is passed to the correlator based estimator module 8 for timing recovery, frame synchronization and initial frequency offset estimation.

(12) The correlator included in the module 8 is a data-aided (DA) joint Frame and Frequency estimator which exploits knowledge of the data in the received symbols to cancel the effect of the modulation on the estimate of a conventional delay-and-correlate type of carrier frequency offset estimator. Further details of this estimator and other types of estimator which can be used are given in Chapter 8 of Meyr et al. “Digital Communication Receivers: Synchronization, Channel Estimation and Signal Processing”, John Wiley & Sons, Inc 1998.

(13) More specifically, the carrier frequency offset estimator is given by:

(14) $\begin{array}{cc}\Delta \hat{f}=\frac{1}{2\pi \mathrm{DT}}\arg \left\{\underset{i=0}{\overset{L-1}{.Math.}}\left[z_{n-i}{z}_{n-i-D}^{*}\right]d_i\right\}& \left(1\right)\end{array}$
where L is correlation length, D is a delay (to be explained later), z represents the complex baseband samples (I & Q) and d.sub.i=p.sub.i*p.sub.i+D where p is the samples constituting the upsampled packet synchronization word bits, typically a prefix of the address bits. T is the sample rate period. The correlation length might typically be 128 or 192. In general the correlation length is a trade-off between estimation accuracy and implementation cost. Simulations have indicated that L=128 may be sufficient.

(15) The estimator must be sampled at the right point in time and here the packet detection property (joint timing and frame synchronization) comes into play. Packet detection is achieved when a peak is detected on equation (2) below:

(16) $\begin{array}{cc}{M}_n=\frac{.Math.C_n.Math.}{P_n},\mathrm{where}& \left(2\right)\\ C_n=\underset{i=0}{\overset{L-1}{.Math.}}\left[z_{n-i}{z}_{n-i-D}^{*}\right]d_i& \left(3\right)\\ P_n=\underset{i=0}{\overset{L-1}{.Math.}}{.Math.z_{n-i-D}.Math.}^2& \left(4\right)\end{array}$

(17) It should be noted that the sample time of the packet detection peak serves as timing synchronization. Equations (2) to (4) perform a complex correlation between the complex baseband samples and the samples constituting the up-sampled packet address bits. A valid peak on (2) is qualified by a programmable threshold. This threshold will typically be set in the range 0.7-0.8. It should be noted that equation (4) is used to normalize the magnitude of the correlator peak in equation (2).

(18) Looking at the complex baseband samples and coefficients in equation (1) in polar form it may be rewritten as:

(19) $\begin{array}{cc}\begin{array}{c}\Delta \hat{f}=\frac{1}{2\pi \mathrm{DT}}\arg \left\{\underset{i=0}{\overset{L-1}{.Math.}}\left[z_{n-i}{z}_{n-i-D}^{*}{p}_i^{*}{p}_{i+D}\right]\right\}\\ =\frac{1}{2\pi \mathrm{DT}}\arg \left\{\underset{i=0}{\overset{L-1}{.Math.}}\left[\begin{array}{c}{r}_{n-i}{e}^{j\left({\theta }_{n-i}+{\phi }_{n-i}\right)}{r}_{n-i-D}\\ e^{-j\left({\theta }_{n-i-D}+{\phi }_{n-i-D}\right)}{u}_i{e}^{-j{\gamma }_i}{u}_{i+D}{e}^{j{\gamma }_{i+D}}\end{array}\right]\right\}\\ =\frac{1}{2\pi \mathrm{DT}}\arg \left\{e^{j{\phi }_{\Delta }}\underset{i=0}{\overset{L-1}{.Math.}}\left[r_{n-i}{e}^{j{\theta }_{n-i}}{r}_{n-i-D}{e}^{-j{\theta }_{n-i-D}}{u}_i{e}^{-j{\gamma }_i}{u}_{i+D}{e}^{j{\gamma }_{i+D}}\right]\right\}\end{array}& \left(5\right)\end{array}$
where {r,u} are the magnitude of the complex numbers. Assuming that the carrier frequency offset is approximately constant, in the above equation φ.sub.Δ is the change of phase over D samples.

(20) When “in sync” (i.e. when equation (2) peaks), the sample angles track the coefficient angles (θ.sub.n−i≈γ.sub.i) and equation (5) may be rewritten as:

(21) $\begin{array}{cc}\begin{array}{c}\Delta \hat{f}=\frac{1}{2\pi \mathrm{DT}}\arg \left\{e^{j{\phi }_{\Delta }}\underset{i=0}{\overset{L-1}{.Math.}}\left[r_{n-i}{r}_{n-i-D}{u}_i{u}_{i+D}{e}^{j\left({\theta }_{n-i}-{\theta }_{n-i-D}\right)}.Math.e^{-j\left({\gamma }_i-{\gamma }_{i+D}\right)}\right]\right\}\\ \approx \frac{1}{2\pi \mathrm{DT}}\arg \left\{e^{j{\phi }_{\Delta }}\underset{i=0}{\overset{L-1}{.Math.}}\left[r_{n-i}{r}_{n-i-D}{u}_i{u}_{i+D}\right]\right\}=\frac{{\phi }_{\Delta }}{2\pi \mathrm{DT}}\end{array}& \left(6\right)\end{array}$

(22) Taking T=125 ns and D=16, the maximum carrier frequency offset that can be estimated (in either direction) is

(23) $\Delta {\hat{f}}_{\max }\approx \frac{1}{2\pi .Math.16.Math.0.125.Math.{10}^{-6}}.Math.\pi =250\mathrm{kHz}$
The carrier frequency offset estimate is valid when there is correlation, i.e. when equation (2) peaks. Therefore this estimator jointly estimates carrier frequency offset and timing. Assuming u.sub.1=1 it may be seen that the sum in equation (6) evaluates to the energy in the L baseband samples at the time of correlation. This value is normalized with P.sub.n in equation (2) before comparing with a fixed threshold in the range 0.7-0.8. A value of D=16 was chosen in one example although other values could be used. The carrier frequency offset estimator range of +/−250 kHz in this case handles a crystal specification of 50 ppm which is considered sufficient in most applications.

(24) The incoming signals are passed to block 4 to carry out complex rotation using the frequency offset determined above. This is equivalent to the multiplication of the signal by .Math.e.sup.−j2πΔ{circumflex over (f)}nT. The resultant ‘compensated’ waveform is then passed to the matched filter bank block 18 which carries out bit decisions. Formally, this is so called near optimum (in additive white Gaussian noise) non-coherent maximum likelihood estimation of a bit based on a bank of matched filters matched to all possible bit sequences over an observation interval of length K bits.

(25) In equations, the complex baseband samples z(n) may be written as:
z(n)=A(n)e.sup.jφ(n)  (1)
where the information is in the phase φ(n). For simplicity the amplitude is assumed to be a constant, A from now on.

(26) Each filter corresponds to a unique K-bit sequence, the complex filter coefficients for filter number i being given by:
p.sub.i(n)=e.sup.jθ.sup.i.sup.(n),  (2)
where the phase angle θ.sub.i(n) is given by:

(27) $\begin{array}{cc}{\theta }_i\left(n\right)=2\pi \beta \frac{F_m}{F_s}\underset{k=0}{\overset{n}{.Math.}}{S}_i\left(k\right)& \left(3\right)\end{array}$
where S.sub.i(k) represents the up-sampled bit sequence number i of length KN samples where i=0, . . . , 2.sup.K−1. N is the over-sampling factor (number of samples per bit). Furthermore β denotes the modulation index, F.sub.m is the frequency of the modulating signal (half the data rate) and F.sub.s is the sampling rate.

(28) The filters produce a complex output at every sample:

(29) $\begin{array}{cc}\begin{array}{c}{C}_i\left(n\right)=\underset{k=0}{\overset{\mathrm{KN}-1}{.Math.}}z\left(n-k\right)p_i^{*}\left(k\right)\\ =\underset{k=0}{\overset{\mathrm{KN}-1}{.Math.}}A{e}^{j\phi \left(n-k\right)}{e}^{-j{\theta }_i\left(k\right)}\\ =A{e}^{j\left(\phi \left(n\right)-{\theta }_i\left(0\right)\right)}+A{e}^{j\left(\phi \left(n-1\right)-{\theta }_i\left(1\right)\right)}+\mathrm{.Math.}+\\ A^{e^{j\left(\phi \left(n-\mathrm{KN}+1\right)-{\theta }_i\left(\mathrm{KN}-1\right)\right)}}\end{array}& \left(4\right)\\ \mathrm{where}i=0,\mathrm{.Math.},2^K-1& \end{array}$

(30) It should be noted that when timing has been recovered as described earlier, the phase of the complex baseband samples z(n) will approximately track the phase of the filter coefficients for one of the 2.sup.K filters with a possible constant phase offset. φ.sub.iφ−θ.sub.i. Here an insignificant carrier frequency offset may be assumed in light of the frequency offset estimation and correction carried out as described above. or module 8. Furthermore as the phase of the carrier isn't known, the carrier may have an arbitrary initial phase relative to the local oscillator signal.

(31) Assuming synchronized timing, equation (4) becomes:
C.sub.i=AKNe.sup.jφ.sup.i,  (5)
for the filter with the “matching” phase.

(32) At the strobe time (which is decided by timing recovery) the middle bit of the K-bit sequence is selected corresponding to index i where

(33) $i=\underset{i}{\max }.Math.C_i.Math..$

(34) For example if i was found to be 5, a zero bit is output since i=101.sub.b where the middle bit is zero. The magnitude of the complex filter output is computed by computing the square envelope M=real(C.sub.i)^2+imag(C.sub.i)^2 using the full multipliers.

(35) As will be appreciated by the skilled person, the bit recovery described above assumes that there is insignificant frequency offset. The approach previously described allows the initial offset to be estimated but it is also important in embodiments to continue to track the frequency offset throughout the reception of a packet. One reason for this is that in practice the initial frequency offset estimation from the correlator module 8 will inevitably have some residual error. Another reason is that there is typically some frequency drift between a transmitter and the receiver during reception of a packet. Thus performing frequency drift compensation will prevent the performance advantage which can be achieved by using a matched filter bank from being quickly diminished.

(36) In accordance with the embodiment of the invention described herein successive observations of the phase information from the matched filter bank 18 (after controlling for the modulation effect) are used to track frequency offset.

(37) With reference to equations (4) and (5) observing the phase for filter number i at sample time n this filter produces:
C.sub.i(n)=AKNe.sup.jφ.sup.i.sup.(n)

(38) Then at sample time n+Δt where Δt=kN for some integer k and N is the number of samples per bit, a new observation of the same filter is made. This yields two phase observations spaced in time for filter number i that may be utilized to estimate frequency offset as follows:

(39) $\begin{array}{cc}\Delta {\hat{f}}_{\mathrm{res}}=\frac{F_s}{2\pi }.Math.\frac{{\varphi }_i\left(n+\mathrm{kN}\right)-{\varphi }_i\left(n\right)}{\mathrm{kN}}& \left(6\right)\end{array}$

(40) The phase is obtained by computing the arctan( ) of the complex filter output. This is accomplished by a CORDIC block running in vector mode. It is assumed that timing is synchronized, that is the drift estimator block 14 is employed after timing synchronization.

(41) In the above equations the modulation effect on the phase of the complex baseband samples was disregarded. For this estimate in equation (6) to be valid it requires that there were an equal number of 1s and 0s observed between two phase observations. This is accomplished by logging the time stamp and phase for the filter selected for each bit period and the difference in the number of 1s and 0s encountered so far. Then, next time a matched filter is selected, the last phase value for this filter is read as well as the last time stamp for the filter. Thus to avoid errors caused by the modulation, a requirement is set that the current difference in numbers of 1s and 0s matches the last value stored. This leads to computing the phase difference and dividing by the time distance Δt in number of samples to get a frequency offset estimate according to equation (6). This value is then filtered in a first order infinite impulse response (IIR) filter before Δ{circumflex over (f)} is updated in the phase accumulator module 12.

(42) Thus far have been described the correlator based estimator for frequency offset compensation and a matched filter bank with the phases of the matched filters being used to calculate frequency drift. In a refinement of the matched filter bank which is advantageous although not essential in all embodiments a ‘majority vote’ module 28 is used to make statistically improved bit determinations as will be described below.

(43) The ‘majority vote’ module 28 utilizes the fact that more than one observation of each bit is available. For example where K=3 there are potentially three observations of the same bit available by looking at the history of the three most recent matched filter state transitions. By looking at three columns successively over three state transitions, each will suggest a bit determination such that the most common—i.e. the one which is suggested on two or three of the transitions—can be selected as the ‘majority vote’ before bit slicing.

(44) Reference is now made to FIG. 2 for further explanation. This shows the eight matched filters S1 . . . S8 and corresponding bit sequences 38 for a K=3 system. Assuming that bits enter the filters from the right, ideal state transitions are shown in the diagram on the right of FIG. 2. To illustrate the operation an example will be given.

(45) It is first assumed that the filter just selected was S1. In the next bit interval, a ‘1’ enters the filter bank. Consequently, the most likely filter match would be S2, followed by S7 if the next bit is a ‘0’ or S8 if the next bit is a ‘1’. There are of course ‘return’ branches in reality but these are not shown for the sake of clarity.

(46) Although FIG. 2 shows the all the theoretical transitions, in practice when the effect of noise is taken into account other ‘forbidden’ transitions may take place. For instance there may be a transition from S2.fwdarw.S5.fwdarw.S3 which is interpreted as a ‘1’ travelling from right to left. In this case all three filters ‘agree’ about the value of the bit: i.e. the rightmost bit of S2 is ‘1’, the middle bit of S5 is ‘1’ and the leftmost bit of S3 is ‘1’ too.

(47) In another possible case the transition might be S2.fwdarw.S4.fwdarw.S3. Here the corresponding bits of the three filters do not all agree: the rightmost bit of S2 is ‘1’ and so is the leftmost bit of S3; however the middle bit of S4 is ‘0’ and hence there is disagreement. However under the majority vote principle, since two of the filters agree on the bit being ‘1’, the bit is output as a ‘1’ to the output 36.

(48) The principle is illustrated with K=3 and it will be appreciated that is the minimum filter-order where this type of observation averaging is effective. Of course other filter orders could be used such as K=5, K=7 etc. which would be expected to give better results but at the cost of increased implementation complexity. Of course intermediate even-order filter schemes of K=4,6 etc. could be used—e.g. by skipping one observation to break tied votes.

(49) It will be appreciated by those skilled in the art that the embodiment of the invention described above has significant potential advantages. However many variations and modifications are possible within the scope of the invention. In particular it is mot essential to employ all of the majority vote feature, the correlator based estimator for frequency offset estimation and the phase information from the MFB for frequency drift estimation; only one or two of these features may be used in conjunction with an MFB.