Method for automatic impedance matching and corresponding transmission channel

Abstract

A method for facilitating the impedance matching of radiofrequency circuits, notably transmission circuits using a power amplifier connected to a load which may include an antenna. A signal is produced for measuring the temperature resulting from the operation of the output amplifier stage, by a temperature sensor positioned in the immediate vicinity of this stage, the measuring signal is used to control a circuit for controlling the variable impedances of a matching network positioned between the amplifier and the load, and values which seek to minimize the sensed temperature are applied to these variable impedances values. An abnormal heating of the amplifier is an indication of an impedance mismatch that must be corrected to restore a minimum temperature.

Claims

1. A method of matching an impedance of a transmission channel having an output amplifier stage connected to a load via a matching network having a variable impedance, the method comprising: measuring a temperature of the output amplifier stage with a temperature sensor to produce a measuring signal; supplying the measuring signal to an input of a control circuit to control the variable impedance of the matching network; and varying said variable impedance with the control circuit to minimize said temperature.

2. The method of claim 1, further comprising measuring a second temperature of an integrated circuit containing the output amplifier stage with a second temperature sensor positioned more distant from the output amplifier stage than the temperature sensor, wherein the measuring signal is based on a difference between the temperature and the second temperature.

3. A transmission channel comprising: an integrated circuit comprising at least one output amplifier stage; a measuring circuit comprising a temperature sensor configured to measure a temperature of the at least one output amplifier stage; and a matching network positioned between the at least one output amplifier stage and a load, the matching network comprising a variable impedance and a control circuit wherein said control circuit is configured to receive a temperature measuring signal generated by said measuring circuit and to vary said variable impedances of said matching network to minimize the measured temperature.

4. The transmission channel of claim 3, further comprising a second temperature sensor positioned on the integrated circuit and distanced from the at least one output amplifier stage, wherein the measuring circuit is configured to generate a signal representing a difference in temperature sensed by the temperature sensor and the second temperature sensor.

5. The transmission channel of claim 3, wherein the matching network comprises three reactive impedances in a form of a T or Pi, at least one of the reactive impendences being variable.

6. The transmission channel of claim 4, wherein the matching network comprises three reactive impedances in a form of a T or Pi, at least one of the three reactive impedances being variable.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Other characteristics and advantages of the invention will become evident from a reading of the detailed description which follows and which is given with reference to the attached drawings, in which:

(2) FIG. 1 shows the basic diagram of the invention;

(3) FIG. 2 shows a refinement with two temperature sensors;

(4) FIG. 3 shows a temperature-sensing circuit usable in the method according to the invention;

(5) FIG. 4 shows a power amplifier to which the invention can be applied; and

(6) FIGS. 5A and 5B show an experimental validation of the principle of the invention.

DETAILED DESCRIPTION

(7) FIG. 1 shows the basic diagram of the invention. The typical example to which the invention is applied is a radiofrequency transmission channel, the output stage of which includes a power amplifier PA receiving signals V.sub.in to be amplified and feeding a load which may be an antenna ANT. The output stage amplifier is designed to operate in an optimum manner when the load applied to its output has a nominal impedance Z.sub.opt and when the operating frequency is F.sub.0, corresponding to a pulse ω.sub.0=2π.Math.F.sub.0. At high frequency, the impedance Z.sub.opt will generally be complex and a function of the frequency.

(8) A matching network MN is inserted in series between the output of the amplifier PA and the antenna ANT. This configuration could also include a filter between the amplifier PA and the network MN and/or a filter between the network MN and the antenna. The matching network consists of inductors and capacitors, of which some values (preferably capacitance values) are adjustable.

(9) The purpose of the matching network MN is to ensure that the amplifier load is equal to the optimum impedance Z.sub.opt of the amplifier or is as close as possible to this optimum impedance. The amplifier load essentially consists of the network MN, itself loaded by the antenna ANT.

(10) The simplest implementation of the matching network is a circuit comprising three reactive impedances in the form of a T or Pi, for example one capacitor and two inductors or better one inductor and two capacitors. At least one of these impedances is variable, but in practice two of the impedances will be variable. Two variable capacitors and one fixed inductor will preferably be used, given that it is easier to implement precise variable capacitors than variable inductors. The matching network may also have a plurality of cascaded stages if the mismatch runs the risk of being particularly great. In this case, each stage may consist of a simple assembly comprising three reactive impedances in the form of a T or Pi with, in principle, two variable reactive impedances in each stage.

(11) A control circuit CTRL allows the impedances of the matching network to be modified. It acts to impose required values on the variable impedances of the circuit. For example, if the variable impedances are capacitors, it can be provided that the network comprises a plurality of capacitors of different values; the control circuit CTRL then acts to select a capacitor from the available capacitors. Alternatively, an adjustable-value capacitor can be formed by parallelizing a plurality of capacitors, the values of which represent different loads, wherein the control circuit acts to select those of the capacitors that must be parallelized in order to obtain a required value. A variable capacitor can also be implemented by an element controllable by an electrical voltage (varactor diode for example).

(12) The control circuit CTRL acts under the control of a measuring circuit MC which receives information from a temperature sensor TS1 physically located in the immediate vicinity of the power amplifier PA. The measuring circuit provides information relating to the local temperature variations produced by the amplifier. The power amplifier is formed in an integrated circuit IC, in the same way as the different processing circuits CE which supply the amplifier PA with a radiofrequency input signal to be amplified. The temperature sensor TS1 is positioned in this integrated circuit and close to the amplifier output transistors in such a way as to respond as soon as possible to the temperature variations due to the operation of the amplifier.

(13) The matching network MN and the control circuit CTRL do not necessarily form part of the integrated circuit; they have been shown outside the chip of the integrated circuit IC.

(14) An abnormally high heating of the amplifier produces an abnormal temperature increase in the vicinity of the amplifier PA; this increase is an indication of a possible mismatching of the amplifier. In fact, this mismatching manifests itself as an excessively high consumed power in relation to the transmitted power, i.e. abnormal power losses in the amplifier.

(15) The temperature variations are obviously slow variations which are not affected by a high-frequency modulation due to the amplified signal itself, even if the distance between the power elements which dissipate the heat and the temperature sensor is very short (a few tens or hundreds of micrometers, for example).

(16) The control circuit CTRL receives information representing the temperature in the vicinity of the output stage amplifier from the measuring circuit MC; it runs a search algorithm seeking to minimize the temperature. This algorithm may consist quite simply in a systematic exploration of all the possible values of the variable impedances of the network MN and an observation of the heating in each case. The circuit then makes a decision regarding the choice of variable impedance values which minimizes the heating of the amplifier, as an absolute value if there is only one temperature sensor TS1, as a differential value if there are two sensors TS1 and TS2 at a distance from one another.

(17) The amplifier PA can operate in class A so that the consumed power does not depend on the amplified signal level. Otherwise, the optimum matching search algorithm is run in prior calibration mode, with a constant input signal level.

(18) As shown in FIG. 2, the measuring circuit MC preferably uses two temperature sensors positioned on the integrated circuit, one (TS1) in the immediate vicinity of the power amplifier, the other (TS2) distant from the amplifier, at a location where the dissipation variations of the amplifier do not affect or only very slowly affect the local temperature. The measuring circuit MC is then a differential circuit which supplies a signal which is a function (preferably a proportional function) of the difference between the local temperature of the amplifier stage, measured by the sensor TS1, and the average temperature of the integrated circuit chip, measured by the sensor TS2. The signal supplied by the measuring circuit does not therefore depend on the temperature conditions associated with the environment, but only on the actual operation of the transmission channel.

(19) FIG. 3 shows an example of a measuring circuit MC operating in a differential manner with two transistors NPN Q1 and Q2 which make up the two temperature sensors TS1 and TS2 respectively. The transistors Q1 and Q2 are located physically at a distance from one another in the integrated circuit, as explained with reference to FIG. 2, FIG. 3 showing only the basic electrical diagram of the connections of the different elements. The transistors Q1 and Q2 are mounted in two differential branches fed by a common current I.sub.BIAS. The two transistors have their bases interconnected and their emitters interconnected. The current-voltage characteristics of the transistors vary as a function of the temperature, in such a way that, for the same base-emitter voltage, the collector currents of the two transistors are different if their temperatures are different, the sum of these currents remaining constant. The transistor Q2 is diode-connected, i.e. its base is connected to its collector.

(20) The load in series with the collector of the transistor Q2 is a diode-connected PMOS transistor M2 (collector and bass connected). The current of the transistor M2 is copied by a PMOS transistor M4 which feeds a diode-connected NMOS transistor M6. The current of the transistor M6 is copied by an NMOS transistor M7.

(21) Similarly, the collector load of the transistor Q1 is a diode-connected PMOS transistor M1. The current of the transistor M1 is copied by a PMOS transistor M3 which is in series with the transistor M7. The junction point of the transistors M3 and M7 makes up the output of the monitoring circuit. It supplies a control voltage Vc representing the unbalance of the currents passing through the transistors Q1 and Q2, i.e. the unbalance of the temperatures of the two transistors. This control voltage represents the temperature information (here differential information).

(22) The response curve of this measuring circuit (curve of the output voltage Vc as a function of the temperature difference T1−T2 between the two measuring points) can be adjusted by shunting a current I.sub.DER of the collector of the transistor Q1 to ground. The adjustment of this shunt current I.sub.DER by a calibration signal (cal) enables modification of the range of temperature differences in which the circuit supplies a more or less linear response as a function of the temperature difference. The linear response is, for example, around 0.2V/° C. in the range where T1−T2 goes from 2 to 5° for a certain value of I.sub.DER and from 0.2V/° C. in the range from 5 to 8° C. for a different value of I.sub.DER. The shunt current source may be a simple NMOS transistor, the adjustment of the current being made by the adjustment of the voltage applied between the gate and the source of the transistor.

(23) The measuring circuit shown in FIG. 3 is given simply by way of example, and other circuits could also provide a voltage or a current as a function of a temperature difference existing between two points of the integrated circuit.

(24) FIG. 4 shows an example of a radiofrequency power amplifier PA to which the invention can be applied. This amplifier is described in detail in the article by N. Deltimple, J. L. Gonzalez, J. Altet, Y. Luque and E. Kerherve, “Design of a fully integrated CMOS self-testable RF power amplifier using a thermal sensor” Proceedings of the ESSCIRC 2012, 17-21 Sep. 2012, pp. 398-401.

(25) The amplifier includes an input filter which is a bandpass filter in the frequency range to be amplified; in this example, the filter is made up of two inductors L1 and L2 in series, two capacitors C1 and C2 connecting the ends of the inductor L2 to ground, and two decoupling capacitors C3 and C4. The input impedance seen from the input of this filter is 50 ohms and the voltage to be amplified is applied to the input V.sub.IN of the filter. The decoupling capacitors C3 and C4, connected on the one hand to the inductor L2 and to the capacitor C2, are furthermore connected to the two NMOS transistor gates NM1 and NM2 respectively. These transistors are in series. The gates are biased by continuous bias voltages V.sub.BIAS1 and V.sub.BIAS2. The combination in series of the transistors NM1 and NM2 is in series with an NMOS cascode transistor NM3 also, the gate of which is biased by a continuous voltage V.sub.BIAS3, and with an inductor L3 connected to a supply voltage Vdd. The transistor NM3 plays a role of level translator. The gate of NM3 can be connected to ground via a decoupling capacitor C5. The junction point between the drain of the transistor NM3 and the inductor L3 is connected to a combination in series of a capacitor C6 and an inductor L4 connected to ground. The output V.sub.OUT of this power stage, filtered by the high-pass filter C6, L4, is taken at the junction point between the capacitor C6 and the inductor L4. The output impedance of this power stage is 50 ohms.

(26) The temperature sensor TS1 shown in FIG. 2 and which may be the transistor Q1 shown in FIG. 3 is positioned physically in the immediate vicinity of the transistors NM1 and NM2. The temperature sensor TS2 is positioned at a different location of the integrated circuit chip, distant from the transistors NM1 and NM2.

(27) The principle of the invention was tested by connecting the amplifier output PA shown in FIG. 4 to a variable impedance, modeling the effect of the modification of a matching network MN in the presence of a fixed antenna impedance.

(28) FIG. 5A is a Smith chart normalized in relation to a 50 Ohm impedance on which approximately circular curves are plotted, corresponding to respective amplifier efficiency values. In other words, each curve is obtained by interconnecting points which represent load impedance values resulting in the same amplifier inefficiency. The innermost curve corresponds to the best impedance matching, and therefore the highest efficiency (8.7%).

(29) FIG. 5B is a Smith chart, similarly normalized in relation to a 50 Ohm impedance on which approximately circular curves are plotted, corresponding to respective voltage values at the output of the temperature sensor TS1. In other words, each curve is obtained by interconnecting points which represent load impedance values resulting in the same measured temperature. The innermost curve corresponds to the lowest output voltage of the sensor (197 mV), and therefore the lowest measured temperature.

(30) It can be checked through comparison between FIGS. 5A and 5B that the highest efficiency is achieved for the impedance values which minimize the measured temperature, thereby validating the principle on which the invention is based. Furthermore, FIG. 5B shows that the temperature is a convex function of the complex impedance, thus enabling the application of well-known convex optimization algorithms in order to implement the impedance matching.