Drivers and driving methods for a LED string, capable of providing LED short protection or avoiding LED flickering
09730283 · 2017-08-08
Assignee
Inventors
Cpc classification
H05B45/50
ELECTRICITY
Y02B20/30
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
International classification
Abstract
The disclosure regards to drivers and driving methods for a LED string consisting of LEDs. The LED string and a current switch are coupled in series between a power line and a ground line. The power line is powered to regulate a signal representing a current passing through the LED string. An enable signal capable of switching the current switch is provided. Whether a predetermined event occurs is detected. When the predetermined event occurs, the enable signal is clamped to have a predetermined logic value, the current switch thereby being kept either open or short.
Claims
1. A driver for driving a LED string consisting of LEDs, the driver comprising: a current switch connected in series with the LED string between a power line and a ground line; and a switched mode power supply, for powering the power line to regulate a signal representing a current passing through the LED string, wherein the switched mode power supply comprises an enable node and a clamping circuit; wherein an enable signal at the enable node is capable of switching the current switch; and when a predetermined event occurs the clamping circuit clamps the enable signal to have a predetermined logic value, the current switch thereby being kept either open or short.
2. The driver as claimed in claim 1, wherein the switched mode power supply comprises a power switch, and is configured to provide a PWM signal to control the power switch.
3. The driver as claimed in claim 2, wherein the enable signal, if asserted, is capable of activating the switched mode power supply to provide the PWM signal, and, if deasserted, is capable of stopping the switched mode power supply from providing the PWM signal.
4. The driver as claimed in claim 3, wherein the clamping circuit clamps the enable signal to be asserted and to make the current switch short for a period of time when a rising edge of the enable signal occurs.
5. The driver as claimed in claim 1, further comprising a level shifter coupled between the current switch and the enable node, for level shifting the enable signal to control the current switch.
6. The driver as claimed in claim 1, wherein if a disable time period when the enable signal stays as being deasserted exceeds a predetermined period of time, the switched mode power supply begins operating in a power-saving mode.
7. A driving method for a LED string consisting of LEDs, comprising: coupling the LED string and a current switch in series between a power line and a ground line; providing a switched mode power supply to power the power line and to regulate a signal representing a current passing through the LED string; providing an enable signal capable of switching the current switch and activating the switched mode power supply; detecting whether a predetermined event occurs; and clamping, when the predetermined event occurs, the enable signal to have a predetermined logic value, the current switch thereby being kept either open or short.
8. The driving method as claimed in claim 7, wherein the predetermined event is the occurrence of a rising edge of the enable signal, and the driving method further comprises clamping, when the predetermined event occurs, the enable signal to be asserted and to make the current switch short.
9. The driving method as claimed in claim 8, comprising: clamping, during a minimum duration after the happening of the predetermined event, the enable signal to be asserted, the LED string thereby having a minimum ON time; and stopping clamping the enable signal after the expiration of the minimum duration.
10. The driving method as claimed in claim 9, wherein the switched mode power supply operates with a cycle time to power the power line, and the minimum duration is a plurality of cycle times.
11. A driver for driving a LED string consisting of LEDs, the driver comprising: a current switch connected in series with the LED string between a power line and a ground line; and a switched mode power supply, for being activated to power the power line and to regulate a signal representing a current passing through the LED string, comprising: an enable node, wherein an enable signal at the enable node is capable of activating the switched mode power supply and turning ON the current switch at the same time, and deactivating the switched mode power supply and turning OFF the current switch at the same time; a clamping circuit for clamping the enable signal to have a predetermined logic value for a period of time; and a timer, for timing and stopping the clamp circuit from clamping the enable signal when the period of time expires.
12. The driver as claimed in claim 11, comprising: a level shift coupled between the current switch and the enable node, for level shifting the enable signal to control the current switch.
13. The driver as claimed in claim 11, wherein the switched mode power supply comprises a power switch, a PWM signal is provided to the power switch when the enable signal activates the switched mode power supply, and the power switch is constantly turned OFF when the enable signal deactivates the switched mode power supply.
14. The driver as claimed in claim 13, wherein the period of time starts when the enable signal has a rising edge.
15. The driver as claimed in claim 13, wherein the period of time starts when the enable signal has a falling edge.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The invention can be more fully understood by the subsequent detailed description and examples with references made to the accompanying drawings, wherein:
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DETAILED DESCRIPTION
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(11) The dimming controller 34 has a resister 38 and a level shifter 20. The resistor 38 is coupled between a dimming node DIM and an enable node EN of the power controller 36, and the level shifter 20 between the enable node EN and a control node of the current switch 22. In the occasions when the power controller 36 does not drive the enable node EN, the power controller 36 provides high input impedance to the enable node EN, and a dimming signal S.sub.DIM at the dimming node DIM alone controls the power controller 36 and the current switch 22. In other words, in these occasions, an asserted dimming signal S.sub.DIM, “1” in logic, enables the power controller 36 to cause power conversion for powering the output power line OUT, and turns ON the current switch 22, while an deasserted dimming signal S.sub.DIM disable the power controller 36 to interrupt the power conversion and turns OFF the current switch 22.
(12) Nevertheless, in some occasions the power controller 36 does drive the enable node EN, clamping the enable signal S.sub.EN to be either “1” or “0” in logic, based on different conditions. When the enable node EN is driven by the power controller 36, due to the existence of the resistor 38, the enable signal S.sub.EN has, for controlling the current switch 22, a higher priority than the dimming signal S.sub.DIM. In other words, when the power controller 36 drives the enable node EN, the logic levels of the enable signal S.sub.EN and the dimming signal S.sub.DIM might differ, and the current switch 22 is under the control of the power controller 36. When the power controller 36 leaves the enable node to be high input impedance, the current switch 22 is under the control of the dimming signal S.sub.DIM, and both the enable signal S.sub.EN and the dimming signal S.sub.DIM share the same logic value.
(13) In one embodiment, when the enable signal S.sub.EN is asserted, “1” in logic, the power controller 36 generates pulse-width-modulation (PWM) signal S.sub.DRV at the driving node DRV, to periodically switch the power switch 16 for powering the output power line OUT and building up power source V.sub.OUT, to regulate the feedback voltage V.sub.FB. For example, the power controller 36 modulates the duty cycle of the PWM signal S.sub.DRV to stabilize the feedback voltage V.sub.FB at 0.3V, and to accordingly provide a substantially constant current for lighting the LED string 12. At the same time, the asserted enable signal S.sub.EN, via the level-shifting provided by the level shifter 20, turns ON the current switch 22.
(14) When the enable signal S.sub.EN is deasserted, “0” in logic, the power controller 36 makes pulse-width-modulation (PWM) signal S.sub.DRV “0” in logic, to constantly turn the power switch 16 OFF, stopping the power conversion. At the same time, the deasserted enable signal S.sub.EN, via the level-shifting provided by the level shifter 20, becomes the signal S.sub.MOSDIM to turn OFF the current switch 22.
(15) Included in the power controller 36 are a booster controller 39, a comparator 40, a SR flip-flop 42, a clamping switch 44 and a timer 46, where the latter five apparatuses construct a LED protection circuit.
(16) The comparator 40 detects the feedback voltage V.sub.FB, which equally represents the current flowing through the resistor 26 and the LED string 12. During normal operation when no abnormal event happens and the LED string 12 is intended to illuminate, the feedback voltage V.sub.FB is about 0.3V, less than 0.5V, such that, in logic, the output of the comparator 40 is “0”, the Q output of the SR flip-flop 42 “0”, causing the clamping switch 44 an open circuit. As the clamping switch 44 does not clamp the enable node EN to the ground line, the enable signal S.sub.EN could have the same logic value with the dimming signal S.sub.DIM.
(17) As discussed previously, once an LED short event occurs to the LED string 12, the feedback voltage V.sub.FB rises from 0.3V, quickly. At the time when it exceeds 0.5V, the comparator 40 sets the SR flip-flop 42 and the fault signal S.sub.Fault output from the SR flip-flop 42 becomes “1” in logic, turning ON the clamping switch 44 and clamping the enable node EN to the ground line. The enable signal S.sub.EN becomes solidly “0”, irrespective of which logic value the dimming signal S.sub.DIM is. As the enable signal S.sub.EN is “0”, the booster controller 39 turns OFF the power switch 16, and the level shifter 20 OFF the current switch 22. Since the current switch 22 begins reducing the current flowing through the resistor 26, the feedback voltage V.sub.FB then drops, such that an over-high-voltage feedback voltage V.sub.FB is avoided and damage therefrom is prevented. Accordingly, an LED short protection is performed.
(18) This LED short protection is not dismissed even when the feedback voltage V.sub.FB drops down to 0.5V due to the turning OFF of the current switch 22. It is because the fault signal S.sub.Fault could still be “1”, as memorized by the SR flip-flop 42, to continuously clamp the enable signal S.sub.EN to “0” in logic.
(19) The power controller 36 periodically dismisses the LED short protection, though, to stop clamping the enable signal S.sub.EN. The timer 46 starts timing at the moment when the enable signal S.sub.EN turns to “0” in logic, or when the falling edge of the enable signal S.sub.EN occurs. Once the timer 46 finds that the disable time when the enable signal S.sub.EN continuously stays in “0” exceeds a preset valid period T.sub.OUT, it turns the power-saving signal S.sub.PD of its output from “0” to “1”, to reset the SR flip-flop 42, to make the fault signal S.sub.Fault “0” in logic, and to release the enable signal S.sub.EN from being clamped by the clamping switch 44. After then, the enable signal S.sub.EN starts to follow the dimming signal S.sub.DIM, and the LED short protection is dismissed. In case that the dimming signal S.sub.DIM is “1” in logic and the LED short event has not been resolved, once the enable signal S.sub.EN is seemingly determined to be “1”, the timer 46 resets, the power-saving signal S.sub.PD turns from “1” to “0”, and the feedback voltage V.sub.FB starts rising up quickly due to the continuous existence of the LED short event. Once again the feedback voltage V.sub.FB will exceed 0.5V to trigger the LED short protection. Therefore, the power controller 36 periodically activates and dismisses the LED short protection. Only if the LED short event is resolved and the timer 46 has reset the SR flip-flop 42 to dismiss the LED short protection, then the power controller 36 could be controlled by the dimming signal S.sub.DIM, operating in a normal condition.
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(21) Please refer to both
(22) At time t.sub.1, the signal S.sub.LEDSHT turns from “0” to “1”, to mimic the happening of the LED short event. As a result, the feedback voltage V.sub.FB rises abruptly from 0.3V.
(23) At time t.sub.2 when the feedback voltage V.sub.FB reaches 0.5V, the LED short protection is triggered. As analyzed previously, the SR flip-flop 42 turns the fault signal S.sub.Fault from “0” to “1”, clamping the enable signal S.sub.EN at “0” in logic, such that both the PWM signal S.sub.DRV and the switch signal S.sub.MOSDIM both become “0” in logic. Meanwhile, as the falling edge of the enable signal S.sub.EN occurs, the timer 46 starts timing. Furthermore, as the current switch 22 becomes an open circuit, the feedback voltage V.sub.FB begins dropping.
(24) At time t.sub.3, the timer 46 acknowledges, byway of its timing, that the disable time period when the enable signal S.sub.EN is “0” has exceeded a preset valid period T.sub.OUT. In other words, the LED short protection expires. Therefore, the timer 46 asserts the power-saving signal S.sub.PD to provide a timeout for the LED short protection. The Asserted power-saving sign S.sub.PD resets the fault signal S.sub.Fault, releasing the clamping to the enable signal S.sub.EN and dismissing the LED short protection. It is therefore the enable signal S.sub.EN starts to follow the dimming signal S.sub.DIM. Since the LED short event has not been resolved as the signal S.sub.LEDSHT is still “1”, the feedback voltage V.sub.FB rises steeply.
(25) At time t.sub.4, the feedback voltage V.sub.FB reaches 0.5V, similar with what happened at time t.sub.2. Therefore, the LED short protection is triggered once more. It can be concluded that if the LED short event is not resolved the power controller 36 will periodically activate and dismiss the LED short protection.
(26) At time t.sub.5 when the LED short event is resolved by means of turning the signal S.sub.LEDSHT to “0”, the LED short protection is not immediately dismissed because the LED short protection has not expired. The timer 46 finds the expiration of the LED short protection at time t.sub.6, such that the LED protection is dismissed and the power controller 36 recovers to the normal operations as it did prior to time t.sub.1.
(27) As shown in
(28) When the enable signal S.sub.EN is “1”, asserted, the booster controller 39 provides the PWM signal S.sub.DRV to periodically switch, with a cycle time defined by the oscillator 37, the power switch 16 ON and OFF, based on the feedback voltage V.sub.FB, as illustrated in the period between times t.sub.0 and t.sub.1 of
(29) Based on the previous teaching, the LED driver 30 of
(30) 1. LED short protection: When the LED short event occurs the power controller 36 could timely switch off the power conversion, preventing the feedback voltage V.sub.FB from being over high to cause any damage.
(31) 2. Automatic recovery to normal operation after the LED short event vanishes: When the LED short protection expires the power controller 36 temporarily dismisses the LED short protection, and if the LED short event is not resolved this LED short protection resumes soon. A timeout of the LED short protection is thus provided. During the timeout, if the LED short event vanished, the power controller 36 automatically starts to operate normally, making the LED string 12 illuminate for example. Namely, the timeout of the LED short protection provides an opportunity for the power controller 36 to automatically recover to its normal operation if the LED short event is resolved.
(32) 3. Power saving: The dimming signal S.sub.DIM, if having been deasserted for a long time enough, can render the power controller 36 to operate in a power-saving mode and reduce power consumption.
(33) The prior art taught in
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(35) The power controller 83 includes a clamping circuit 84, which comprises a rising-edge-triggered pulse generator 86 and a clamping switch 88. When a rising edge of the enable signal S.sub.EN occurs, meaning that it turns from “0” to “1” in logic, the rising-edge-triggered pulse generator 86 generates a pulse S.sub.PLS with a pulse width of minimum duration T.sub.MIN-ON. This pulse S.sub.PLS makes the enable signal S.sub.EN clamped to be 5V in voltage level, or “1” in logic, for the minimum duration T.sub.MIN-ON irrespective of the present logic value of the dimming signal S.sub.DIM. The pulse S.sub.PLS vanishes after the minimum duration T.sub.MIN-ON and the clamping switch 88 stops clamping the enable signal S.sub.EN, letting the enable signal S.sub.EN follow the dimming signal S.sub.DIM. As indicated in the previous teaching, when the enable signal S.sub.EN is asserted, “1” in logic, the LED string 12 illuminates.
(36) Two time diagrams are shown in
(37) In one embodiment, the minimum duration T.sub.MIN-ON is two or three cycle times of the PWM signal S.sub.DRV. In other words, the minimum duration T.sub.MIN-ON could be decided by the oscillator 37.
(38) The LED short protection of
(39) While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.