Component with Buried Doped Areas and Procedures for the Production of A Component

Abstract

In an embodiment, a component includes a carrier and a main body disposed on the carrier, wherein the main body includes a first semiconductor layer of a first charge carrier type, a second semiconductor layer of a second charge carrier type, and an optically active zone located therebetween, the optically active zone configured to emit radiation, wherein the first semiconductor layer includes a contiguous main layer and local regions at least locally buried in the main layer and laterally enclosed by the main layer, wherein the local regions are doped, and wherein the local regions has a smaller vertical layer thickness compared to the first semiconductor layer.

Claims

1.-18. (canceled)

19. A component comprising: a carrier; and a main body disposed on the carrier, wherein the main body comprises a first semiconductor layer of a first charge carrier type, a second semiconductor layer of a second charge carrier type, and an optically active zone located therebetween, the optically active zone configured to emit radiation, wherein the first semiconductor layer comprises a contiguous main layer and local regions at least locally buried in the main layer and laterally enclosed by the main layer, wherein the local regions are doped, and wherein the local regions has a smaller vertical layer thickness compared to the first semiconductor layer.

20. The component according to claim 19, wherein the local regions are individual laterally spaced regions of the first semiconductor layer, and wherein the main layer is disposed in a vertical direction at least partially between the active zone and the local regions.

21. The component according to claim 19, wherein the local regions and the main layer are based on the same semiconductor material, the main layer having a greater maximum vertical layer thickness than the local regions.

22. The component according to claim 19, wherein the main layer has a first doping concentration and the local regions have a doping concentration differing by at least 5% from the first doping concentration.

23. The component according to claim 19, wherein the first semiconductor layer is n-type, wherein the main layer has a maximum dopant concentration between 4.Math.10.sup.18 cm.sup.−3 and 4.Math.10.sup.19 cm.sup.−3 inclusive, wherein the local regions are implemented in places as current distribution bridges having a lower electrical resistance than the main layer, and wherein a doping concentration of the current distribution bridges is at least 5% greater than a doping concentration of the main layer.

24. The component according to claim 19, wherein the first semiconductor layer is n-type, wherein the main layer has a maximum dopant concentration between 4.Math.10.sup.18 cm.sup.−3 and 4.Math.10.sup.19 cm.sup.−3 inclusive, wherein the local regions are implemented in places as optically favored windows having a greater transmittance than the main layer for the radiation, and wherein the optically favored windows have a doping concentration which is at least 5% smaller than a doping concentration of the main layer.

25. The component according to claim 19, wherein the first semiconductor layer is p-type, wherein the main layer has a maximum doping concentration of between 1.Math.10.sup.17 cm.sup.−3 and 3.Math.10.sup.18 cm.sup.−3 inclusive, wherein the local regions are implemented in places as current distribution bridges having a lower electrical resistance than the main layer, and wherein a doping concentration of the current distribution bridges is at least 5% greater than a doping concentration of the main layer.

26. The component according to claim 19, wherein the first semiconductor layer is p-type, wherein the main layer has a maximum doping concentration of between 1.Math.10.sup.17 cm.sup.−3 and 3.Math.10.sup.18 cm.sup.−3 inclusive, wherein the local regions are implemented in places as optically favored windows which have a greater transmittance than the main layer for the radiation, and wherein the optically favored windows have a doping concentration which is at least 5% smaller than the doping concentration of the main layer.

27. The component according to claim 19, wherein the local regions are formed in places as current distribution bridges and in places as optically favored windows, the current distribution bridges having a higher doping concentration than the optically favored windows.

28. The component according to claim 19, wherein the second semiconductor layer comprises a contiguous main layer and local regions, wherein the local regions are buried at least in places in the main layer of the second semiconductor layer and are laterally enclosed by the main layer of the second semiconductor layer, wherein the local regions are doped, and wherein the local regions have a smaller vertical layer thickness compared to the second semiconductor layer.

29. The component according to claim 19, wherein the component has a plurality of laterally spaced through-vias, wherein the through-vias extend throughout the second semiconductor layer and the active zone into the first semiconductor layer in order to provide electrically contacting for the first semiconductor layer, and wherein, in top view of the carrier, at least some of the through-vias overlap with the local regions formed as current distribution bridges.

30. The component according to claim 19, wherein the component has a plurality of laterally spaced through-vias, wherein the through-vias extend throughout the second semiconductor layer and the active zone into the first semiconductor layer in order to provide electrically contacting for the first semiconductor layer, and wherein, in top view of the carrier, the through-vias and the local regions formed as optically favored windows are free of overlaps.

31. The component according to claim 19, wherein the component comprises a contact point for externally electrically contacting the component, wherein the local regions are formed in areas as current distribution bridges, and the current distribution bridges have a gradient with respect to their doping concentration so that the current distribution bridges having a first lateral distance from the contact point have a higher doping concentration than the current distribution bridges having a second lateral distance from the contact point, and wherein the first distance is smaller than the second distance.

32. The component according to claim 19, wherein the optically active zone has an internal vertical step in the main body, and wherein each of the first semiconductor layer and the second semiconductor layer has a corresponding vertical jump at the step of the active zone.

33. The component according to claim 19, further comprising out-coupling structures configured to increase an out-coupling efficiency of the radiation, and wherein the out-coupling structures are located in places on the main body and/or within the main body.

34. A light source comprising: the component according to claim 19, wherein the optically active zone is configured to generate the radiation in a visible, an infrared or an ultraviolet spectral range.

35. A method for producing a component having a main body comprising a first semiconductor layer of a first carrier type, a second semiconductor layer of a second carrier type, and an optically active zone located therebetween, the method comprising: forming a plurality of laterally spaced and doped regions from a semiconductor material on a growth substrate; and overgrowing the doped regions with semiconductor materials to form the main body in such that the doped regions are formed as integral subregions of the first semiconductor layer, wherein the first semiconductor layer comprises a contiguous main layer, wherein the doped regions are at least locally buried in the main layer and laterally enclosed by the main layer, wherein the doped regions adjust local electrical and local optical properties of the first semiconductor layer, and wherein the local regions have a smaller vertical layer thickness compared to the first semiconductor layer.

36. The method according to claim 35, further comprising forming a plurality of laterally spaced through-vias, the through-vias for electrically contacting the first semiconductor layer in such that the through-vias extend throughout the second semiconductor layer and the active zone into the first semiconductor layer, and the through-vias are formed in an aligned manner with respect to local buried doped regions.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Further embodiments and further developments of the component or the method will be apparent from the embodiments explained below in connection with FIGS. 1A to 10.

[0047] FIGS. 1A, 1B, and 1C show schematic illustrations of various comparative examples of a component;

[0048] FIGS. 2A, 2B, 2C, 2D, and 2E show schematic illustrations of an embodiment of a component;

[0049] FIGS. 3A, 3B, 4A and 4B show schematic illustrations of a further embodiment of a component;

[0050] FIGS. 5A, 5B, and 5C show schematic illustrations explaining the basic principle of a component described herein;

[0051] FIGS. 6A, 6B, 6C, 7A and 7B show schematic illustrations of some method steps of an embodiment for producing a component;

[0052] FIGS. 8A and 8B show schematic representations of some curves with respect to the doping concentration or curves depending on the different doping concentrations; and

[0053] FIGS. 9A, 9B, 9C and 10 show schematic representations of further examples of embodiments of a component.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

[0054] Identical, equivalent or equivalently acting elements are indicated with the same reference numerals in the figures. The figures are schematic illustrations and thus not necessarily true to scale. Comparatively small elements and particularly layer thicknesses can rather be illustrated exaggeratedly large for the purpose of better clarification.

[0055] Referring to FIG. 1A, a comparative example of a component 10 is schematically shown, which comprises a carrier 1 and a main body 2 disposed on the carrier 1. The main body 2 may be a semiconductor body 2. In particular, the carrier 1 is a growth substrate 1A on which the semiconductor body 2 is epitaxially grown. It is possible that the carrier 1 is formed to be radiation-transmissive. The carrier 1 may be a sapphire substrate 1A or a semiconductor substrate 1A. The component 10 has a front side 11 and a rear side 12 opposite to the front side 11. For example, the front side 11 is formed as a radiation exit side or a radiation entrance side of the component 10. It is possible that the component 10 is externally electrically contactable via the rear side 12, in particular exclusively via the rear side 12.

[0056] The main body 2 comprises a first semiconductor layer 21, a second semiconductor layer 22 and an optically active zone 23 arranged between the first semiconductor layer 21 and the second semiconductor layer 22. In operation of the component 10, the active zone 23 is particularly configured for generating or detecting electromagnetic radiation. Preferably, the first semiconductor layer 21 is n-type. In this case, the second semiconductor layer 22 is p-type. However, it is also possible that the first semiconductor layer 21 is p-type and the first semiconductor layer 22 is n-type.

[0057] For electrically contacting the main body 2 or the component 10, the component 10 has a plurality of through-vias 20. The through-vias 20 extend along the vertical direction, in particular throughout the second semiconductor layer 22 and the optically active zone 23 into the first semiconductor layer 21. The through-via 20 is enclosed in lateral directions by an insulating structure 20I. The insulating structure 20I prevents direct electrical contact between the through-via 20 and the second semiconductor layer 22, and between the through-via 20 and the optically active zone 23. The insulating structure 20I extends along the vertical direction analogously to the through-via 20 throughout the second semiconductor layer 22 and the optically active zone 23 into the first semiconductor layer 21. In particular, the through-via 20 is in direct electrical contact with the first semiconductor layer 21. For electrically contacting the second semiconductor layer 22, the component 10 may have an electrical contact point on the second semiconductor layer 22 which is not shown in FIG. 1A.

[0058] The exemplary embodiment of a component 10 shown in FIG. 1B is substantially the same as the component 10 shown in FIG. 1A, except that the component 10 has a carrier 1 that is different from a growth substrate. For example, the carrier 1 comprises a base body 1C made of metal, ceramic or plastic. Furthermore, the carrier 1 comprises a first connection layer 60 and a first contact layer 61 for electrically contacting the through-vias 20.

[0059] The through-vias 20, for instance all of the through-vias 20, may be electrically connected to each other via the first connection layer 60. For example, the first connection layer 60 may be externally electrically contactable via the contact layer 61. The first contact layer 61 may be arranged laterally to the connection layer 60 and have the form of a contact surface or a contact pad, or—as schematically shown in FIG. 1B—may be arranged on the rear side 12 of the component 10. The base body 1C of the carrier 1 may be electrically conductive. Alternatively, it is possible for the base body 1C of the carrier 1 to be electrically insulating, wherein through-contacts are formed throughout the base body 1C for establishing an electrical connection between the connection layer 60 and the first contact layer 61.

[0060] For electrically contacting the second semiconductor layer 22, the component 10 comprises a second connection layer 50 arranged in the vertical direction between the second semiconductor layer 22 and the first connection layer 60. Referring to FIG. 1B, the first connection layer 60 and the second connection layer 50 are arranged on the same side of the main body 2, with through-vias 20 extending through the second connection layer 50.

[0061] The second connection layer 50 is electrically insulated from the first connection layer 60 and from the through-vias 20 by the insulating structure 20I, which is disposed regionally between the first connection layer 60 and the second connection layer 50. It is possible that the second connection layer 50 is directly adjacent to the second semiconductor layer 22. For external electrical contacting of the second connection layer 50, the component 10 comprises a second contact layer 62. The second contact layer 62 may be arranged laterally to the semiconductor body 2 and may, in particular, have the form of a contact surface or a contact pad.

[0062] As a further difference from the component 10 shown in FIG. 1A, the component 10 shown in FIG. 1B is void of a growth substrate 1A. In particular, the growth substrate 1A is removed, thereby exposing the first semiconductor layer 21. For example, the exposed surface of the first semiconductor layer 21 forms the front side 11 of the component 10.

[0063] In FIG. 1C, the component 10 is schematically shown in a top view of the front side 11. In operation of the component 10, the optically active zone 23 is configured in particular to generate electromagnetic radiation, wherein the front side 11 serves as the radiation exit surface of the component 10.

[0064] As shown schematically in FIG. 1C, an inhomogeneity in the luminance distribution may occur on the front side 11 of the component 10. The front side 11 may exhibit increased luminance in the immediate vicinity of the through-via(s) 20. As the lateral distance from the through-vias 20 increases, the luminance gradually decreases. This is due to the fact that the first semiconductor layer 21 generally has a low transverse electrical conductivity, and therefore the charge carriers are increasingly located in the immediate vicinity of the through-vias 20. In order to increase the electrical conductivity of the first semiconductor layer 21, the first semiconductor layer 21 may be highly doped. However, the high doping concentration in the first semiconductor layer 21 leads to an increased absorption of the electromagnetic radiation generated in the optically active zone 23.

[0065] The exemplary embodiment shown in FIG. 2A is substantially the same as the exemplary embodiment of a component 10 shown in FIG. 1A, except that the layers of the component 10 are shown in slightly more detail. The carrier 1 may be a growth substrate 1A or may have a base body 1C different from the growth substrate 1A. As a further difference from FIG. 1A, the first semiconductor layer 21 shown in FIG. 2A has a main layer 21B and at least one local doped region 3. In terms of doping concentration, the local doped region 3 differs from the main layer 21B by, for example, at least 5%, 10%, 50%, 100% or 1000%. In this respect, the local doped region 3 may have a higher or a lower doping concentration than the main layer 21B.

[0066] In particular, the local doped region 3 is at least partially buried in the main layer 21B. The doped region 3 has a vertical layer thickness 3D that is smaller than a vertical layer thickness 21D of the main layer 21B or a vertical layer thickness 21D of the entire first semiconductor layer 21. For example, a ratio of the vertical layer thickness 21D to the vertical layer thickness 3D is between 1 and 10 inclusive, or between 1 and 5 inclusive, or between 1 and 3 inclusive. The vertical layer thickness 21D may be at least 1.5 times, twice, three times, or at least five times as large as the vertical layer thickness 3D. In a top view of the carrier 1, a surface facing the active zone 23 as well as all side surfaces of the doped region 3 may be covered, in particular completely covered, by the main layer 21B. It is possible that a surface of the doped region 3 facing away from the active zone 23 is free from being covered by the main layer 21B. At this surface, the doped region 3 may be flush with the main layer 21B. In particular, the first semiconductor layer 21 has a plurality of such local doped regions 3.

[0067] In FIG. 2A, it is schematically shown that the local region 3 is formed as a high-doped or higher-doped region 3H, which in particular has a higher concentration of dopants than the main layer 21B. In top view, the through-via 20 may overlap with its associated local higher-doped region 3H. The through-via 20 may comprise a connection layer 20A and a main layer 20B, wherein the connection layer 20A is in particular directly adjacent to the first semiconductor layer 21. The main layer 20B of the through-via 20 may partially or completely cover an opening of the main body 2, and is in particular in direct electrical contact with the connection layer 20A. Along the lateral direction, the doped region 3H may protrude beyond the through-via 20 or at least beyond the connection layer 20A of the through-via 20.

[0068] For electrical contacting of the second semiconductor layer 22, the component 10 has, for example, further connection layers 5 and 50 or at least one contact layer 62, a second connection layer 50 being in particular in direct electrical contact with the second semiconductor layer 22. The second connection layer 50 or the contact layer 62 may be formed as a mirror layer. For electrically insulating the through-via 20 from the active zone 23, the second semiconductor layer 22 and from the connection layers 5 and 50 as well as from the contact layer 62, the component 10 comprises an insulating structure 20I and/or a passivation layer 20P. The insulating structure 20I may be a single layer or a multilayer. The connection layer 20A of the through-via 20 may be completely surrounded by the insulating structure 20I in lateral directions.

[0069] The insulating structure 20I may cover, in particular completely cover, a side surface of the main body 2. At the side surface of the main body 2, the insulating structure 20I forms in particular a diffusion barrier preventing possible leakage currents via the chip edge during chip processing as well as during operation of the component 10.

[0070] In particular, the local higher-doped region 3H is formed as a current distribution bridge. In FIG. 2B, a plurality of such current distribution bridges are schematically shown. The current distribution bridges or the higher-doped regions 3H may be arranged in a star shape around the respective through-vias 20. In other words, the current distribution bridges may start from a through-via 20 in top view and may extend away from the through-via 20 along lateral directions. In particular, the current distribution bridge extends along the lateral direction from one through-vias 20 towards another through-vias 20. For example, the current distribution bridges are arranged such that adjacent through-vias 20 are connected to each other via the current distribution bridges. In top view, the current distribution bridges may form a network that promotes a uniform current density distribution within the first semiconductor layer 21. The network may include a plurality of rows and columns of current distribution bridges.

[0071] The exemplary embodiment shown in FIG. 2C is substantially the same as the exemplary embodiment of a component 10 shown in FIG. 2B. From each of the through-vias 20, the current distribution bridges extend in four different lateral directions. Unlike FIG. 2B, the current distribution bridges starting from different through-vias 20 do not contact each other.

[0072] In top view, the higher-doped regions 3H, in particular implemented as current distribution bridges, may cover a subregion of the surface of the first semiconductor layer 21 for instance between 3% and 40% inclusive, between 3% and 30% inclusive, between 3% and 20% inclusive, or between 3% and 10% inclusive.

[0073] FIGS. 2D and 2E schematically illustrate the higher-doped regions 3H formed as current distribution bridges and their influences in terms of increasing the transverse conductivity within the first semiconductor layer 21.

[0074] The exemplary embodiment illustrated in FIG. 3A essentially corresponds to the exemplary embodiment of a component 10 illustrated in FIG. 2A. In contrast thereto, the local doped regions 3 are formed in particular as low-doped or as lower-doped regions 3N. In particular, the local doped regions 3N are configured as optically favored windows of the first semiconductor layer 21. Preferably, the local doped regions 3N have a lower concentration of dopants and thus a lower absorption coefficient than the main layer 21B. In top view, the lower-doped regions 3N in particular have no or hardly have any overlaps with the associated through-vias 20 or with the connection layers 20A of the through-vias 20.

[0075] In top view, the lower-doped regions 3N may cover a subregion of the surface area of the first semiconductor layer 21 for instance between 20% and 90% inclusive, between 30% and 80% inclusive, between 40% and 70% inclusive, or between 30% and 60% inclusive.

[0076] In FIG. 3B, the lower-doped regions 3N, which are formed in particular as optically favored windows of the component 10, are shown schematically. In top view, the lower-doped regions 3N are arranged in lateral directions, in particular between the through-vias 20. Depending on the application, the component 10 may be divided into smaller components 10. For example, in FIG. 3B, a sub-region is marked which may form a single component 10. The single marked component 10 has an optically favored window 3N adapted to the geometry of this component 10. In this sense, congruent epitaxial structures or doped regions 3 adapted to the geometry of the component 10 may be generated.

[0077] The exemplary embodiment illustrated in FIG. 4A is substantially the same as the exemplary embodiments of a component 10 illustrated in FIGS. 2A and 3A, except that the component 10 has both lower-doped regions 3N and higher-doped regions 3H. Therefore, the features described in connection with FIGS. 2A and 3A can also be applied to the exemplary embodiment illustrated in FIG. 4A. The regions 3H have a higher doping concentration than the regions 3N and/or than the main layer 21B.

[0078] FIG. 4B schematically shows a possible arrangement of the local doped regions 3. The higher-doped regions 3H, which are formed as current-distributing ridges, can each be formed in the form of strips. The lower-doped regions 3N, which are formed as optically favored windows, can be formed as individual regions which are surrounded in lateral directions by the higher-doped regions 3H.

[0079] FIG. 5A schematically illustrates internal circuits in a component 10 without the local doped regions 3 and in a component 10 with the local doped regions 3. The component 10 has a lateral first contact point 61 on the first semiconductor layer 21 and a second contact point 62 on the second semiconductor layer 22. The component 10 may have through-vias 20 or be free of through-vias 20. Such a component 10 without the local doped regions 3 may have inhomogeneities in the current density distribution and thus in particular in the luminance distribution, which are schematically shown for example in FIGS. 5B and 5C on the left side, respectively.

[0080] By using the local doped regions 3, which are implemented in particular as current distribution bridges 3H or as optically favored windows 3N within the first semiconductor layer 21, a uniform current density distribution or a uniform luminance distribution can be achieved, which is schematically shown, for example, on the right side in FIGS. 5B and 5C, respectively. Higher operating currents are possible since the current density is homogeneously distributed over the chip surface. In particular, local hot spots in the immediate vicinity of the through-vias 20 can be avoided. If the component 10 has a laterally arranged contact point 61, the doped regions 3, in particular the more high-doped regions 3H, can be formed in such a way that they have a gradient with respect to the doping concentration, so that the doping concentration decreases in particular with increasing lateral distance from the laterally arranged contact point 61 (FIG. 5C).

[0081] In FIG. 5A, it is schematically shown that the second semiconductor layer 22 may have local doped regions 4 quite analogously to the first semiconductor layer 21. The local doped regions 4 may be higher-doped regions 4H and/or lower-doped regions 4N. The local regions 4 of the second semiconductor layer 22 may be formed quite analogously to the local regions 3 of the first semiconductor layer 21. The features described in connection with the local regions 3, for example, with respect to the position, the design, the layer thickness and/or the doping, can therefore be used analogously for the local regions 4 of the second semiconductor layer 22.

[0082] FIGS. 6A, 6B and 6C schematically illustrate some method steps for producing a component 10 described in particular herein. The features described in connection with the component 10 can therefore also be used for the method, and vice versa.

[0083] Referring to FIG. 6A, a growth substrate 1A is provided. A plurality of laterally spaced and doped regions 3 are formed on the growth substrate 1A. Referring to FIG. 6A, the doped regions 3 are shown to comprise higher-doped regions 3H and lower-doped regions 3N. However, it is possible that the doped regions 3 are exclusively higher-doped regions 3H or exclusively lower-doped regions 3N.

[0084] Regions on the growth substrate 1A may be patterned photo-lithographically to form the doped regions 3. For example, a mask may be formed, in particular formed of a photostructurable material. Epitaxial semiconductor layers are grown in the patterned regions to form the laterally spaced and doped regions 3. Alternatively, it is possible that the semiconductor layers are epitaxially grown over a large area before these layers are patterned into the laterally spaced regions 3. It is also possible that the regions 3 are patterned during epitaxy. If the patterning is performed after epitaxy, the regions 3 may be defined locally at room temperature, which may compensate for expansion effects with respect to temperature change. The local exposure of the photostructurable mask can also be performed at room temperature.

[0085] Depending on the doping concentration, the doped regions 3 have predetermined optical properties and predetermined electrical properties. For example, a refractive index of the doped regions 3 can be set based on the doping concentration. In order to reduce the electrical resistance, the regions 3 may be high-doped. In order to improve the optical properties, in particular with respect to the transmission of light of a certain wavelength, the regions 3 may be formed with a low doping concentration.

[0086] After the formation of the regions 3, the photo-lithographic mask can be removed. The growth substrate 1A may be exposed in some areas. Referring to FIG. 6B, a main layer 21B of the first semiconductor layer 21 may first be deposited on the growth substrate 1A in such a manner that the main layer 21B completely covers the partial regions 3 and completely surrounds them in lateral directions. The lateral gaps between the regions 3, shown for instance in FIG. 6A, are completely filled by the main layer 21B of the first semiconductor layer 21. At a surface of the growth substrate 1A, the regions 3 may be flush with the main layer 21B. Other semiconductor layers of the main body 2, for instance the optically active zone 23 and the second semiconductor layer 22, may be epitaxially deposited on the first semiconductor layer 21 in a subsequent method step. The main body 2 is in particular part of a main body compound 2V, which can be separated into a plurality of main bodies 2 in a subsequent method step.

[0087] In particular, the subsequent method step is carried out in an aligned manner with respect to the preceding epitaxial structures, namely with respect to the doped regions 3 buried in the main body composite 2V. The main body composite 2V may comprise adjustment marks which, for example, mark the positions of the doped regions 3 or of the main bodies 2 of the to be produced components 10.

[0088] According to FIG. 6C, for example, through-vias 20 can be formed in an aligned manner with the doped regions 3. In particular, the through-vias 20 can be arranged in such a way that, in top view, they overlap with the higher-doped regions 3H and, in particular, are free of overlap with the lower-doped regions 3N. As shown schematically in FIG. 6C, the through-vias 20 end before the doped regions 3, in particular before the higher-doped regions 3H. In deviation therefrom, it is possible that the through-vias 20 extend along the vertical direction up to the higher-doped regions 3H or even into the doped higher-doped regions 3. The electrical connections can be mapped onto the epitaxial structures, in particular onto the doped regions 3. The electrical resistance within the first semiconductor layer 21 can be lowered or increased at spatially preferred locations. Thus, electrically highly conductive regions 3H and optically optimized regions 3N can be formed in a targeted manner.

[0089] Moreover, due to the presence of the higher-doped regions 3H, the current distribution around the through-vias 20 can be improved, in particular to avoid so-called current crowding effects. Moreover, the spatial separation of the optically optimized regions 3N from the optically absorbing and current injecting regions 3H allows the realization of a first semiconductor layer 21 with spatially variable refractive index. In other words, variation from the locally defined refractive index is possible. It is also possible that color centers for wavelength conversion can be selectively generated by arranging the doped regions 3. For example, color centers are selectively embedded in predetermined locations of the main body 2, which are arranged in particular aligned with the doped regions 3. Local embedding of geometric structures can also be carried out in an aligned manner with respect to the doped regions 3.

[0090] In the finished component, a correlation between the doped regions 3 and the geometry of the component 3 can be demonstrated. Correlated variations in the doping profile or electrical conductivity in the layered regions can also be detected. In particular, the spatial arrangement of the optical properties with respect to the chip structure is detectable. In operation of the component, the current paths are in particular geometrically definable.

[0091] In a subsequent method step, an auxiliary carrier may be fixed on the main body composite 2V so that the main body composite 2V is arranged in the vertical direction between the growth substrate 1A and the auxiliary carrier. The growth substrate 1A may be subsequently removed. In particular, the subcarrier serves as a carrier 1 of the main body composite 2V or the component 10.

[0092] According to FIGS. 7A and 7B, the carrier 1 having the main body composite 2V disposed thereon may be singulated into a plurality of components 10. The singulated component 10 may comprise a main body 2 having doped regions 3, 3H and 3N buried therein, wherein the doped regions 3, 3H and/or 3N are adapted to the geometry of the main body 2 or to the geometry of the component 2.

[0093] FIG. 8A schematically shows the doping concentration of a p-doped, in particular Mg-doped GaN layer. The doping concentration can be dependent on the activation energy or on the temperature T. FIG. 8B shows two curves K1 and K2, which show the variation of the voltage U as a function of the current intensity I. Curve K1 shows the voltage U and the current I in a GaN:Si layer with a doping concentration of about 1.7×10.sup.18 cm.sup.−3. Curve K2 shows the voltage U and the current I in a GaN:Si layer with a dopant concentration of about 5.Math.10.sup.18 cm.sup.−3. Instead of Si, germanium can also be used as dopant. The dopant concentration of Si or Ge can be as low as 3-4×10.sup.19 cm.sup.−3. On the basis of the curves K1 and K2 a course of the electrical resistance can be derived.

[0094] FIGS. 9A, 9B and 9C show further possible exemplary embodiments of a component 10 described herein. In FIGS. 8A and 8B, it is schematically shown that the first semiconductor layer 21 and the second semiconductor layer 22 are each implemented as a sequence of layers. For example, the first semiconductor layer 21 may include a buffer layer of for instance AlN, a adaption layer having a layer thickness of for instance 3000 nm, a GaN contact layer doped with Si, an n-type current expanding layer doped with Si, and transition layers. The second semiconductor layer 22 may comprise transition layers, a p-type Mg-doped current spreading layer and contact layers.

[0095] As shown schematically in FIGS. 9A, 9B and 9C, the active zone 23 may comprise at least two sub-regions or a plurality of sub-regions which are mechanically interconnected but vertically offset from each other. The component 10 illustrated in FIG. 9B differs from the component 10 illustrated in FIG. 9A, in particular wherein the growth substrate 1A is removed after the formation of the carrier 1 or 1C. In order to planarize a surface facing the carrier 1, the main body may include an adaption layer 2Z which is disposed in particular between the second semiconductor layer 22 and the carrier 1.

[0096] FIG. 10 shows further possible exemplary embodiments of a component 10 described herein. In particular, the component 10 may comprise inner out-coupling structures 71 and outer out-coupling structures 72. The inner out-coupling structures 71 are structures within the first semiconductor layer 21, which are formed, for example, by using a patterned growth substrate 1A. The outer out-coupling structures 72 are in particular structures formed, for example, by patterning the second semiconductor layer 22.

[0097] FIG. 10 further shows schematically that the locally doped regions 3 and 4 may be formed in both the first semiconductor layer 21 and the second semiconductor layer 22. Analogous to the locally doped regions 3 in the first semiconductor layer 21, the doped regions 4 may be at least partially buried in the second semiconductor layer 22, in particular in a main layer 22B of the second semiconductor layer 22. The regions 4 may be higher-doped or lower-doped compared to the main layer 22B. The regions 4 also have a vertical layer thickness 4D that is smaller than a vertical layer thickness 22D of the second semiconductor layer 22.

[0098] The invention is not restricted to the exemplary embodiments by the description of the invention made with reference to the exemplary embodiments. The invention rather comprises any novel feature and any combination of features, including in particular any combination of features in the claims, even if this feature or this combination is not itself explicitly indicated in the patent claims or exemplary embodiments.