Rectifier Unit

Abstract

A power converter unit comprising a rectifier arranged to receive AC input from a variable or fixed frequency AC power source and an active power filter with an adaptive control algorithm connected as a shunt between the AC input and the rectifier.

Claims

1. A power converter unit comprising a rectifier arranged to receive AC input from an AC power source and an active power filter connected as a shunt between the AC input and the rectifier.

2. The power converter unit of claim 1 where the rectifier is arranged to receive AC input from a fixed or variable frequency AC power source.

3. The power converter unit of claim 1, wherein the active power filter comprises a control algorithm to cause removal of current harmonic frequencies from the AC input but not of the current fundamental frequency of the AC input.

4. The power converter unit of claim 1, wherein the rectifier comprises a 3-phase diode bridge.

5. The power converter unit of claim 1, wherein the active power filter comprises a plurality of semiconductor switches and a storage element.

6. The power converter unit of claim 3 or any claim dependent thereon wherein the control algorithm comprises: means for transforming sensed AC input currents to a synchronous reference frame; means for filtering out a fundamental harmonic from a sensed load current and providing only harmonics of the fundamental at an output; adaptive current control means for providing a high control loop gain at the frequency of the harmonics from the output of the means for filtering regardless of AC power source fundamental frequency; and means for modulating the output of the adaptive current control means.

7. The power converter unit of claim 6, wherein the adaptive current control includes adaptive band-pass filters implemented using a Schur-Lattice LLR structure.

8. The power converter unit of claim 6, wherein the control algorithm further comprises means for synchronising the active power filter with the AC power source.

9. The power converter unit of claim 8, wherein the means for synchronising is an algorithm using Adaptive Lattice Synchronous Reference Frame Phase Locked Loop (ALSRF-PLL) synchronisation.

10. The power converter unit of claim 9, wherein the algorithm comprises means for transforming an AC voltage vector of the AC input to a synchronous reference phase; a regulator and an integrator connected in series to provide an input to the means for transforming; a plurality of adaptive band-stop filters arranged to reject undesired variable frequency harmonic content from the sensed AC input voltage, regardless of AC power source fundamental frequency.

11. The power converter unit of claim 10, wherein the band-stop filters are implemented using a Schur-Lattice IIR structure.

12. The power converter unit of claim 11, wherein the band-stop filters centre frequencies are adapted in real-time to track AC power source frequency variations using a Gradient Lattice Algorithm.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Preferred embodiments will now be described, by way of example only, with reference to the drawings.

[0020] FIG. 1 is a block diagram of a typical multipulse rectifier system using an ATRU to reduce harmonic distortions;

[0021] FIG. 2 is a block diagram of a rectifier unit according to this disclosure;

[0022] FIG. 3 is a block diagram showing the APF in more detail;

[0023] FIG. 4 shows an adaptive lattice SRF-PLL;

[0024] FIG. 5 shows an adaptive band-stop lattice filter;

[0025] FIG. 6 shows Schur recursion;

[0026] FIG. 7 shows the frequency response of the Schur Lattice notch filter;

[0027] FIG. 8 shows an adaptive shunt APF current controller;

[0028] FIG. 9 shows an adaptive band-pass lattice filter;

[0029] FIG. 10 shows the frequency response of the Schur Lattice band-pass filter.

DETAILED DESCRIPTION

[0030] The conventional rectifier unit has been described above in the Background section with reference to FIG. 1.

[0031] In contrast, in the present disclosure, the ATRU and the use of n/6 6-pulse diode bridges (where n is an integer) is substituted by a single 6-pulse rectifier cell connected directly to the AC power distribution system (which can be fixed or variable frequency) and an active power filter (APF) connected in parallel to the rectifier cell, as a shunt APF.

[0032] The shunt APF is designed to locally compensate for the non-linear current harmonics, thus allowing the harmonics content of the current drawn by the power distribution system to be below the permitted maximum.

[0033] The shunt APF control includes an adaptive control algorithm able to assure proper current harmonics compensation within a predefined frequency variation range, typically 350-800 Hz.

[0034] The active filter is arranged to modify the amplitude and/or phase characteristics of the current provided by the AC power signal so as to compensate for harmonic currents drawn by the load.

[0035] The proposed power converter unit is shown in FIG. 2, where block A and block B represent the main parts of the unit. Both block A and block B are connected to the AC power distribution system. Block A is a rectifier composed of a 3-phase diode bridge 3, a filter 4 and the load. The current drawn by the block A contains harmonics from the fundamental AC power distribution frequency that need to be filtered out to meet power quality requirements. As discussed above, the current solution is to use an ATRU to eliminate or minimise harmonics. The present disclosure presents an alternative solution. In order to achieve the aforementioned power quality requirements, a shunt active power filter or APF depicted in block B is proposed in this disclosure. The APF is composed by at least six semiconductors 5 operated in switching mode and a storage element 6, which could be a capacitor. The APF is controlled so that it locally injects the harmonics other than the fundamental frequency drawn by the block A, so that a cancelling-out effect occurs and the current provided by the AC power distribution contains only the fundamental frequency. The APF shown in block B includes an adaptive control algorithm which is able to compensate the undesired harmonics drawn by block A no matter what the variation in the frequency of the AC power distribution main harmonic is, which typically varies from 350-800 Hz in a variable frequency AC power supply system.

[0036] The preferred shunt active power filter is shown in more detail in FIG. 3. Block C represents the power stage comprising the semiconductors 5 and storage element 6 explained in the previous section, while block D represents the control architecture of the control algorithm to achieve the harmonics compensation regardless of frequency variations of the AC power distribution system.

[0037] The preferred control algorithm is composed by: [0038] A transformation stage, e.sup.−j{circumflex over (θ)}, 7 which rotates the sensed currents from the natural reference frame to the synchronous reference frame. [0039] A high pass filter, HP, 8 which rejects the fundamental harmonic information from the sensed load current. The output of the HP block is used as the reference for the current to be injected by the shunt APF. [0040] An Adaptive current controller 9, which is responsible for offering a high control loop gain at the frequency of the harmonics to be injected by the shunt APF, regardless the AC power system main frequency [0041] A Modulation block 10, which is typically deployed through pulse width modulation PWM or space vector modulation SVM modulation techniques, and that may include a transformation stage as well, [0042] An Adaptive grid synchronization algorithm 11 which extracts AC power distribution voltage frequency and phase angle information.

[0043] The adaptive features of block D are provided by the adaptive grid synchronization algorithm 11 and the adaptive current controller 9 as described further below.

Adaptive Grid Synchronization Algorithm

[0044] The adaptive grid synchronization algorithm 11 is responsible for synchronising the shunt APF with the AC power distribution system. This algorithm is based on the standard Synchronous Reference Frame Phase Locked Loop (SRF-PLL) and adds adaptive filtering features to cope with the lack of synchronization accuracy that occurs when the AC power distribution voltage is polluted with voltage harmonics and its frequency is not fixed.

[0045] The preferred adaptive grid synchronization algorithm proposed in this disclosure is called Adaptive Lattice Synchronous Reference Frame Phase Locked Loop (ALSRF-PLL) and is shown in FIG. 4. The ALSRF-PLL has been described in “An adaptive synchronous-Reference-Frame Phase-Locked-Loop for Power Quality Improvement in a Polluted Utility Grid.” F. Gonzalez-Espin, E. Figueres, and G. Garcera, IEEE Transactions on Industrial Electronics, vol. 59, pp. 2718-2731, 2012, and is composed of three main blocks: [0046] Block E represents the Park transformation, and is responsible for rotating the AC voltage vector from the natural reference frame to the synchronous reference frame. [0047] Block F includes the regulator H.sub.PI(z), which is usually a Proportional+Integral controller, and the block Int(z), which is an integrator. The output of those blocks are the AC voltage frequency, ω, and phase angle, {circumflex over (θ)}, respectively. [0048] Block G adds the adaptive feature to the ALSRF-PLL and is composed of n adaptive narrow band-stop (notch) filters, G.sub.hn(z), that reject the undesired variable frequency harmonic content from the sensed AC voltage, thus assuring an accurate estimate of voltage frequency and phase angle.

[0049] The adaptive notch filters 12 are preferably implemented by using the Schur-lattice IIR structure shown in FIG. 5, which carries out the rotation over the transfer function involving the filtering process shown in FIG. 6. The transfer function of the notch filter is shown in equation (1), and can be derived from Block H, where the normalized center frequency, ω.sub.0, and the bandwidth, BW, can be adjusted by equation (2) and (3), respectively. The Bode plot of G(z) is depicted in FIG. 7 for θ.sub.1=0 rad and θ.sub.2=1.414 rad.

[00001]$\begin{array}{cc}G\left(z\right)=\frac{1}{2}.Math.\frac{\left(1+\sin \left({\theta }_2\right)\right).Math.\left(1+2.Math..Math.\sin \left({\theta }_1\right).Math.z^{-1}+z^{-2}\right)}{1+\sin \left({\theta }_1\right).Math.\left(1+\sin \left({\theta }_2\right)\right).Math.z^{-1}+\sin \left({\theta }_2\right).Math.z^{-2}}& \left(1\right)\\ {\omega }_0={\theta }_1+\frac{\pi }{2},.Math..Math.{\theta }_1.Math.<\frac{\pi }{n}& \left(2\right)\\ \mathrm{BW}=-2.Math.{\tan }^{-1}\left(\frac{\sin \left({\theta }_2\right)-1}{\sin \left({\theta }_2\right)+1}\right)& \left(3\right)\end{array}$

[0050] The main advantages of using the Schur-lattice IIR structure are as follows: [0051] i. The structure is inherently limited to realize stable and causal filters. This makes it very appealing to use adaptive algorithms to adjust its center frequency in real time. [0052] ii. As will be explained below, a band-stop as well as a band-pass filter can be obtained by using the same topology. [0053] iii. All the internal nodes are inherently scaled in the Euclidean norm. In this regard, the precision can be kept constant during the filtering process. [0054] iv. The mapping of the poles and zeros is more precise regardless of the position of the poles and zeros, because the round-off noise accumulation in the state vector loop is inherently low. [0055] v. Quantization limit cycles can be easily suppressed.

[0056] The Gradient Adaptive Lattice (GAL) recursive algorithm can be used to automatically adjust in real-time the parameter θ.sub.1, so that the center frequency of the filters are able to filter out the undesired variable frequency harmonics. An important feature of the Schur Lattice filter with GAL recursive algorithm is that the filter does not need a reference to adaptively tune its center frequency, which is of great importance when filtering out the ALSRF-PLL harmonics. Block I in FIG. 5 implements the GAL algorithms expressed in equation (4), where μ is the adaptation gain.

θ.sub.1(n+1)=θ.sub.1(n)−μy(n)x.sub.1(n−1)  (4)

[0057] Table I shows the implementation of the Schur Lattice IIR Notch Filter with GAL adaptation algorithm.

TABLE-US-00001 TABLE I GAL ALGORITHM APPLIED TO THE SCHUR-LATTICE IIR NOTCH FILTER Filter Parameters Computing [00002]$\left[\begin{array}{c}{g}_1\left(n\right)\\ w_1\left(n\right)\end{array}\right]=\left[\begin{array}{cc}\cos \left({\theta }_2\right)& -\sin \left({\theta }_2\right)\\ \sin \left({\theta }_2\right)& \cos \left({\theta }_2\right)\end{array}\right]\left[\begin{array}{c}u\left(n\right)\\ x_2\left(n-1\right)\end{array}\right]$ [00003]$\left[\begin{array}{c}{x}_1\left(n\right)\\ x_2\left(n\right)\end{array}\right]=\left[\begin{array}{cc}\cos \left({\theta }_1\left(n\right)\right)& -\sin \left({\theta }_1\left(n\right)\right)\\ \sin \left({\theta }_1\left(n\right)\right)& \cos \left({\theta }_1\left(n\right)\right)\end{array}\right]\left[\begin{array}{c}{g}_1\left(n\right)\\ x_1\left(n-1\right)\end{array}\right]$ [00004]$y\left(n\right)=\frac{1}{2}\left[u\left(n\right)+w_1\left(n\right)\right]$ Filter Parameters Adaptation θ.sub.1(n + 1) = θ.sub.1(n) − μy(n)x.sub.1(n − 1)

Adaptive Current Controller

[0058] The adaptive current controller is preferably based on the control architecture shown in FIG. 8. The Proportional+Lattice controller is composed of a gain, K.sub.D, in parallel with harmonic compensators, H.sub.hn(z). The harmonic compensators are band-pass filters tuned at the corresponding harmonics (hl to hn in the figure). The band-pass filters offer a high gain in the control loop, so the shunt APF is able to accurately compensate for the harmonics drawn by the non-linear load. The information about the frequency of the AC voltage estimated by the Adaptive grid synchronization algorithm 11 (ALSRF-PLL) is used to adjust in real time the band-pass filter center frequency, so that the tracking of the harmonics is accurate through all of the frequency range of operation, typically 350-800 Hz.

[0059] Schur Lattice IIR band-pass Filter structure shown in FIG. 9 is preferably used in this disclosure and allows implementing an inherently stable IIR filter, which is of paramount importance when adjusting coefficients in real-time, so that the stability of the closed loop APF current control is not compromised by the coefficient adaptation process.

[0060] The transfer function of the Proportional+Lattice controller is depicted in equation (5), where (2) and (3) applies.

[00005]$\begin{array}{cc}{H}_{\mathrm{PL}}\left(z\right)=K_P+\underset{h=1}{\overset{n}{.Math.}}.Math.\frac{K_{\mathrm{Lh}}}{2}.Math.\frac{\left(1-\sin \left({\theta }_{2.Math.h}\right)\right).Math.\left(1-z^{-2}\right)}{1+\sin \left({\theta }_{1.Math.h}\right).Math.\left(1+\sin \left({\theta }_{2.Math.h}\right)\right).Math.z^{-1}+\sin \left({\theta }_{2.Math.h}\right).Math.z^{-2}}& \left(5\right)\end{array}$

[0061] The Bode plot of H.sub.PL(z) is depicted in FIG. 10 for θ1=0 rad, θ.sub.2=1.414 rad and K.sub.L=1

[0062] The system of this disclosure, by doing away with the ATRU, reduces the weight of the rectifier unit. Further, the shunt APF is digitally controlled and can use high frequency pulse with modulation (PWM) or other switching modulation techniques and an adaptive control algorithm, which allows very accurate fixed or variable frequency harmonics compensation. This significantly decreases weight and size of the rectifier unit compared to known multipulse rectifiers while obtaining comparable or better power quality of the current injected by the electric power system, regardless of frequency variations. The provision of the shunt APF in parallel with the rectifier also provides redundancy—i.e. if the APF fails, the rectifier will continue to operate, albeit in a degraded mode, so that the load will still receive power even though the current provided by the AC power system will be of a lower quality with more harmonic distortion.