Frequency synthesis device and method

Abstract

A frequency synthesis device, including: a first generator configured to generate a periodical signal with a frequency f.sub.1; a second generator, coupled to the first generator and generating from the signal with a frequency f.sub.1 a signal S.sub.G corresponding to a train of oscillations with a frequency substantially equal to N.Math.f.sub.1, with a duration lower than T.sub.1=1/f.sub.1 and periodically repeated at the frequency f.sub.1; a third generator generating, from the signal S.sub.G, m periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm with frequency spectra each include a main line with a frequency f.sub.LO.sub._.sub.CHi corresponding to an integer multiple of f.sub.1, with 1≦i≦m, the third generator operating as a band-pass filter applied to the signal S.sub.G and discarding from the frequency spectra of each of the periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm lines other than the main line with a frequency f.sub.LO.sub._.sub.CHi.

Claims

1. A frequency synthesis device comprising: a first generator configured to generate a periodical signal with a frequency f.sub.1; a second generator coupled to the first generator and configured to receive at an input the periodical signal with the frequency f.sub.1 and to generate at least one signal S.sub.G corresponding to a train of oscillations with a frequency substantially equal to N.Math.f.sub.1, with a duration lower than T.sub.1=1/f.sub.1 and periodically repeated at the frequency f.sub.1, with N an integer number higher than 1; a third generator configured to generate, from the signal S.sub.G, m periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm with frequency spectra that each include a main line with a frequency f.sub.LO.sub._.sub.CHi corresponding to an integer multiple of f.sub.1, with 1≦i≦m, i and m being integer numbers, the third generator operating as a band-pass filter applied to the signal S.sub.G and discarding from the frequency spectra of each of the periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm lines other than the main line.

2. The frequency synthesis device according to claim 1, wherein the periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm are substantially sinusoidal signals each having a substantially constant envelope.

3. The frequency synthesis device according to claim 1, wherein the second generator includes: at least one voltage-controlled oscillator with a free oscillation range that includes the frequency N.Math.f.sub.1, the value of N being a function of a value of a first control voltage for being applied at an input of the voltage-controlled oscillator, and at least one switch connected to a power supply input of the oscillator and configured to be controlled by the periodical signal with the frequency f.sub.1 such that it generates a non-null supply voltage to the oscillator only during part of each period T.sub.1, or at least one switch connected to an output of the oscillator and configured to be controlled by the periodical signal with the frequency f.sub.1 such that it breaks an electrical connection between the output of the oscillator and an input of the third generator during part of each period T.sub.1.

4. The frequency synthesis device according to claim 1, wherein the frequencies f.sub.LO.sub._.sub.CHi are equal to frequencies (N+i−1).Math.f.sub.1.

5. The frequency synthesis device according to claim 1, wherein the second generator includes: m voltage-controlled oscillators configured to generate m signals S.sub.G1 to S.sub.Gm each corresponding to a train of oscillations with a frequency substantially equal to N.Math.f.sub.1, with a duration lower than T.sub.1=1/f.sub.1 and periodically repeated at the frequency f.sub.1, with N.sub.1 integer numbers higher than 1, free oscillation ranges of which include the frequencies N.sub.i.Math.f.sub.1, values of N.sub.i being a function of values of first control voltages for being applied at inputs of the voltage-controlled oscillators, and one or more switches each connected to a power supply input of one of the oscillators and configured to be controlled by the periodical signal with the frequency f.sub.1 such that it generates a non-null supply voltage of one of the oscillators only during part of each period T.sub.1 and/or one or more switches each connected to an output of one of the oscillators and configured to be controlled by the periodical signal with the frequency f.sub.1 such that it breaks an electrical connection between the output of one of the oscillators and an input of the third generator during part of each period T.sub.1, the switches being included in the second generator, and the third generator being configured to generate the m periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm from the signals S.sub.G1 to S.sub.Gm.

6. The frequency synthesis device according to claim 5, wherein the frequencies f.sub.LO.sub._.sub.CHi are equal to the frequencies N.sub.i.Math.f.sub.1 and/or wherein the frequencies N.sub.i.Math.f.sub.1 are consecutive integer multiples of the frequency f.sub.1.

7. The frequency synthesis device according to claim 1, wherein the third generator includes plural frequency recovering circuits each outputting one of the m periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm, each frequency recovering circuit including at least one injection-locked oscillator for receiving at an input the signal S.sub.G or one of signals S.sub.G1 to S.sub.Gm and being at least periodically locked at the frequency f.sub.LO.sub._.sub.CHi, a value of which is a function of a value of a second control voltage for being applied at an input of the injection-locked oscillator and/or each frequency recovering circuit including at least one band-pass filter with a center frequency substantially equal to f.sub.LO.sub._.sub.CHi.

8. The frequency synthesis device according to claim 7, wherein each frequency recovering circuit includes at least first and second injection-locked oscillators, the first of which is configured to output one of the m periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm and the second of which is configured to output another periodical signal in phase quadrature with the first of the m periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm via a coupling made between both injection-locked oscillators or via a phase shifter element arranged between the second generator and the injection-locked oscillators.

9. The frequency synthesis device according to claim 1, wherein a value of the frequency f.sub.1 is higher than about 500 MHz, and/or values of the frequencies f.sub.LO.sub._.sub.CHi are higher than about 10 GHz, and/or oscillations of the signal S.sub.G or of signals S.sub.G1 to S.sub.Gm are sinusoidal.

10. The frequency synthesis device according to claim 1, wherein the first generator includes at least one resonator device and a phase-locked loop configured to regulate a phase of the periodical signal with the frequency f.sub.1 outputted by the voltage-controlled oscillator of the phase-locked loop to a phase of a periodical signal outputted by the resonator device.

11. The frequency synthesis device according to claim 1, wherein the first generator includes a resonator device configured to generate the periodical signal with the frequency f.sub.1.

12. A device for transmitting and/or receiving signals, comprising at least one frequency synthesis device according to claim 1, whose outputs on which are outputted the periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm are connected to inputs of mixers of the transmitting and/or receiving device configured to carry out a frequency translation of the signals to be transmitted and/or received.

13. A frequency synthesis method, comprising: generating a periodical signal with a frequency f.sub.1; generating, from the periodical signal with the frequency f.sub.1, at least one signal S.sub.G corresponding to a train of oscillations with a frequency substantially equal to N.Math.f.sub.1, with a duration lower than T.sub.1=1/f.sub.1 and periodically repeated at the frequency f.sub.1, with N an integer number higher than 1; generating, from the signal S.sub.G, m periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm with frequency spectra that each include a main line with a frequency f.sub.LO.sub._.sub.CHi corresponding to an integer multiple of f.sub.1, with 1≦i≦m, i and m being integer numbers, via implementing a band-pass filtering function applied to the signal S.sub.G and discarding from the frequency spectra of each of the periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm lines other than the main line.

14. A method for making a frequency synthesis device, comprising: making a first generator configured to generate a periodical signal with a frequency f.sub.1; making a second generator, coupled to the first generator and configured to receive at an input the periodical signal with the frequency f.sub.1 and to generate at least one signal S.sub.G corresponding to a train of oscillations with a frequency substantially equal to N.Math.f.sub.1, with a duration lower than T.sub.1=1/f.sub.1 and periodically repeated at the frequency f.sub.1, with N an integer number higher than 1; making a third generator configured to generate, from the signal S.sub.G, m periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm with frequency spectra that each include a main line with a frequency f.sub.LO.sub._.sub.CHi corresponding to an integer multiple of f.sub.1, with 1≦i≦m, i and m being integer numbers, by operating as a band-pass filter applied to the signal S.sub.G and discarding from the frequency spectra of each of the periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm lines other than the main line.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The present invention will be better understood upon reading the description of the exemplary embodiments given by way of purely indicating and no way limiting purposes referring to the appended drawings in which:

(2) FIGS. 1 to 3 schematically show frequency synthesis devices according to prior art,

(3) FIG. 4 schematically shows a part of a device for transmitting-receiving RF signals, object of the present invention, according to a particular embodiment,

(4) FIG. 5 shows the main lines of the signals S.sub.LO.sub._.sub.CH1-S.sub.LO.sub._.sub.CHm used by the device for transmitting-receiving RF signals, object of the present invention, according to a particular embodiment,

(5) FIG. 6 schematically shows a frequency synthesis device, object of the present invention, according to a first embodiment,

(6) FIGS. 7A and 7B respectively show the waveform and the spectrum of a signal S.sub.C generated in a frequency synthesis device, object of the present invention,

(7) FIGS. 8A and 8B respectively show the waveform and the spectrum of a signal S.sub.G generated in a frequency synthesis device, object of the present invention,

(8) FIGS. 9A and 9B respectively show the waveform and the spectrum of a signal S.sub.LO.sub._.sub.CHi obtained at the output of a frequency synthesis device, object of the present invention,

(9) FIG. 10 shows the selectivity of a frequency recovering circuit being part of a frequency synthesis device, object of the present invention,

(10) FIGS. 11A and 11B show signals S.sub.LO.sub._.sub.CHi obtained at the output of a frequency synthesis device,

(11) FIGS. 12A and 12B show waveforms and spectra of the signals generated in a frequency synthesis device, object of the present invention,

(12) FIG. 13 schematically shows a frequency synthesis device, object of the present invention, according to a second embodiment,

(13) FIG. 14 shows the spectrum of a signal S.sub.G generated in a frequency synthesis device, object of the present invention,

(14) FIG. 15 shows the spectrum of a signal S.sub.LO.sub._.sub.CH1 obtained at the output of a frequency synthesis device, object of the present invention,

(15) FIG. 16 shows the phase noise of the signal S.sub.LO.sub._.sub.CH1 obtained at the output of a frequency synthesis device, object of the present invention,

(16) FIG. 17 schematically shows a frequency synthesis device, object of the present invention, according to a third embodiment,

(17) FIG. 18 shows the spectra of signals S.sub.G1-S.sub.Gm generated in a frequency synthesis device, object of the present invention, according to the third embodiment,

(18) FIG. 19 shows an exemplary embodiment of a frequency recovering circuit of a frequency synthesis device, object of the present invention,

(19) FIG. 20 shows an exemplary embodiment of a frequency synthesis device, object of the present invention, according to the third embodiment.

(20) Identical, similar or equivalents parts of the different figures described hereinafter bear the same reference numerals such as to facilitate switching from one figure to another.

(21) Different parts shown in the figures are not necessarily drawn to a uniform scale, to make the figures more understandable.

(22) The different possibilities (alternatives and embodiments) should be understood as being not exclusive of each other and can be combined to each other.

DETAILED DISCLOSURE OF PARTICULAR EMBODIMENTS

(23) FIG. 4 is first referred to, which schematically shows part of a transceiver device 1000 able to perform transmission and reception of signals in a wide RF band, for example of the E-band-type (transmission in the bands 71-76 GHZ and 81-86 GHz), and performing frequency translations using m channels enabling the wide RF band to be distributed into m frequency sub-bands, m being an integer number higher than 1.

(24) The device 1000 includes an antenna 1002 for transmitting and receiving data. In the example described herein, the frequency band used for transmitting data, symbolically shown with the reference 1004, is different from the frequency band used for receiving data, symbolically shown with the reference 1006. The device 1000 also includes an element 1008 enabling the antenna 1002 to operate together with the transmitting elements and receiving elements of the device 1000.

(25) When a signal is received by the antenna 10002, it is sent, via the element 1008, at the input of a low noise amplifier (LNA) 1010, and then translated in an intermediate frequency band 1012 by a mixer 1014 receiving at the input the received signal and a stable signal with a frequency f.sub.LO.sub._.sub.IF1.

(26) Because of the large RF band width used, which also corresponds to the intermediate frequency band width 1012, it is not possible to use a single analog-digital converter to convert signals located in this frequency band. This wide frequency band is thus frequency demultiplexed in order to obtain m less wide frequency sub-bands distributed on m channels each comprising an analog-digital converter.

(27) This demultiplexing is performed on the m channels via a second frequency translation of m parts of the intermediate frequency band 1012 to m lower intermediate frequency bands, or directly into baseband (directly into baseband in the example shown in FIG. 4). The sum of the m parts of the intermediate frequency band 1012 forms the entire intermediate frequency band 1012. In FIG. 4, this demultiplexing, or second frequency translation, is made via m mixers 1016.1-1016.m each receiving at the input the signal in the intermediate frequency band 1012 and a stable signal with a centre frequency suitable for the part of the intermediate frequency band 1012 intended to be recovered and translated into baseband in the channel. Each of the mixers 1016.1-1016.m thus receives at the input, in addition to the signal with intermediate frequencies, a stable signal with a different frequency for each channel, herein with frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub._.sub.CHm, these signals being called S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm. The baseband signals obtained at the output of the mixers 1016.1-1016.m are then individually filtered by band-pass filters 1018.1-1018.m, and then digitally converted by analog-digital converters 1020.1-1020.m, and outputted on the channels CH1 to CHm.

(28) For making a signal transmission, operations reverse to those made during the previously described reception are implemented. Thus, the baseband signals of the channels CH1 to CHm are first individually converted by digital-analog converters 1022.1-1022.m, and then individually filtered by band-pass filters 1024.1-1024.m, and translated in the intermediate frequency band 1012 via a multiplexing in the frequency domain made by mixers 1026.1-1026.m each receiving at the input one of the filtered analog signals and one of the signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm. Since the combined signals located in the intermediate frequency band 1012 form a single signal distributed on the entire intermediate frequency band 1012. A translation in the frequency band 1004 is then made by a mixer 1028 receiving at the input the signal in the intermediate frequency band 1012 as well as the signal with a frequency f.sub.LO.sub._.sub.IF2. The output signal of the mixer 1028 is finally amplified by a power amplifier 1030 and then transmitted by the antenna 1002.

(29) The different channels CH1 to CHm simultaneously operate upon transmitting or receiving data.

(30) Because the frequency sub-bands associated with the signals of each channel, both for transmission and reception, herein correspond to parts of an identical width and arranged close to each other in the frequency band 1004 or the frequency band 1006, and thus in the intermediate frequency band 1012, the frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub.—CHm used for performing the frequency translation from or to the intermediate frequency band 1012 have the main characteristics of being evenly spaced out from each other by a value Δf. FIG. 5 shows the main lines of the signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm. Thus, these frequencies are such that f.sub.LO.sub._.sub.CH2=f.sub.LO.sub._.sub.CH1+Δf, f.sub.LO.sub._.sub.CH3=f.sub.LO.sub._.sub.CH2+Δf, . . . , and f.sub.LO.sub._.sub.CHm=f.sub.LO.sub._.sub.CHm-1+Δf, that is f.sub.LO.sub._.sub.CHi=f.sub.LO.sub._.sub.CH1+(i−1).Math.Δf with 1≦i≦m. The frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub._.sub.CHm may each be a multiple of Δf, and advantageously consecutive integer multiples of Δf as it is the case in the example of FIG. 4, with in this case, when f.sub.LO.sub._.sub.CH1=N.Math.Δf, with N an integer number higher than 1, frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub._.sub.CHm that can be expressed therefore by the equation f.sub.LO.sub._.sub.CHi=(N+i−1).Math.Δf.

(31) Depending on the desired frequency sub-bands, it is possible that these frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub._.sub.CHm are non-consecutive integer multiples of Δf and/or that f.sub.LO.sub._.sub.CH1 is not equal to N.Math.Δf.

(32) FIG. 6 is now referred to, which shows a frequency synthesis device 100 according to a first embodiment, enabling frequency stable signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm to be generated.

(33) The device 100 includes an oscillator 102 for example of the VCO-type outputting a periodical signal S.sub.1 with a frequency f.sub.1, for example a sinusoidal one with an oscillation frequency f.sub.1. The frequency f.sub.1 can be assimilated to the value Δf used in the example of the previously described transceiver device 1000. The frequency f.sub.1 is controlled by a voltage applied to a control input 104 of the oscillator 102. In order to lock and stabilize the oscillation frequency f.sub.1 of the signal S.sub.1, the oscillator 102 is regulated by a phase-locked loop (PLL). This PLL includes one or more frequency dividers 106 able to divide the frequency of the signal S.sub.1 by an integer or fractional number A. At the output of the frequency divider(s) 106, a periodical signal with a frequency f.sub.1/A is obtained, which is then compared with a very stable reference periodical signal with a frequency f.sub.stable provided by a resonator 108, for example a quartz resonator. The factor A is chosen such that the frequency f.sub.1/A is close to the frequency f.sub.stable. A comparison between both these signals is made by a phase comparator 110 (PFD) generating an output signal proportional to the phase difference measured between both these signals, the value of which is positive or negative depending on the sign of the difference f.sub.1/A−f.sub.stable.

(34) This output signal is sent at the input of a charge pump circuit and a filter 112 outputting the signal applied to the control input 104 of the oscillator 102 in order to adjust the oscillation frequency f.sub.1, such that f.sub.1/A=f.sub.stable.

(35) The elements 102, 106, 108, 110 and 112 enable the periodical signal S.sub.1, for example a sinusoidal one, which is frequency stable to be obtained. Alternatively, it is possible to replace these elements 102, 106, 108, 110 and 112 by any device or structure able to provide such a frequency stable periodical signal S.sub.1, corresponding for example to a single resonator device when such a resonator device can directly provide the signal S.sub.1. The choice of the type of device or structure generating the periodical signal S.sub.1 can in particular be made as a function of the desired frequency f.sub.1. A single resonator device can be sufficient if the frequency f.sub.1 does not exceed a value beyond which it can then be necessary to involve a PLL to generate the signal S.sub.1.

(36) The frequency synthesis device 100 further includes a generator of periodically repeated oscillations train (called “PROT”) later) in the frequency band to be synthetized and several frequency recovering circuits.

(37) In this first embodiment, the PROT generator comprises an oscillator 114 of the VCO-type voltage-controlled by a control signal V.sub.ctrl, and controlled power supply means 116 electrically supplying the oscillator 114 and which are controlled by the signal S.sub.1 with a frequency f.sub.1 outputted by the oscillator 102. In the example of FIG. 6, this controlled power supply corresponds to a controlled current source 116 operating as a switch periodically interrupting (period T.sub.1=1/f.sub.1) the power supply of the oscillator 114. This controlled current source may correspond to an MOS transistor including a gate to which the signal S.sub.1 is applied. Generally, these means 116 may include a switch connected to a power supply input of the oscillator 114 and able to be controlled by the periodical signal S.sub.1.

(38) The oscillator 114 is thus alternatively switched ON and OFF by this switch, that is switching off or not the supply of an output signal by the oscillator 114, successively at the frequency f.sub.1. The oscillator 114 is controlled by a signal S.sub.C corresponding to the current generated by the current source 116 (and thus to the power voltage provided to the oscillator 114) and the waveform of which substantially corresponds to a positive square signal with a frequency f.sub.1 (this square signal is not perfect and may have a trapezoidal shape, as it is the case for the signal S.sub.c shown in FIG. 7A). Thus, when the switching signal S.sub.C switches on the oscillator 114, a signal S.sub.G corresponding to a train of oscillations is created at the output of the VCO 114. A half-period T.sub.1/2 (with T.sub.1=1/f.sub.1) later, the oscillator 114 is switched OFF and the oscillation is interrupted. The alternate ON and OFF states every half period T.sub.1/2 corresponds to the case where the signal S.sub.C has a duty cycle equal to 0.5. The signal S.sub.C shown in FIG. 7A switches on the oscillator 114 for a duration T.sub.H which is equal, in this example, to T.sub.1/2.

(39) However, this duty cycle (equal to T.sub.H/T.sub.1) may be different from 0.5, and more generally between 0 and 1, the values 0 and 1 being excluded, the duration of the ON state may be greater or smaller than that of the OFF state.

(40) Thus, a pulsed signal S.sub.G is created at a centre frequency f.sub.OL, corresponding to the free oscillation frequency of the oscillator 114, with a repetition period equal to T.sub.1. The signal S.sub.G thus corresponds to a PROT, that is here a train of oscillations with the frequency f.sub.OL, with a duration lower than T.sub.1=1/f.sub.1 and periodically repeated with a repetition period equal to T.sub.1. The signal S.sub.G has thus periodically a null value over part of each period T.sub.1, this part of each period T.sub.1 approximately corresponding to the part of each period T.sub.1 during which the signal S.sub.C has a null value. A feature of the signal S.sub.G is that its phase is locked to that of the signal with a frequency f.sub.1 provided by the oscillator 102 and it has a centre frequency f.sub.OL which is substantially equal to an integer multiple of f.sub.1 (f.sub.OL≈N.Math.f.sub.1). This property is due to the fact that at the start of the oscillation, the oscillator 114 has a high elasticity and is readily locked on a harmonic N of the frequency f.sub.1 with N such that the product N.Math.f.sub.1 is closest to the free oscillation frequency f.sub.OL of the oscillator 114 when it is in free oscillation. The value of N, and thus that of the frequency f.sub.OL depend on the value of the voltage V.sub.ctrl applied at the input of the oscillator 114.

(41) The equivalent spectrum of the signal S.sub.G has an envelope the shape of which corresponds to a cardinal sine, or sinc, the components of which are sinusoids with a centre frequency N.Math.f.sub.1. The lines of the spectrum of S.sub.G are spaced out from each other by f.sub.1. FIGS. 7A and 7B show the waveform (time domain) and the spectrum (frequency domain) of the signal S.sub.C respectively. Likewise, FIGS. 8a and 8B show the waveform and the spectrum of the signal S.sub.G respectively. In FIG. 8A, it can be seen that in each train of oscillations of the signal S.sub.G, the amplitudes of the oscillations are increasing upon starting the oscillator 114 and are decreasing upon shutting off the oscillator 114. Furthermore, the oscillations of the train of oscillations of S.sub.G are similar, in terms of phase, amplitude and frequency, from one train to the other.

(42) From the analytical point of view, the signal S.sub.G is obtained by convoluting in the time domain between a windowed sinus, with the frequency f.sub.OL (corresponding to the free oscillation frequency of the oscillator 114) and with a window width equal to T.sub.H, with T.sub.Hε]0,T.sub.1[, and a Dirac comb with a period equal to T.sub.1. The signal S.sub.G can thus be expressed as:

(43) $S_G\left(t\right)=\left[\sin \left(2.Math.\pi .Math.f_{\mathrm{OL}}.Math.t\right).Math.{\Pi }_{T_H}\left(t\right)\right].Math.\underset{k=-\infty }{\overset{\infty }{.Math.}}\delta \left(t-k.Math.T_1\right)$

(44) Π.sub.T.sub.H(t) is the windowing function corresponding to:

(45) ${\Pi }_{T_H}\left(t\right)=\{\begin{array}{cc}0& \forall t<0\\ 1& \forall t\in ]0,T_1[\\ 0& \forall t>T_H\end{array}$

(46) The frequency spectrum of the signal S.sub.G corresponds in this case to:

(47) ${.Math.S_G\left(f\right).Math.}_{f>0}=\left[\frac{1}{2}\delta \left(f-f_{\mathrm{OL}}\right).Math.T_H.Math.\sin c\left(\pi .Math.f.Math.T_H\right)\right].Math.f_1.Math.\underset{k=-\infty }{\overset{\infty }{.Math.}}\delta \left(f-k.Math.f_1\right)$

(48) For each of the lines of frequencies f.sub.j of the spectrum of the signal S.sub.G (f.sub.j being multiples of f.sub.1), the amplitude A.sub.j of each of these lines can be expressed by the equation:

(49) $A_j=\frac{1}{2}\sin c\left(\pi \left(f_j-f_{\mathrm{OL}}\right).Math.T_H\right)$

(50) The signal S.sub.G is then used to obtain at the output of the device 100 the signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm corresponding to periodical signals, for example sinusoidal ones, the frequency spectra of which each include a main line, or peak, that is of the strongest value with respect to the other lines, with frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub._.sub.CHm corresponding to the frequencies to be synthetized by the device 100 and each corresponding to one of the frequencies f.sub.j of the spectrum of the signal S.sub.G. Thus, in order to obtain these spectra each corresponding, or approximating a pure sinus without the lines adjacent to the centre frequency f.sub.LO.sub._.sub.CHi, with 1≦i≦m, the device 100 includes several frequency recovering circuits 118.1 to 118.m, or line recovering circuits, the inputs of which are connected to the output of the pulsed oscillator 114. The frequency recovering circuits 118.1 to 118.m play the role of band-pass filters and each discard the lines adjacent to the frequency f.sub.LO.sub._.sub.CHi to be recovered. At the output of the frequency recovering circuits 118.1 to 118.m, the periodical signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm are obtained, the main lines of which each have a multiple of f.sub.1 as a frequency, for example a sinusoidal signal with a substantially constant envelope the frequency f.sub.LO.sub._.sub.CH1 of which is a multiple of f.sub.1.

(51) By considering the frequency f.sub.LO.sub._.sub.CHi corresponding to the main line of the signal S.sub.LO.sub._.sub.CHi as equal to (N+i−1).Math.f.sub.1, the phase noise of the signal S.sub.LO.sub._.sub.CHi is equal to the phase noise of the signal S.sub.1 plus 20 log(N+i−1):
Ph(N+i−1).sub.dBc/Hz.sup.f.sup.LO-CHi=Ph(N+i−1).sub.dBc/Hz.sup.f.sup.1+20 log(N+i−1)

(52) FIGS. 9A and 9B respectively show the waveform (time domain) and the spectrum (frequency domain) of one of the signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm, called S.sub.LO.sub._.sub.CHi. Thus, at the output of the device 100 a signal S.sub.LO.sub._.sub.CH1 with a pure spectrum is obtained, that is including a single line at the frequency f.sub.LO.sub._.sub.QHi locked to f.sub.stable, all the other undesired components have been discarded out of the frequency spectrum of the signal S.sub.LO.sub._.sub.CHi by the frequency recovering circuit 118.1.

(53) The oscillators 102 and 114 are for example made as differential twisted pairs (resonators coupled with a negative resistance).

(54) The oscillator 114 may for example be made as described in document “A 60 GHz UWB impulse radio transmitter with integrated antenna in CMOS65 nm SOI technology” by A. Siligaris et al., Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2011 IEEE 11th Topical Meeting on, pp. 153-156, 17-19 Jan. 2011. The oscillator 102 can for example be made as described in document “A 17.5-to-20.94 GHz and 35-to-41.88 GHz PLL in 65 nm CMOS for wireless HD applications” by O. Richard et al., Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International, pp. 252-253, 7-11 Feb. 2010.

(55) The frequency recovering circuits 118.1 to 118.m each play a role of a band-pass filter with a very high selectivity, and may each correspond to an injection-locked, or synchronized, oscillator (ILO) circuit or several ILO circuits arranged in cascade. The manufacture of such an ILO is for example described in document “A 50 GHz direct injection-locked oscillator topology as low power frequency divider in 0.13 μm CMOS” by M. Tiebout, Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European, pp. 73-76, 16-18 Sep. 2003.

(56) Such an oscillator circuit operates continuously and in the absence of a signal S.sub.G applied at the input (when the signal S.sub.G periodically has a null value), each of the circuits 118.1 to 118.m outputs a free oscillation sinusoidal signal the frequency f.sub.osc.sub._.sub.libre.sub._.sub.118.i of which is in the same frequency band as f.sub.LO.sub._.sub.CHi (f.sub.osc.sub._.sub.libre.sub._.sub.118.i≈f.sub.LO.sub._.sub.CHi). The value of the frequency f.sub.osc.sub._.sub.libre.sub._.sub.118.i depends on the value of a control signal V.sub.ctrl.sub._.sub.118.i applied on another input of the frequency recovering circuit 118.i.

(57) When its first input is energized by the pulsed signal S.sub.G outputted by the oscillator 114, the frequency recovering circuits 118.i is locked at the line of the signal S.sub.G closest to f.sub.osc.sub._.sub.libre.sub._.sub.118.i. The control signal V.sub.ctrl.sub._.sub.118.i enables f.sub.osc.sub._.sub.libre.sub._.sub.118.i to be positioned close to (N+i−1).Math.f.sub.1 in order to accurately centre the signal S.sub.LO.sub._.sub.CHi on the frequency (N+i−1).Math.f.sub.1. It is thus possible to lock each of the frequency recovering circuits 118.1 to 118.m on a line at (N+i−1).Math.f.sub.1 if the control signal V.sub.ctrl.sub._.sub.118.i is such that f.sub.osc.sub._.sub.libre.sub._.sub.118.i is located close to the line (N+i−1).Math.f.sub.1. The signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm obtained are thus actually phase-synchronized with each other.

(58) The frequencies f.sub.LO.sub._.sub.CHi, with 1≦i≦m, synthesizable by the device 100 are thus parameterable and for example equal to (N+i−1).Math.f.sub.1.

(59) Programming, or adjusting, values of the synthetized frequencies f.sub.LO.sub._.sub.CH1 is thus performed via the parameters N and/or I and/or f.sub.1.

(60) In this advantageous embodiment, the signal V.sub.ctrl.sub._.sub.118.1 is chosen such that f.sub.LO.sub._.sub.CH1=N.Math.f.sub.1. Thus, the frequency of the line of the signal f.sub.LO.sub._.sub.CH1 corresponds to the frequency of f.sub.G, namely the frequency of the main line of the signal S.sub.G. The signals V.sub.ctrl.sub._.sub.118.2 to V.sub.ctrl.sub._.sub.118.m applied at the input of the other frequency recovering circuits 118.2 to 118.m are further such that the frequencies f.sub.LO.sub._.sub.CH2 to f.sub.LO.sub._.sub.CHm of the signals S.sub.LO.sub._.sub.CH2 to S.sub.LO.sub._.sub.CHm correspond to the following integer multiples of f.sub.1, that is such that f.sub.LO.sub._.sub.CHi=(N+i−1).Math.f.sub.1.

(61) Alternatively, it is possible that the signal V.sub.ctrl.sub._.sub.118.1 is chosen such that the frequency of the line of the signal f.sub.LO.sub._.sub.CH1 corresponds to a multiple of f.sub.1 other than the frequency f.sub.G, that is a frequency adjacent to the frequency of the main line of the signal S.sub.G.

(62) Moreover, it is also possible that the frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub._.sub.CHm are non-consecutive integer multiples of f.sub.1.

(63) The frequency f.sub.G can be modified via the value of the control signal V.sub.ctrl of the oscillator 114 on the one hand, and the frequencies f.sub.LO.sub._.sub.CHi can be modified by the values of the control signals V.sub.ctrl.sub._.sub.118.i applied at the input of the frequency recovering circuits 118.1 to 118.m on the other hand.

(64) A first possibility for programming the value of the frequency f.sub.LO.sub._.sub.CHi (or of another of the frequencies f.sub.LO.sub._.sub.CHi) consists in locking the oscillator 114 directly to the desired frequency at the output such that f.sub.OL≈f.sub.LO.sub._.sub.CH1=N.Math.f.sub.1. Indeed, as previously explained, at the start of the oscillation, the oscillator 114 has a high elasticity and tends to be readily locked on a harmonic N of the frequency f.sub.1. The value of the oscillation frequency f.sub.OL of the oscillator 114 is set by adjusting the value of V Cu such that f.sub.OL=f.sub.LO.sub._.sub.CH1=N.Math.f.sub.1. The centre frequency f.sub.OL of the spectrum of the oscillator 114 is then locked to the line N.Math.f.sub.1. The frequency recovering circuit 118.1 (or one of the other frequency recovering circuits 118.i if the programmed frequency corresponds to the frequency f.sub.LO.sub._.sub.CHi) has at its input a signal S.sub.G the spectrum of which is a cardinal sine, or sinc, of the lines spaced out by f.sub.1 the centre line of which is located at f.sub.OL=f.sub.G=N.Math.f.sub.1. The control signal V.sub.ctrl.sub._.sub.118.1 of the frequency recovering circuit 118.1 is chosen such that the locking occurs on the centre line, at the frequency f.sub.OL.

(65) Thus, in this first possible programming of the value of the f.sub.LO.sub._.sub.CH1, the value of the synthetized frequency f.sub.LO.sub._.sub.CH1 is chosen via choosing the value of the control signal V.sub.ctrl of the oscillator 114 (determining the value of N), the value of the control signal V.sub.ctrl.sub._.sub.118.1 of the frequency recovering circuit 118.1 being constant.

(66) Another possibility for adjusting the value of f.sub.LO.sub._.sub.CH1 (or another of the frequencies f.sub.LO.sub._.sub.CHi) consists in locking the oscillator 114 on a frequency f.sub.OL=N.Math.f.sub.1 with N being fixed (that is V.sub.ctrl with a constant value). The spectrum of the output signal S.sub.G is a cardinal sine of lines spaced out by f.sub.1 the centre line of which is the frequency f.sub.OL. The control signal V.sub.ctrl.sub._.sub.118.1 of the frequency recovering circuit 118.1 (or of one of the other frequency recovering circuits 118.i if the programmed frequency corresponds to the frequency f.sub.LO.sub._.sub.CHi) is then chosen such that the locking occurs on one of the lines adjacent to the centre line f.sub.OL corresponding to the intended frequency f.sub.LO.sub._.sub.CH1 preferably in the main lobe of the cardinal sine spectrum. In this second programming example, the value of the synthesized frequency f.sub.LO.sub._.sub.CH1 is chosen via choosing the value of the control signal V.sub.ctrl.sub._.sub.118.1 of the frequency recovering circuit 118.1, the value of the control signal V.sub.ctrl of the oscillator 114 being constant and chosen such that the value of N is such that the line with a frequency f.sub.LO.sub._.sub.CH1 is located in the main lobe of the cardinal sine spectrum with a centre line at the frequency f.sub.OL such that f.sub.OL=N.Math.f.sub.1).

(67) In a third programming possibility of the value of f.sub.LO.sub._.sub.CH1 (or of another of the frequencies f.sub.LO.sub._.sub.CHi), it is possible to combine both previous possibilities. The aim is then to act on both the control signal V.sub.ctrl of the oscillator 114 (acting on the value of N) and the control signal V.sub.ctrl.sub._.sub.118.1 of the frequency recovering circuit 118.1 to synthetize the desired frequency f.sub.LO.sub._.sub.CH1.

(68) Regardless of the programming possibility chosen from those previously set forth, the values of the frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub.—CHm can also be modified via adjusting or choosing the value of the frequency f.sub.1 given that the value of f.sub.1 corresponds to the spacing of the lines in the spectrum of the signal S.sub.G, and thus to the spacing between the frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub._.sub.CHm.

(69) Each of the frequency recovering circuits 118.1 to 118.m enables a line of the spectrum of the signal S.sub.G outputted by the oscillator 114 to be selected, these lines being preferably located in the main lobe of the spectrum of the signal S.sub.G (the frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub._.sub.CHm therefore corresponding preferably to frequencies of the lines of the main lobe of the spectrum of the signal S.sub.G). Each of these circuits acts both as a very selective band-pass filter and as a signal regenerator, through the locking made on the frequency (N+i−1).Math.f.sub.1. The selectivity of the frequency recovering circuit 118.1, when it corresponds to an injection-locked oscillator (ILO) type circuit, is for example shown in FIG. 10. The zone referenced as 120 represents the locking range of such an ILO which, in the example of FIG. 10, is locked to the centre line of the spectrum of the signal S.sub.G which is closest to its free oscillation frequency.

(70) The output signal of this ILO is mainly comprised of this line but the rejection of the adjacent lines is not infinite. Thus, the signal S.sub.LO.sub._.sub.CH1 obtained at the output of the frequency recovering circuit 118.i may correspond not to a pure sinusoidal signal, but to a periodical signal the envelope of which is never null (unlike the signal S.sub.G the envelope of which is periodically null) and the frequency spectrum of which has a main line at the frequency f.sub.LO.sub._.sub.CHi. The secondary lines of this spectrum, located at multiple frequencies of f.sub.1, are attenuated with respect to the secondary lines of the spectrum of the signal S.sub.G. FIG. 11A shows the spectrum of the signal S.sub.LO.sub._.sub.CH1 obtained for example with the frequency recovering circuit 118.1 comprising a single ILO. It is possible to increase this rejection by connecting in cascade (that is in series) one or several other ILOs to form the frequency recovering circuit 118.i and thus further attenuate the secondary lines of the spectrum of the signal S.sub.LO.sub._.sub.CHi, which enables the constancy of the envelope of the signal S.sub.LO.sub._.sub.CHi to be improved. FIG. 11B shows the spectrum of the signal S.sub.LO.sub._.sub.CH1 obtained for example with the frequency recovering circuit 118.1 comprising several ILOs connected in cascade. It can be seen in this figure that the signal S.sub.LO.sub._.sub.CH1 thus nearly corresponds to a pure sinusoidal signal. This is also applicable to the other signals S.sub.LO.sub._.sub.CHi.

(71) As regards the shape of the spectrum of the signal S.sub.G, the lower the duty cycle of this signal, the wider the first lobe of the cardinal sine. Thus, a small duty cycle implies the presence of a greater number of lines in the main lobe of the spectrum of the signal S.sub.G. This principle is illustrated in FIGS. 12A and 12B which show the waveforms of the signals S.sub.C and S.sub.G, and the spectrum of the signal S.sub.G, for two signals S.sub.C with different duty cycles α.sub.1 (=T.sub.H/T.sub.1) and α.sub.2 (=T.sub.H2/T.sub.1), the duty cycle α.sub.1 of the signal S.sub.C shown in FIG. 12A being higher than the duty cycle α.sub.2 of the signal S.sub.C shown in FIG. 12B.

(72) Alternatively, each of the frequency recovering circuits 118.1 to 118.m, or part of these circuits, may correspond to one or more band-pass filters connected in cascade. This or these filter(s) forming the frequency recovering circuit 118.i is (are) made such that its (their) centre frequency is close to the line of the signal S.sub.G with a frequency (N+i−1).Math.f.sub.1, which enables the signal S.sub.G to be filtered and the line with a frequency (N+i−1).Math.f.sub.1 corresponding to the desired frequency f.sub.LO.sub._.sub.CHi to be recovered. This or these filter(s) is (are) also made such that it (they) is (are) very selective. This or these filter(s) may be made in different ways, for example as a bulk acoustic wave (BAW) filter, LC (from inductors and capacitances) or even surface acoustic waves (SAW) filter. Moreover, it is also possible that the frequency recovering circuit 118.i includes one or more ILOs and one or more band-pass filters connected in cascade.

(73) FIG. 13 is referred to, which shows a frequency synthesis device 200 according to a second embodiment.

(74) With respect to the previously described device 100, the oscillator 114 is no longer controlled by a periodically interrupted power source, but is continuously supplied, providing a sinusoidal signal with a frequency f.sub.OL. This signal is sent at the input of the switch 202 controlled by the periodical signal S.sub.1. The switch 202 is periodically (period T.sub.1) in a closed position for a duration equal to T.sub.H (for example equal to T.sub.1/2 in the case of a duty cycle of 0.5) and in an open position for a duration equal to T.sub.1-T.sub.H.

(75) In this case, at the input of the circuits 118.1 to 118.m, a PROT type signal S.sub.G is obtained, that is of the oscillations-train type with a frequency f.sub.OL periodically repeated with a repetition period equal to T.sub.1. The oscillations of the oscillations trains of S.sub.G are generally not similar, in terms of phase, from one train to the other.

(76) From the analytic point of view, this signal S.sub.G corresponds to the product of a sinus with a frequency f.sub.OL (the free oscillation frequency of the oscillator 114) and a periodical square signal with a period T.sub.1 and a duration in the high state T.sub.H with T.sub.Hε]0,T.sub.1[such that:

(77) $S_G\left(t\right)=\sin \left(2.Math.\pi .Math.f_{\mathrm{OL}}.Math.t\right).Math.\left[{\Pi }_{T_H}\left(t\right).Math.\underset{k=-\infty }{\overset{\infty }{.Math.}}\delta \left(t-k.Math.T_1\right)\right]$

(78) The frequency spectrum of the signal S.sub.G corresponds in this case to:

(79) ${.Math.S_G\left(f\right).Math.}_{f>0}=\frac{1}{2}\delta \left(f-f_{\mathrm{OL}}\right).Math.\left[T_H.Math.\sin c\left(\pi .Math.f.Math.T_H\right).Math.f_1.Math.\underset{k=-\infty }{\overset{\infty }{.Math.}}\delta \left(f-k.Math.f_1\right)\right]$

(80) For each of the lines with frequencies f.sub.j of the spectrum of the signal S.sub.G (f.sub.j=f.sub.OL+j.Math.f.sub.1, and j being a positive, negative or null integer number), the amplitude A.sub.j of each of these lines can be expressed by the equation:

(81) $A_j=\frac{T_H}{2.Math.T_1}\sin c\left(\pi .Math.j\frac{T_H}{T_1}\right)$

(82) The different alternative embodiments of the frequency recovering circuits 118.1 to 118.m previously described for the frequency synthesis device 100 can also be applicable to the frequency synthesis device 200.

(83) An exemplary embodiment of the frequency synthesis device 100 is described below.

(84) The PLL providing the signal S.sub.1, the current source 116 and the oscillator 114 as well as the frequency recovering circuits 118.1 to 118.m are made for example in 65 nm CMOS technology for example on SOI in order to obtain for example a frequency synthesis device in accordance with IEEE.802.15.3c standard relating to WPAN, Wireless HD or WiGig networks, wherein the signal transmissions are for example performed in a frequency range between about 57 GHz and 66 GHz. The elements 102, 106, 108, 110 and 112 are made in order to obtain at the output of the oscillator 102 a signal S.sub.1 with a frequency f.sub.1 equal to about 2.16 GHz with a reference signal f.sub.stable=36 MHz. The oscillator 114 is for example made in order to output a signal S.sub.G the spectrum of which is shown in FIG. 14. It can be seen in this spectrum that the different lines, representing the different possible communication channels according to the communication standards, are actually spaced out by f.sub.1 from each other. The control voltages V.sub.ctrl and V.sub.ctrl.sub._.sub.118.1 to V.sub.ctrl.sub._.sub.118.m are chosen such that the frequency recovering circuits 118.1 to 118.m output signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm with a frequency corresponding to the different lines of the spectrum of S.sub.G. The control voltage V.sub.ctrl.sub._.sub.118.1 is for example chosen such that the frequency recovering circuit 118.1 outputs a signal S.sub.LO.sub._.sub.CH1 with a frequency f.sub.LO.sub._.sub.CH1=62.64 GHz. The spectrum of the signal S.sub.LO.sub._.sub.CH1 obtained at the output of such a frequency synthesis device 100 is shown in FIG. 15. Finally, the phase noise of this signal S.sub.LO.sub._.sub.CH1 is shown in FIG. 16. This also applies for making the frequency synthesis device 200.

(85) The frequency synthesis device 100 or 200 can also be used in an RF transmission system 1000 such as the one previously described in connection with FIG. 4, for providing to the mixers 1026.1 to 1026.m and to the mixers 1016.1 to 1016.m the signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm with a frequency f.sub.LO.sub._.sub.CH1 àf.sub.LO.sub._.sub.CHm.

(86) In the embodiments and alternative embodiments of the frequency synthesis device 100 and 200 previously described, the obtained signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm at the output are all phase-synchronized with each other because these signals are obtained from a same signal S.sub.G. Yet, because the spectrum of the signal S.sub.G has an envelope the shape of which corresponds to a cardinal sine centred on the frequency f.sub.G, the amplitudes of the obtained signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm correspond to the amplitudes of the lines of the recovered frequencies which vary, the amplitudes of the signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm being thus different from each other.

(87) FIG. 17 shows a frequency synthesis device 300 according to a third embodiment. As the previously described device 100, the device 300 includes the elements 102, 106, 108, 110 and 112 for generating the periodical signal S.sub.1. Yet, the device 300 includes several PROT generators each including a VCO-type oscillator 114.1 to 114.m, each being voltage-controlled by a specific control signal V.sub.ctrl.sub._.sub.114.1 to V.sub.ctrl.sub._.sub.114.m, and controlled power supply means 116.1 to 116.m each associated with one of the oscillators 114.1 to 114.m and for example of a nature similar to the previously described means 116. Thus, m pulsed signals S.sub.G1 to S.sub.Gm are generated, the control voltages V.sub.ctrl.sub._.sub.114.1 to V.sub.ctrl.sub._.sub.114.m being such that the centre frequencies of the pulsed signals S.sub.G1 to S.sub.Gm are different from each other and correspond to the frequencies f.sub.LO.sub._.sub.CH1 à f.sub.LO.sub.—CHm for being recovered via the frequency recovering circuits 118.1 to 118.m. FIG. 18 shows examples of spectra of the signals S.sub.G1 to S.sub.Gm obtained.

(88) This third embodiment thus enables stable signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CHm the frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub._.sub.CHm of which are multiples of f.sub.1, which are phase-synchronized (because the control means 116.1 to 116.m are controlled by the same signal S.sub.1) and which are of a same amplitude because the frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub._.sub.CHm correspond to the centre frequencies of the pulsed signals S.sub.G1 to S.sub.Gm to be obtained. As previously, the frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub._.sub.CHm can be consecutive or not integer multiples of f.sub.1, this being chosen via choosing control voltages V.sub.ctrl.sub._.sub.114.1 to V.sub.ctrl.sub._.sub.114.m and V.sub.ctrl.sub._.sub.118.1 to V.sub.ctrl.sub._.sub.118.m (in the example of FIG. 18, the frequencies f.sub.LO.sub._.sub.CHi to f.sub.LO.sub._.sub.CHm are consecutive integer multiples of f.sub.1).

(89) The different alternative embodiments described for the devices 100 and 200 can apply for this device 300 (each frequency recovering circuit 118.1-118.m can include one or more ILOs and/or one or more band-pass filters, controllers for the oscillators 114.1-114.m by control means 116.1-116.m or use of switches 202 controlled by the signal S.sub.1, etc.).

(90) In another alternative embodiment of the frequency synthesis devices 100, 200 and 300, it is possible that these devices provide, at the output of each of the frequency recovering circuits 118.1-118.m, two signals S.sub.LO.sub._.sub.CHi.sub._.sub.I and S.sub.LO.sub._.sub.CHi.sub._.sub.Q with the same frequency and same amplitude, but which have a 90° phase shift between them, that is one in phase with the signal S.sub.1 and the other in phase quadrature with respect to S.sub.1 (I/Q signals). Such an alternative can in particular be used within a multichannel architecture making a direct conversion from an intermediate frequency band to the baseband.

(91) FIG. 19 shows an exemplary embodiment of a frequency recovering circuit 118.i enabling such signals to be outputted. The circuit 118.i receives at the input the PROT-type pulsed signal Sm. The circuit 118.i includes a first ILO 122.i the input of which receives the signal Sw and the output of which is connected to the input of an active or passive-type phase shift element 124.i enabling the signal applied at the in input to be reproduced on one of its two outputs and, the 90° phase-shifted signal applied at the input to be generated on the other one of its two outputs. Each of both signals are applied at the inputs of two other ILOs 126.i and 128.i outputting the signals S.sub.LO.sub._.sub.CHi.sub._.sub.I and S.sub.LO.sub._.sub.CHi.sub._.sub.Q. Both ILOs 126.i and 128.i operate either independently of each other, or in a coupled manner such that the outputs of both ILOs 126.i and 128.i are 90° phase-shifted from each other without involving the phase-shift element 124.1. The operation of such a quadrature VCO (QVCO)-type element is for example described in document “A 17.5-to-20.94 GHz and 35-to-41.88 GHz PLL in 65 nm CMOS for wireless HD applications” by O. Richard et al., Solid-States Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International, pages 252-253, 7-11 Feb. 2010.

(92) In connection with FIG. 20, an exemplary embodiment of the frequency synthesis device 300 including frequency recovering circuits corresponding to the circuit 118.i previously described in connection with FIG. 19 is described.

(93) This frequency synthesis device is intended to be used in an RF transmission system operating in the E-band frequency range and using nine channels, each with a band width equal to 500 MHz and with centre frequencies ranging from 16.5 GHz to 20.5 GHz. The reference signal used includes a frequency f.sub.stable equal to 20 MHz sent at the input of the phase comparator 110. The output signals of the phase comparator 110 are sent at the input of the charge pump circuit and the filter 112 (herein a high-pass filter) outputting the signal applied to the control input of the oscillator 102 which is a VCO outputting a signal with a frequency equal to 60 GHz (this signal being further used in the first high and low conversion stages of the RF transmission system, that is used as a base for generating the signals with the frequencies f.sub.LO.sub._.sub.IF1 and f.sub.LO.sub._.sub.IF2 for the system 1000 previously described in connection with FIG. 4). This signal is sent at the input of the frequency dividers 106 formed by a first frequency divider 106.1 making a frequency division by 2 and connected in series to a second frequency divider 106.2 making a frequency division by 6 itself connected in series with a third frequency divider 106.3 making a frequency division by 250. The signal obtained at the output of the first frequency divider 106.1 is also sent at the input to a fourth frequency divider 106.4 making a frequency division by 60 and outputting the signal S.sub.1 with a frequency f.sub.1 equal to 500 MHz used for controlling the means 116.1 to 116.9 controlling supply to the oscillators 114.1 to 114.9. The signals S.sub.LO.sub._.sub.CH1 to S.sub.LO.sub._.sub.CH9 (with an in-phase signal and a quadrature signal for each of the nine channels) are obtained at the output of the frequency recovering circuits 118.1-118.9, the frequencies f.sub.LO.sub._.sub.CH1 to f.sub.LO.sub._.sub.CH9 of these signals ranging from 16.5 GHz to 20.5 GHz and being spaced out by 500 MHz from each other.

(94) The previously described frequency synthesis devices can also be used in an electro-optical type transceiver device able to send data via a wavelength multiplexing (WDM), that is by modulating several wavelengths sent via a same optical wave guide. Another way to exploit a great optical band width consists in applying a wide band modulation to a single optical wavelength.

(95) The OFDM corresponds to this modulation type in which several electric subcarriers having frequencies evenly spaced out from each other are individually modulated by different baseband signals and then combined and translated about the optical frequency. A frequency synthesis device as previously described can thus be used within an OFDM-type electro-optical transceiver device to provide the subcarriers with different frequencies. Each of these frequencies is in this case modulated with a different data stream and then frequency translated in the optical domain by using a modulator or laser in order to provide an OFDM signal.