Power control semiconductor device and variable output voltage power supply

Abstract

A power control semiconductor device includes a voltage control transistor, a control circuit, a bias circuit, and external terminals. The voltage control transistor is connected between a voltage input terminal and an output terminal. The bias circuit generates a voltage that operates the control circuit. Output control signals provided from an outside are input to the external terminals to control an output voltage. The control circuit includes an error amplifier and a logic circuit. The error amplifier outputs a voltage corresponding to a potential difference between a reference voltage and a voltage divided by a voltage divider that divides the output voltage. The logic circuit generates: a signal that changes the divided voltage in accordance with the output control signals; and a signal that stops operation of the bias circuit in response to a combination of the output control signals.

Claims

1. A power control semiconductor device, comprising: a voltage input terminal to which a DC voltage is input; an output terminal; a voltage control transistor connected between the voltage input terminal and the output terminal; a control circuit that controls the voltage control transistor according to an output voltage of the output terminal; a bias circuit that generates a voltage that operates the control circuit based on the DC voltage input to the voltage input terminal; and a first external terminal and a second external terminal to which a first external input signal and a second external input signal provided from an outside are input, respectively, to control the output voltage, wherein the control circuit comprises: a voltage divider that divides the output voltage of the output terminal; an error amplifier that outputs a voltage corresponding to a potential difference between a predetermined reference voltage and a voltage divided by the voltage divider; and a logic circuit that generates: two or more control signals that changes the voltage divided by the voltage divider, which is input to the error amplifier, according to the first and second external input signals input to the first and second external terminals; and a signal that stops operation of the bias circuit in response to one of combinations of the first external input signal and the second external input signal.

2. The power control semiconductor device according to claim 1, wherein: the voltage divider comprises a first resistor element and a resistance circuit which are connected in series between the output terminal and a ground point, the resistance circuit comprises lines each including a switch element and a resistor element in series, and the switch elements are turned on/off by the two or more control signals.

3. The power control semiconductor device according to claim 1, wherein: the voltage divider comprises a first resistor element and a resistance circuit which are connected in series between the output terminal and a ground point, the resistance circuit comprises: resistor elements in series; and switch elements each connected between the ground point and a connection node between the resistor elements, each of the resistor elements comprises a series resistance circuit in which unit resistors each having a predetermined resistance value are connected in series, and the switch elements are turned on/off by the two or more control signals.

4. The power control semiconductor device according to claim 1, wherein: the logic circuit comprises: two or more transistors that are turned on/off by the first external input signal and the second external input signal input respectively to the first external terminal and the second external terminal; and two or more current sources respectively connected in series with the transistors, and when operation of the bias circuit is stopped by the signal from the logic circuit, currents of the two or more current sources are interrupted.

5. A variable output voltage power supply, comprising: the power control semiconductor device according to claim 1; and a controller that outputs the first external input signal and the second external input signal to the first external terminal and the second external terminal, respectively, wherein the output voltage is changed according to the first external input signal and the second external input signal input to the first external terminal and the second external terminal from the controller.

6. A power control semiconductor device, comprising: a voltage input terminal to which a DC voltage is input; an output terminal; a voltage control transistor connected between the voltage input terminal and the output terminal; a control circuit that controls the voltage control transistor according to an output voltage of the output terminal; a bias circuit that generates a voltage that operates the control circuit based on the DC voltage input to the voltage input terminal; and a first external terminal and a second external terminal to which a first external input signal and a second external input signal provided from an outside are input, respectively, to control the output voltage, wherein the control circuit comprises: a voltage divider that divides the output voltage of the output terminal; an error amplifier that outputs a voltage corresponding to a potential difference between a predetermined reference voltage and a voltage divided by the voltage divider; and a logic circuit that generates: two or more control signals that changes the voltage divided by the voltage divider, which is input to the error amplifier, according to the first and second external input signals input to the first and second external terminals; and a signal that stops operation of the bias circuit in response to one of combinations of the first external input signal and the second external input signal, and wherein the logic circuit comprises: two or more transistors that are turned on/off by the first external input signal and the second external input signal input respectively to the first external terminal and the second external terminal; and two or more current sources respectively connected in series with the transistors, and when operation of the bias circuit is stopped by the signal from the logic circuit, currents of the two or more current sources are interrupted.

7. The power control semiconductor device according to claim 6, wherein: the voltage divider comprises a first resistor element and a resistance circuit which are connected in series between the output terminal and a ground point, the resistance circuit comprises a switch element and a resistor element in series, and the switch element is turned on/off by the two or more control signals.

8. The power control semiconductor device according to claim 7, wherein: the resistance circuit includes lines each including the switch element and the resistor element in series, and the switch elements are turned on/off by the signal or the voltage from the logic circuit.

9. The power control semiconductor device according to claim 6, wherein: the voltage divider comprises a first resistor element and a resistance circuit which are connected in series between the output terminal and a ground point, the resistance circuit comprises: resistor elements in series; and a switch element connected between the ground point and a connection node between the resistor elements, each of the resistor elements comprises a series resistance circuit in which unit resistors each having a predetermined resistance value are connected in series, and the switch element is turned on/off by the two or more control signals.

10. The power control semiconductor device according to claim 9, wherein: the resistance circuit comprises a plurality of switch elements each connected between the ground point and a connection node between the resistor elements, and the plurality of switch elements are turned on/off by the two or more control signals from the logic circuit.

11. A variable output voltage power supply, comprising: the power control semiconductor device according to claim 6; and a controller that outputs the first external input signal and the second external input signal to the first external terminal and the second external terminal, respectively, wherein the output voltage is changed according to the first external input signal and the second external input signal input to the first external terminal and the second external terminal from the controller.

12. A variable output voltage power supply, comprising: a power control semiconductor device comprising: a voltage input terminal to which a DC voltage is input; an output terminal; a voltage control transistor connected between the voltage input terminal and the output terminal; a control circuit that controls the voltage control transistor according to an output voltage of the output terminal; a bias circuit that generates a voltage that operates the control circuit based on the DC voltage input to the voltage input terminal; and a first external terminal and a second external terminal to which a first external input signal and a second external input signal provided from an outside are input, respectively, to control the output voltage, wherein the control circuit comprises: a voltage divider that divides the output voltage of the output terminal; an error amplifier that outputs a voltage corresponding to a potential difference between a predetermined reference voltage and a voltage divided by the voltage divider; and a logic circuit that generates: two or more control signals that changes the voltage divided by the voltage divider, which is input to the error amplifier, according to the first and second external input signals input to the first and second external terminals; and a signal that stops operation of the bias circuit in response to one of combinations of the first external input signal and the second external input signal; and a controller that outputs the first external input signal and the second external input signal to the first external terminal and the second external terminal, respectively, wherein the output voltage is changed according to the first external input signal and the second external input signal input to the first external terminal and the second external terminal from the controller.

13. The variable output voltage power supply according to claim 12, wherein: the voltage divider comprises a first resistor element and a resistance circuit which are connected in series between the output terminal and a ground point, the resistance circuit comprises a switch element and a resistor element in series, and the switch element is turned on/off by the two or more control signals.

14. The variable output voltage power supply according to claim 13, wherein: the resistance circuit includes lines each including the switch element and the resistor element in series, and the switch elements are turned on/off by the signal or the voltage from the logic circuit.

15. The variable output voltage power supply according to claim 12, wherein: the voltage divider comprises a first resistor element and a resistance circuit which are connected in series between the output terminal and a ground point, the resistance circuit comprises: resistor elements in series; and a switch element connected between the ground point and a connection node between the resistor elements, each of the resistor elements comprises a series resistance circuit in which unit resistors each having a predetermined resistance value are connected in series, and the switch element is turned on/off by the two or more control signals.

16. The variable output voltage power supply according to claim 15, wherein: the resistance circuit comprises a plurality of switch elements each connected between the ground point and a connection node between the resistor elements, and the plurality of switch elements are turned on/off by the two or more control signals from the logic circuit.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The advantages and features provided by one or more embodiments of the invention will become more fully understood from the detailed description given hereinbelow and the appended drawings which are given by way of illustration only, and thus are not intended as a definition of the limits of the present invention.

(2) FIG. 1 is a circuit diagram showing an embodiment of a variable output voltage power supply of the series regulator type according to the present invention.

(3) FIG. 2 is a wave diagram showing relation between control signals Va, Vb and an output voltage Vout in a regulator of the embodiment.

(4) FIG. 3A is a logic diagram showing an example of a logic circuit constituting the regulator IC of the embodiment.

(5) FIG. 3B is a circuit diagram showing an example of the logic circuit (except G1).

(6) FIG. 4 is a circuit diagram showing an example of a bias circuit and a logic gate (NOR gate G1) constituting the logic circuit.

(7) FIG. 5 is a block diagram showing an example of a power supply system consisting of the regulator of the embodiment and a microcomputer that controls the regulator.

(8) FIG. 6 is a circuit diagram showing a modification example of the regulator IC of the embodiment.

DETAILED DESCRIPTION OF EMBODIMENTS

(9) Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.

(10) FIG. 1 shows an embodiment of a series regulator as a variable output voltage power supply according to the invention. The portion surrounded by a chain line in FIG. 1 is formed as a semiconductor integrated circuit (regulator IC) 10 on a semiconductor chip, such as single crystal silicon. A capacitor Co is connected to an output terminal OUT of the regulator IC 10. Thus, the regulator IC 10 functions as a variable output voltage power supply that outputs a stable DC voltage to loads such as a fan motor (not shown).

(11) In the following explanation, an example in which a bipolar transistor is used as a transistor constituting the regulator IC 10 is shown. However, a MOS transistor may be used.

(12) In the variable output voltage power supply of the embodiment, as shown in FIG. 1, a PNP bipolar transistor Q1 for voltage control is connected between the output terminal OUT and the voltage input terminal IN to which a direct current input voltage Vin of the regulator IC 10 is applied. Resistors R1, R2 constituting a voltage divider 12 that divides an output voltage Vout are connected in series between the output terminal OUT and a ground line (ground point) to which a ground potential GND is applied.

(13) A voltage of a connection node N1 between the resistors R1, R2 constituting the voltage divider 12 is input as a feedback voltage VFB to a non-inversion input terminal of an error amplifier 11 as an error amplification circuit that controls a gate terminal of the voltage control transistor Q1. A predetermined reference voltage Vref generated by a reference voltage circuit 13 based on an input voltage Vin is applied to an inversion input terminal of the error amplifier 11. The error amplifier 11 generates a voltage corresponding to a potential difference between the feedback voltage VFB of output and the reference voltage Vref, and supplies the generated voltage to a gate terminal of the voltage control transistor Q1. Thus, the error amplifier 11 controls Q1 so that the output voltage Vout reaches a desired potential.

(14) In the regulator IC 10 of the embodiment, three circuits are connected in parallel between a ground point and a connection node N1 between the resistors R1, R2. The three circuits are: (i) “resistor R3—switch element SW1” which is a series circuit in which a resistor R3 and a switch element SW1 are connected; (ii) “resistor R4—switch element SW2” which is a series circuit in which a resistor R4 and a switch element SW2 are connected; and (iii) “resistor R5—switch element SW3” which is a series circuit in which a resistor R5 and a switch element SW3 are connected. Resistance values of the resistors R3, R4, R5 are set at different values. The regulator IC 10 is provided with control input terminals Pa, Pb as external terminals to which control signals Va, Vb sent from a microcomputer or the like (not shown) are input. The regulator IC 10 is further provided with a logic circuit 14 that generates signals OCS1-OCS3 for controlling the switch elements SW1-SW3 based on the input control signals Va, Vb of the control input terminals Pa, Pb. The resistor R2 may be omitted.

(15) The regulator IC 10 of the embodiment is provided with a bias circuit 15 that generates a current that operates the error amplifier 11 and the reference voltage circuit 13. The logic circuit 14 has a function of generating a signal ON/OFF which is a logical sum of the input control signals Va, Vb of the control input terminals Pa, Pb and which turns on/off the bias circuit 15. When both of the input control signals Va, Vb are at a low level, the output signal ON/OFF is at a high level. It turns off the bias circuit 15. In the embodiment, when either Va or Vb is at a high level, the output signal ON/OFF of the logic circuit 14 is at a low level. It turns on the bias circuit 15.

(16) When the output signal ON/OFF of the logic circuit 14 turns off the bias circuit 15, supply of currents that operates the error amplifier 11, the reference voltage circuit 13, and the logic circuit 14 is stopped. Thus, operation of these internal circuits is stopped.

(17) In the regulator IC 10 of the embodiment, the control signals OCS1-OCS3 output from the logic circuit 14 selectively turns on one of the switch elements SW1-SW3. Then, one of the resistors R3, R4, R5 is connected in parallel with the resistor R2 constituting the voltage divider 12. A part of the current flowing through the resistor R2 flows through the resistor R3, R4, R5. It changes the division ratio of the output voltage Vout divided by the voltage divider 12. Thus, a base voltage of the voltage control transistor Q1 is controlled, and an output current is changed.

(18) Consequently, the output voltage Vout output from the output terminal OUT of the regulator IC 10 is changed in three levels in accordance with the input control signals Va, Vb of the control input terminals Pa, Pb.

(19) The voltage control transistor Q1 is controlled so that:

(20) the division ratio of the voltage divider 12 is changed by turning on/off the switch elements SW1-SW3; and

(21) the potential of the node N1 is rapidly shifted to the same potential as the reference voltage Vref by effect of imaginary short-circuit of the error amplifier 11.

(22) Table 1 is a truth table showing relation of the input control signals Va, Vb, levels of the output voltage Vout, and an off-mode of the bias circuit 15. FIG. 2 shows an example of waveform diagram.

(23) TABLE-US-00001 TABLE 1 Va Vb Bias OCS1 OCS2 OCS3 Vout L L OFF — — — OFF L H ON H L L V1 H L ON L H L V2 H H ON L L H V3

(24) As shown in FIG. 2, according to the regulator of the embodiment, the output voltage Vout changes in three levels V1, V2, V3 (V1<V2<V3) in accordance with combinations of levels of the input control signals Va, V b.

(25) The circuit in FIG. 1 includes three lines connected in parallel with the resistor R2. The three lines are (i) the “resistor R3—switch element SW1” line, (ii) the “resistor R4—switch element SW2” line, and (iii) the “resistor R5—switch element SW3” line. Alternatively, a couple of “resistor—switch element” lines may be provided to change the output voltage Vout in three levels. The control signals OCS1-OCS3 output from the logic circuit 14 control the output voltage Vout in three conditions. The three conditions are (i) a condition in which only SW1 is turned on, (ii) a condition in which only SW2 is turned on, and (iii) a condition in which SW1 and SW2 are turned on. In this case, the output voltage Vout in the condition in which SW1 and SW2 are turned on depends on resistance values of the two resistors R2, R3 and cannot be freely set. However, according to the above embodiment in which three “resistor—switch element” lines are provided, all three levels of voltage can be freely set. It is advantageous.

(26) FIG. 3A is a logic diagram of the logic circuit 14 that generates the control signals OCS1-OCS3 of the switch elements SW1-SW3 in accordance with Table 1. FIG. 3B is an example of the circuits of the logic circuit 14 except for a NOR gate G1.

(27) As shown in FIG. 3A, the logic circuit 14 includes:

(28) the NOR gate G1 that takes a logical sum of the input control signals Va, Vb to generate a signal ON/OFF that turns on/off the bias circuit 15;

(29) two inverters INV1, INV2 that invert the input control signals Va, Vb to generate the control signals OCS1, OCS2;

(30) inverters INV3, INV4 that invert outputs of the inverters INV1, INV2; and

(31) an AND-gate G2 to which outputs of INV3, INV4 are input.

(32) As shown in FIG. 3B, the inverters INV1, INV2 include:

(33) two series resistors that divide the input control signals Va, Vb;

(34) bipolar transistors Q11, Q12 including base terminals to which divided voltages are applied; and

(35) constant current sources CC1, CC2 connected in series with the transistors Q11, Q12.

(36) The inverters INV3, INV4 include:

(37) bipolar transistors Q13, Q14 including base terminals to which collector voltages of the transistors Q11, Q12 are applied; and

(38) constant current sources CC3, CC4 connected in series with the transistors Q13, Q14.

(39) The AND gate G2 includes:

(40) bipolar transistors Q15, Q16 in series which include base terminals to which collector voltages of the transistors Q13, Q14 are applied;

(41) a bipolar transistor Q17 including a base terminal to which a collector voltage of the transistor Q16 is applied; and

(42) constant current sources CC5, CC6 connected in series with the transistors Q16, Q17.

(43) The constant current sources CC1-CC6 consist of transistors on the secondary side of a current mirror circuit. The bias circuit 15 sends current to the primary side of the current mirror circuit.

(44) FIG. 4 is an example of the circuit of the bias circuit 15 and a circuit of the logic gate (NOR gate) G1 in the regulator IC 10 of the embodiment.

(45) As shown in FIG. 4, the logic gate G1 includes:

(46) resistors R11, R12 connected in series between a control input terminal Pa and a ground terminal GND;

(47) an NPN bipolar transistor Q2 including a base terminal connected to a connection node between the resistors R11, R12;

(48) resistors R13, R14 connected in series between a control input terminal Pb and the ground terminal GND; and

(49) an NPN bipolar transistor Q3 comprising a base terminal connected to a connection node between the resistors R13, R14.

(50) Collector terminals of the transistors Q2, Q3 are connected to each other, and the connection point is an output node N2.

(51) The bias circuit 15 includes:

(52) a resistor R15 and an NPN bipolar transistor Q4 connected in series between a voltage input terminal IN and the output node N2 of the logic gate G1;

(53) a resistor R16 connected between a base terminal and an emitter terminal of the transistor Q4; and

(54) an NPN bipolar transistor Q5 including a base terminal and an emitter terminal respectively connected to a collector terminal and the base terminal of the transistor Q4.

(55) A collector terminal of the transistor Q5 is connected to a current source such as a current mirror circuit (not shown). When one of the transistors Q2, Q3 of the logic gate G1 is turned on, the potential of the node N2, which is the output of the logic gate G1, becomes lower. A collector current flows through Q4, and a current I of an amount represented by I=VF/R is subtracted from the current source (transistor on the primary side of the current mirror circuit) connected to the collector terminal of Q5. VF is a voltage between the base terminal and the emitter terminal of Q4. R is a resistance value of the resistor R15. Thus, the internal circuits are brought into operation condition. When both of the transistors Q2, Q3 of the logic gate G1 are turned off, the potential of the node N2, which is the output of the logic gate G1, becomes higher. No current flows through the transistor Q4. The current I subtracted from the current source connected to the collector terminal of Q5 is zero. Thus, operation of the internal circuits is stopped.

(56) Next, an example of a variable output voltage power supply comprising the above regulator IC 10 with the control input terminals Pa, Pb and a common microcomputer will be described with reference to FIG. 5.

(57) In a case in which a variable output voltage power supply is constituted by the regulator IC 10 in the above embodiment and a common microcomputer, as shown in FIG. 5, portions are connected such that control signals Va, Vb are output from an input/output port of a microcomputer 20 and are input to the terminals Pa, Pb of the regulator IC 10. As shown in FIG. 2, the above connection realizes the variable output voltage power supply which changes the output voltage Vout in three levels in accordance with the control signals Va, Vb input to the control input terminals Pa, Pb and which stops operation of the regulator IC 10.

(58) As described above, the regulator IC 10 of the embodiment can stop operation although the IC is not provided with an external terminal that stops operation of the IC, which is provided in the regulator IC in Patent Document 2. In a regulator IC that linearly changes the output voltage Vout, a control voltage must be input to an output control terminal from the outside. To generate the control voltage, a common microcomputer with a built-in digital-analog converter must be used. However, when the output voltage Vout is changed in three levels as in the regulator IC 10 of the above embodiment, a common port outputs the control signals. Therefore, an inexpensive microcomputer that does not have a built-in digital-analog converter can be used as the common microcomputer.

(59) The regulator IC 10 of the above embodiment is provided with two control input terminals Pa, Pb and changes the output voltage Vout in three levels. However, the number of control input terminals is not limited to two. It may be three, four, or more.

(60) For example, in a case in which three control input terminals are provided, the logic circuit 14 and the voltage divider 12 of the output voltage Vout are configured as follows.

(61) (i) In a case in which all the control signals of three bits input to the input terminal are at a low level, the circuit is shifted to a mode in which operation of the regulator IC is stopped.

(62) (ii) The output voltage Vout is changed in seven levels in accordance with other combinations.

(63) Thus, a variable output voltage power supply controlled with a microcomputer that does not have a built-in digital-analog converter is realized.

(64) Modification

(65) Next, a modification example of a regulator IC 10 of the embodiment will be described with reference to FIG. 6.

(66) The modification example in FIG. 6 is provided with a voltage divider 12 connected between an output terminal OUT and a ground point of the regulator IC 10 like the above embodiment. The voltage divider 12 is constituted by a resistor R1 and resistors R6, R7, R8 in series. A switch element SW1 is provided between the ground point and a connection node N3 between the resistors R6, R7. A switch element SW2 is provided between the ground point and a connection node N4 between the resistors R7, R8. Inverters INV1, INV2 reverse control signals Va, Vb input to control input terminals Pa, Pb. Output signals OCS1, OCS2 of the inverters INV1, INV2 control on/off of the switch elements SW1, SW2.

(67) Thus, the control signals Va, Vb control three conditions of (i) a condition in which only SW1 is turned on, (ii) a condition in which only SW2 is turned on, and (iii) a condition in which SW1 and SW2 are turned off. Thereby the output voltage Vout is changed in three levels (V1, V2, V3).

(68) Specifically, an output voltage V1 when only SW1 is turned on is expressed as follows.
V1=(R1+R6)*Vref/R6

(69) An output voltage V2 when only SW2 is turned on is expressed as follows.
V2=(R1+(R6+R7))*Vref/(R6+R7)

(70) An output voltage V3 when SW1 and SW2 are turned off is expressed as follows.
V3=(R1+(R6+R7+R8))*Vref/(R6+R7+R8)

(71) In the regulator IC of the modification example in FIG. 6, each of the resistors R6, R7, R8 is constituted by a series resistance circuit in which unit resistors each having a resistance value of, for example, 10 kΩ are connected in series. Specifically, for example, in a case in which the resistance value of each of the resistors R6, R7 is set at 50 kΩ, five unit resistors are connected in series. In a case in which the resistance value of the resistor R8 is set at 100 kΩ, ten unit resistors are connected in series. Thus, a total of twenty unit resistors are required.

(72) In another example, the resistor R2 in the voltage divider 12 of the embodiment in FIG. 1 is omitted. In this case, 50 kΩ, 100 kΩ, and 200 kΩ are selected as resistance values of the resistors R3, R4, R5. The output voltage Vout is changed in three levels (V1, V2, V3) like the above modification example. Unit resistors each having a resistance value of 10 kΩ constitute the resistors R3, R4, R5. In this case, five unit resistors for R3, ten unit resistors for R4, and twenty unit resistors for R5, that is, a total of thirty five unit resistors are required.

(73) Thus, in a case in which a series resistance circuit in which unit resistors are connected in series is used as a resistor constituting the voltage divider 12, the modification example greatly reduces the number of unit resistors constituting the series resistance circuit, i.e., the area occupied by the resistors. It is reduced by about half. This is advantageous.

(74) The invention made by the inventors has been described above in detail on the basis of embodiments. However, the present invention is not limited to the above embodiment. For example, in the above embodiment, the circuit in FIG. 4 is used as the bias circuit 15. Alternatively, circuits having other configurations such as the one disclosed in JP2017-134557A may be used.

(75) In the above embodiment, the present invention is applied to a variable output voltage power supply of the series regulator type. However, the present invention may be used in a power supply of the shunt regulator type.