System for the Verification of the Absence of Voltage
20170269129 ยท 2017-09-21
Assignee
Inventors
- Masud Bolouri-Saransar (Orland Park, IL, US)
- James E. FABISZAK (Darien, IL, US)
- Richard A. RAGO (New Lenox, IL, US)
Cpc classification
G01R15/12
PHYSICS
International classification
Abstract
A system for the verification of the absence of voltage includes a first impedance, an amplitude limiter electrically connected to the first impedance, a second impedance electrically connected to the first impedance and the amplitude limiter, a varactor circuit electrically connected to the second impedance, an isolation capacitor electrically connected to the second impedance and varactor circuit, an envelope circuit with a voltage detection circuit connected to the isolation circuit via a buffer, and an RF oscillator. The amplitude limiter configured to limit the voltage applied to the varactor circuit. The RF oscillator configured to interact with the varactor circuit in order to create a modulated circuit for the buffer and envelope circuit. The envelope circuit is configured to demodulate the signal for the voltage detection circuit.
Claims
1. A system for the verification of the absence of voltage comprising: a first impedance connected to a power source; an amplitude limiter electrically connected to the first impedance; a second impedance electrically connected to the first impedance and the amplitude limiter; a varactor circuit electrically connected to the second impedance; an isolation capacitor electrically connected to the second impedance and the varactor circuit; an RF oscillator electrically connected to the isolation capacitor; an envelope circuit electrically connected to the RF circuit and the isolation capacitor; and a voltage detection circuit connected to the envelope circuit, wherein the amplitude limiter is configured to limit the voltage applied across the varactor circuit, the RF oscillator is configured to interact with the varactor circuit to create a modulated signal for the envelope circuit, and wherein the envelope circuit is configured to demodulate the signal for the voltage detector.
2. The system of claim 1 wherein the envelope circuit is electrically connected to the RF oscillator and the isolation capacitor via a buffer.
3. The system of claim 2 wherein the varactor circuit includes an inductor configured to create a resonance circuit.
4. The system of claim 3 further comprising a charge pump circuit configured to create a voltage similar to one intended to be detected by the system.
5. The system of claim 4 further comprising an independent high impedance path to ground for the charge pump circuit configured to create a voltage divider to the charge pump circuit.
Description
BRIEF DESCRIPTION OF FIGURES
[0006]
[0007]
[0008]
[0009]
[0010]
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011]
[0012] The amplitude limiter 104 limits the amplitude of the signal that will be applied to the varactor circuit 107.
[0013] The varactor circuit 107 includes two opposing varactor diodes 108. Varactor diodes act as voltage controlled capacitors whose capacitance increases as the reverse voltage applied across the varactor diode decreases. As a result, as the reverse voltage decreases so does the impendence path for the RF oscillator circuit 112. Thus, since the resistor of the oscillator 113 circuit remains constant (and since a voltage divider is created between the resistor 113 and varactor circuit 107), a modulated signal is created for the envelope detection circuit 115 which reflects the voltage applied across the varactor circuit 107.
[0014] The envelope detection circuit 115 acts as a demodulator with an output that is dependent upon the detected voltage of the system 10. By monitoring the output voltage of the envelope detection circuit 115, and by knowing a base or calibration magnitude, one can then determine whether voltage is present from the power signal.
[0015] The isolation capacitor 110 isolates the RF oscillator circuit 112 and the envelope detection circuit 115 from low frequency and DC signals from the amplitude limiter 104 and varactor circuit 107.
[0016]
[0017] The sensitivity of such a system can be optimized around a specific voltage level (such as zero volts) as shown in
[0018] Absence of voltage indicators may need to perform various tests to help indicate that the device is functioning properly. These tests may be performed automatically or manually (initiated by a user).
[0019] Another test can involve testing for continuity between the power line 101 and the rest of the system.
[0020] The above systems can be applied with a three phase power line as shown in
[0021] In order to meet some fault tolerant requirements and to provide a high degree of confidence in function of the devise, the functions of the system can be split into two independent branch circuits. One is to perform voltage detection function and the other one is for testing the system functionality by presenting various states and monitoring that the voltage-detection branch circuits are functioning as intended. The various states can include a connectivity test on each phase, voltage testability of the device on each phase, and other self-test functions
[0022] While particular embodiments and applications of the present invention have been illustrated and described, it is to be understood that the invention is not limited to the precise construction and compositions disclosed herein and that various modifications, changes, and variations may be apparent from the foregoing without departing from the spirit and scope of the invention as described.