MONOLITHICALLY INTEGRATED SEMICONDUCTOR SWITCH, PARTICULARLY CIRCUIT BREAKER
20170323884 ยท 2017-11-09
Inventors
Cpc classification
H01L29/7392
ELECTRICITY
H01L27/0266
ELECTRICITY
H03K2217/0018
ELECTRICITY
H03K17/567
ELECTRICITY
International classification
H01L29/16
ELECTRICITY
H01L29/739
ELECTRICITY
H03K17/567
ELECTRICITY
Abstract
A monolithically integrated semiconductor switch, particularly a circuit breaker, has regenerative turn-off behaviour. The semiconductor switch has two monolithically integrated field effect transistors, for example a p-JFET and a n-JFET. The source electrodes of both JFETs and the well region of the n-JFET are short circuited. In addition, the gate electrodes of both JFETs and the drain electrode of the p-JFET are short-circuited via the cathode. In contrast, the well region of the p-JFET is short-circuited to the anode. In this way, a monolithically integrated semiconductor switch is created which turns off automatically when a certain anode voltage level or a certain anode current level is exceeded. The threshold values for the anode voltage and the anode current can be set by appropriate dimensioning of the elements. In this way, it is possible to achieve blocking strengths of up to 200 kV with fast response behaviour.
Claims
1. A semiconductor switch having a first and a second monolithically integrated field effect transistor, of which one has an n-doped channel and one has a p-doped channel, in which a source or emitter electrode of the first field effect transistor is short circuited to a source or emitter electrode of the second field effect transistor, a drain or collector electrode of the first field effect transistor is connected to a first electrical terminal of the semiconductor switch, and a drain or collector electrode of the second field effect transistor is connected to a second electrical terminal of the semiconductor switch, wherein a well region of the second field effect transistor is short-circuited to the source or emitter electrodes of both field effect transistors, a well region of the first field effect transistor is short-circuited to the second electrical terminal of the semiconductor switch, and a gate or base electrode of the first field effect transistor is short-circuited to the first electrical terminal of the semiconductor switch and a gate or base electrode of the second field effect transistor is short-circuited to the first electrical terminal of the semiconductor switch or is arranged so as to be externally controllable.
2. The semiconductor switch according to claim 1, characterised in that the source or emitter electrode of the first field effect transistor and the source or emitter electrode of the second field effect transistor are arranged adjacent to each other.
3. The semiconductor switch according to claim 1, characterised in that the first field effect transistor is a p-JFET, the first electrical terminal is a cathode terminal and the second electrical terminal is an anode terminal.
4. The semiconductor switch according to claim 3, characterised in that the second field effect transistor is a n-JFET.
5. The semiconductor switch according to claim 3, characterised in that the second field effect transistor is a n-BIFET.
6. The semiconductor switch according to claim 1, characterised in that the first field effect transistor is a n-JFET, the first electrical terminal is an anode terminal and the second electrical terminal is a cathode terminal.
7. The semiconductor switch according to claim 6, characterised in that the second field effect transistor is a p-JFET.
8. The semiconductor switch according to claim 6, characterised in that the second field effect transistor is a p-BIFET.
9. The semiconductor switch according to claim 1, characterised in that both field effect transistors are monolithically integrated in a semiconductor substrate made from silicon or silicon carbide.
10. The semiconductor switch according to claim 1, characterised in that both field effect transistors are monolithically integrated in a semiconductor substrate made from the 4H polytype of silicon carbide.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0021] In the following, the suggested monolithically integrated circuit breaker will be explained again in greater detail with reference to exemplary embodiments thereof and in conjunction with the drawings.
[0022]
[0023]
[0024]
[0025]
[0026]
[0027]
[0028]
[0029]
WAYS TO REALISE THE INVENTION
[0030]
[0031] In a further exemplary variation of the suggested circuit breaker, the n-JFET of the previous example is replaced with a n-BIFET, as is represented in the equivalent circuit diagram of
[0032] Another possible way to realise the circuit breaker according to the invention is shown in the equivalent circuit diagram of
[0033] Finally,
[0034] The suggested circuit breaker may also be realised with a circuit arrangement as illustrated for exemplary purposes in the equivalent circuit diagram of
[0035]
[0036] Accordingly, the monolithically integrated circuit breaker consists of p-doped collector region 11, n-doped field stop region 12, n-doped drift region 13, p-doped well region 14, n-doped emitter region 15 of the BIFET, n-doped channel region 16 of the n-BIFET, p-doped gate region 17 of the n-BIFET, p-doped channel region 18 of the lateral p-JFET and p-doped source region 19 and p-doped drain region 20 of the lateral p-JFET, as shown in
[0037] In the configuration shown, it would be possible to realise monolithic integration of a n-JFET and a p-JFET by substituting the p-doped collector region 11 with an n-doped collector region. Preferably silicon or silicon carbide, and particularly preferably the 4H polytype of silicon carbide is used as the semiconductor substrate. The circuit illustrated in
[0038]
[0039] The configuration with the suggested circuit breaker 1 represented in
REFERENCE LIST
[0040] 1 circuit breaker [0041] 2 Load [0042] 3 Mechanical/magnetic contactor [0043] 4 Relay [0044] 10 Metallisation [0045] 11 p-doped collector region [0046] 12 n-doped field stop region [0047] 13 n-doped drift region [0048] 14 p-doped well region [0049] 15 n-doped emitter region [0050] 16 n-doped channel region (BIFET) [0051] 17 p-doped gate region [0052] 18 p-doped channel region (JFET) [0053] 19 p-doped source region (BIFET) [0054] 20 p-doped drain region [0055] 21 Ohmic layer [0056] 22 Isolating layer [0057] 23 n-doped gate region [0058] A Anode [0059] D Drain [0060] G Gate [0061] C Cathode [0062] S Source [0063] T.sub.on Pushbutton [0064] T.sub.off Pushbutton