Temperature sensor with layered architecture

09810584 · 2017-11-07

Assignee

Inventors

Cpc classification

International classification

Abstract

A temperature sensor includes two branches, each branch having at least a first transistor and a second transistor connected as diodes and cascaded, so that an emitter of the first transistor is connected to a collector of the second transistor of the same branch. The temperature source also includes a current source configured to provide a current to the two branches, and an analog-to-digital convertor. The analog-to-digital convertor is connected to capture a voltage between emitters of the first transistors or of the second transistors, and is configured to convert said voltage to a digital temperature signal.

Claims

1. A temperature sensor comprising: two branches, each branch including at least a first transistor and a second transistor connected as diodes and cascaded so that an emitter of the first transistor of a first layer of a branch is connected to a collector of the second transistor of a second layer of the same branch a current source configured to provide a current to the two branches; and an analog-to-digital convertor connected to capture a voltage between emitters of the first transistors or of the second transistors, and configured to convert said voltage to a digital temperature signal, wherein the first and the second transistor of a first branch among the two branches have a same first PN-junction area and a first and a second transistor of a second branch among the two branches have a same second PN-junction area, said second PN-junction area being different from said first PN-junction area by a predetermined factor.

2. The temperature sensor according to claim 1, further comprising switches configured to connect said analog-to-digital convertor to the emitters of the first transistors or of the second transistors.

3. The temperature sensor according to claim 2, wherein said switches are commanded so that said analog-to-digital convertor captures alternatively the voltage at the emitters of the first transistors and of the second transistors, respectively.

4. The temperature sensor according to claim 2, wherein said switches are commanded to be opened or closed according to said digital temperature signal.

5. The temperature sensor according to claim 1, wherein said predetermined factor is equal to 64.

6. The temperature sensor according to claim 1, further comprising switches for connecting and disconnecting said current source to said two branches.

7. A method for sensing a temperature comprising: providing a current to two branches, each of the two branches including at least a first transistor and a second transistor connected as diodes and cascaded so that an emitter of the first transistor is connected to a collector of the second transistor of the same branch, capturing a voltage between emitters of the transistors of the first transistors; and converting said voltage to a signal temperature signal, by an analog-to-digital convertor, wherein the first and the second transistor of a first branch among the two branches have a same first PN-junction area and a first and a second transistor a second branch among the two branches have a same second PN-junction area, said second PN-junction area being different from said first PN-junction area by a predetermined factor.

8. The method for sensing a temperature according to claim 7, further comprising: connecting said analog-to-digital convertor to the emitter of the transistors of a selected layer by switches.

9. The method for sensing a temperature according to claim 7, wherein said switches are commanded so that said analog-to-digital convertor captures alternatively a voltage at the emitters of the first transistors and of the second transistors, respectively.

10. The method for sensing a temperature according to claim 8, wherein said analog-to-digital convertor is connected to the emitters of the first transistors or of the second transistors according to said digital temperature signal.

11. The method for sensing a temperature according to claim 7, wherein said predetermined factor is equal to 64.

12. The method for sensing a temperature according to claim 7, further comprising: connecting and disconnecting a current source providing said current to said two branches by switches.

13. A mobile communication device comprising a temperature sensor having: two branches, each branch including at least a first transistor and a second transistor connected as diodes and cascaded so that an emitter of the first transistor of a first layer of a branch is connected to a collector of the second transistor of a second layer of a branch of the same branch; a current source configured to provide a current to the two branches; and an analog-to-digital convertor connected to capture a voltage between emitters of the first transistors or of the second transistors, and configured to convert said voltage to a digital temperature signal, wherein the first and the second transistor of a first branch among the two branches have a same first PN-junction area and a first and a second transistor a second branch among the two branches have a same second PN-junction area, said second PN-junction area being different from said first PN-junction area by a predetermined factor.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 shows a typical scheme for sensing the temperature on a silicon die according to prior art.

(2) FIG. 2 shows a typical embodiment of the PTAT principle according to prior art.

(3) FIG. 3 shows an embodiment of a temperature sensor according to the invention.

DETAILED DESCRIPTION OF THE INVENTION

(4) FIG. 3 is a high-level schema representing an embodiment of a temperature sensor according to the invention.

(5) In this embodiment, the temperature sensor comprises two branches A, B comprising each 3 transistors T.sub.A1, T.sub.A2, T.sub.A3, T.sub.B1, T.sub.B2, T.sub.B3.

(6) The transistors are connected as diodes. It means that the collector and the base are connected together, thereby forming PN junctions.

(7) In this embodiment, there are 3 layers, L1, L2, L3. Each layer corresponds to a transistor in each of the branch: Layer 1 corresponds to a transistor T.sub.A1 in branch A, and to a transistor T.sub.B1 in branch B; Layer 2 corresponds to a transistor T.sub.A2 in branch A, and to a transistor T.sub.B3 in branch B; Layer 3 corresponds to a transistor T.sub.A3 in branch A, and to a transistor T.sub.B3 in branch B.

(8) In each branch, the transistors are cascaded so that the emitter of the transistor of a first layer of a branch is connected to the collector of the transistor of a second layer of the same branch, the two layers being successive: The emitter of the transistor T.sub.A1 is connected to the collector of the transistor T.sub.A2; The emitter of the transistor T.sub.A2 is connected to the collector of the transistor T.sub.A3; The emitter of the transistor T.sub.B1 is connected to the collector of the transistor T.sub.B2; The emitter of the transistor T.sub.B2 is connected to the collector of the transistor T.sub.B3.

(9) The collectors (and the bases) of the transistors T.sub.A1, T.sub.B1 of the first layer L1 are grounded, whereas the emitters of the transistors T.sub.A3, T.sub.B3 of the third layer L3 are connected to current providing means CS.

(10) These current providing means are able to provide a current i.sub.bias to the two branches A, B.

(11) Several embodiments are possible. In the example depicted in FIG. 3, the current providing means are implemented as a single current source CS.

(12) The current source CS provides a current i.sub.bias which is then driven to both branches A, B. The current source can be linked to the branches A, B (or more concretely to the transistors of the last layer L3 for each branch) by switches S.sub.CSA, S.sub.CSB. these Switches Enable to Connect or Disconnect the Current Source CS to the branches.

(13) Another embodiment consists in having two current sources, each driving its own branch.

(14) Furthermore, the temperature sensor comprises means for capturing a voltage ΔV.sub.AB between the transistors of both branches at a same layer, for instance L2 or L3, and especially between the emitters of these transistors.

(15) This voltage ΔV.sub.AB is representative of the temperature and can be provided to an analog-to-digital convertor (ADC) for converting this voltage to a digital temperature signal.

(16) The analog-to-digital convertor ADC can be connected to the emitters by switches S.sub.a2, S.sub.b2, S.sub.a3, S.sub.a3.

(17) This allows switching between several configurations by selecting a particular layer: In a first configuration, the voltage ΔV.sub.AB is captured at the emitters of the transistors T.sub.A2 and T.sub.B2 of the layer 2. In a second configuration, the voltage ΔV.sub.AB is captured at the emitters of the transistors T.sub.A3 and T.sub.B3 of the layer 3.

(18) Also, according to an embodiment of the invention, the analog-to-digital convertor ADC captures alternatively the voltage at the emitters of the transistors T.sub.A2, T.sub.B2 of a same layer.

(19) The analog-to-digital convertor ADC may capture the voltage value at each time slot, in accordance with a reference voltage V.sub.ref. The differential voltage ΔV.sub.AB is captured, or determined, after 2 time slots by simply subtracting two consecutive captured voltage values.

(20) For instance, if the circuit is configured as a 3-layer configuration, during a first time slot, the switches S.sub.a3, S.sub.b3 are configured to that the analog-to-digital convertor captures the voltage value between the emitter of the transistor, T.sub.a3 and the reference voltage V.sub.ref In the next time slot, the switches S.sub.a3, S.sub.b3 are reconfigured to that the analog-to-digital convertor captures the voltage value between the emitter of the transistor, T.sub.b3 and the reference voltage V.sub.ref. ΔV.sub.AB can then be directly decided from these 2 measurements.

(21) The switches S.sub.a3, S.sub.b3 can be commanded to alternatively connect the analog-to-digital convertor ADC to the emitter of a different transistor, T.sub.a3.

(22) The conversion time and the switching from one branch to the other is very quick, typically below 50 whereas the temperature evolution is at a slower scale, typically slower than 1° C./ms. Therefore the fact that the tension is captured at two different times for both branches has no impact on the accuracy of the determined temperature.

(23) Other embodiments for capturing the voltage ΔV.sub.AB are also possible.

(24) For instance, a differential-to-single ended signal converter can be added between the branches and the analog-to-digital convertor to convert the time-shifted samples at each branch into a single signal that is then inputted in the ADC (the ADC has, in this case, only one inputs).

(25) It should be clear that the invention comprises the feature of providing an analog-to-digital convertor ADC for capturing a voltage ΔV.sub.AB between emitters of the transistors T.sub.A2, T.sub.B2 of a same layer of both branches and converting said voltage to a digital temperature signal,

(26) However, the invention does not lie in particular way to do this capture, and in particular if some further elements are introduced downstream or upstream to the analog-to-digital converter ADC.

(27) In an embodiment of the invention, all transistors of a first branch B have a same first PN junction area a.sub.B and all transistors of the second branch A have a same second PN-junction area a.sub.A. The second PN-junction area a.sub.A is different from the first PN junction area a.sub.A by a predetermined factor N, so that:

(28) N = a B a A

(29) Since the current intensity i.sub.bias is driven to both branches, the voltage ΔV.sub.AB can be expressed from the areas of the respective PN-junction of the transistors of the two branches. At the output of a 1-layer configuration, the voltage ΔV.sub.AB would express:

(30) Δ V AB = k .Math. T q .Math. ln ( a B a A )

(31) In a 2-layer configuration, the voltage ΔV.sub.AB is given by:

(32) Δ V AB = 2 .Math. k .Math. T q .Math. ln ( a B a A ) = 2 .Math. k .Math. T q .Math. ln ( N )

(33) In a 3-layer configuration, the voltage ΔV.sub.AB is given by:

(34) Δ V AB = 3 .Math. k .Math. T q .Math. ln ( a B a A ) = 3 .Math. k .Math. T q .Math. ln ( N )

(35) According to this embodiment, two parameters can be set up in order to optimize the digital temperature signal provided by the analog-to-digital convertor ADC: The predetermined factor N, The number of layers of the architecture.

(36) These parameters can be chosen according to the conditions under which the temperature sensor should be operating.

(37) The parameters should be chosen also according to the technical characteristics of the analog-to-digital converter ADC, e.g. so as to avoid its saturation and getting a good enough excursion of the input signal, i.e. the measured voltage ΔV.sub.AB.

(38) Under some conditions, N can be equal to 64.

(39) The number of layers can typically be equal to 2 or 3, although other values may be acceptable according to the conditions. For instance, if the ADC input channel range is around 1.8 V, and the temperature is a normal room temperature, only 2 layers are needed to avoid ADC saturation. With hotter temperature, a better accuracy is achieved with 3 layers.

(40) According to an embodiment of the invention, the digital temperature signal can be used, in a back-loop, to control the switches and select the appropriate configuration dynamically.

(41) In the case of a 3-layer configuration, the voltage ΔV.sub.AB is given by:
ΔV.sub.AB≈293.5 mV+1.075 mV×T.sub.c where T.sub.c is the temperature expressed in Celsius.

(42) Accordingly, a change of 1° C. in temperature results in a variation of the voltage ΔV.sub.AB of:

(43) d Δ V AB d T = 1.075 mV

(44) If the analog-to-digital convertor ADC is a 10-bits ADC having a 1.8 V input range, the Least Significant Bit (LSB) corresponds to 1.64° C.

(45) This may be considered as a sufficient level to avoid conversion problems induced by the analog-to-digital convertor ADC like quantization errors or Integrated Non Linearity (INL).

(46) As the determination of the sensed temperature rely on the difference of two PN junctions, process deviation does not play a role. Thus, no calibration is required.

(47) Similarly, as a common bias current is driven to both branches A, B, current mismatch does not play a role.

(48) The accuracy of the temperature sensor according to the invention comes directly from the mismatch of the PN junctions of the 2 branches, i.e. from a deviation of the ideal predetermined factor N.

(49) By staggering different amounts of PN-junctions, the gain of the sensor can be selected as optimal with respect to the ADC conversion range.

(50) The invention has been described with reference to preferred embodiments. However, many variations are possible within the scope of the invention.