Manufacturing method of multilayer printed circuit boards

Abstract

A manufacturing method of multilayer printed circuit boards has steps as follows: aligning circuit layers with a stacking location to form a substrate having multiple positioning portions; pre joining the substrate at the positioning portions; forming an alignment hole in each positioning portion; and placing the pre joined substrate over alignment pins of a press device for lamination. After the circuit layers are aligned, the substrate is pre joined at the positioning portions, and then the alignment holes are formed in the positioning portions for pins alignment at the press device. The alignment accuracy is enhanced. Dusts will not deposit onto surfaces of the circuit layers to damage circuits thereof.

Claims

1. A manufacturing method of multilayer printed circuit boards comprising steps as follows: preparing multiple circuit layers and at least one bonding layer; individually aligning and stacking the circuit layers with a stacking location and placing one of the at least one bonding layer between each two of the circuit layers adjacent each other to form a substrate, the substrate having multiple positioning portions defined in the substrate; bonding the circuit layers at positioning portions of the substrate by thermal compression bonding to pre-join the circuit layers; forming an alignment hole through all of the circuit layers and the at least one bonding layer at each positioning portion of the substrate; placing the substrate over alignment pins of a press device via the alignment holes of the substrate; and laminating the substrate.

2. The manufacturing method as claimed in claim 1, wherein after the circuit layers are pre-joined at the positioning portions of the substrate by thermal compression bonding, the substrate is riveted at multiple locations not at the positioning portions.

3. The manufacturing method as claimed in claim 1, wherein after the circuit layers are pre-joined, the substrate is optically aligned in a tooling machine, and then the alignment holes are formed through all of the circuit layers and the at least one bonding layer at the positioning portions by the tooling machine.

4. The manufacturing method as claimed in claim 2, wherein the substrate is riveted by tubular rivets.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a block diagram of a manufacturing method of multilayer printed circuit boards in accordance with the present invention;

(2) FIGS. 2A to 2C are operational perspective views of the manufacturing method of multilayer printed circuit boards in accordance with the present invention;

(3) FIGS. 3A and 3B are operational cross sectional side views of the manufacturing method of multilayer printed circuit boards in FIG. 2, showing the substrate being pre joined by bonding; and

(4) FIGS. 4A and 4B are operational cross sectional side views of the manufacturing method of multilayer printed circuit boards in FIG. 2, showing the substrate being pre joined by riveting.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENT

(5) With reference to FIGS. 1, 2A to 2C, a manufacturing method of multilayer printed circuit boards (multilayer PCBs) in accordance with the present invention includes steps as follows:

(6) Step 1 (S101): preparing multiple circuit layers (circuit plates) 11 and at least one bonding layer (prepreg layer) 12;

(7) Step 2 (S102): individually aligning and stacking the circuit layers 11 with a stacking location and placing one of the at least one bonding layer 12 between two adjacent circuit layers 11 to form a substrate, the substrate having multiple positioning portions 10 defined therein;

(8) Step 3 (S103): pre joining the substrate at each positioning portion 10;

(9) Step 4 (S104): forming an alignment hole 100 in each positioning portion 10 of the substrate;

(10) Step 5 (S105): placing the substrate over alignment pins 21 of a press device via the alignment holes 100; and

(11) Step 6 (S106): laminating the substrate.

(12) With reference to FIG. 2A, in Step 1 (S101) and Step 2 (S102), after the circuit layers 11 and the at least one bonding layer 12 are prepared, the circuit layers 11 are sequentially and accurately aligned and stacked with each other at the stacking location, and one of the bonding layers 12 is placed between two adjacent circuit layers 11 during the stacking process. The bonding layer 12 (pregreg layer) is applied for bonding adjacent circuit layers 11 by a thermal compression bonding process. A number of the at least one bonding layer 12 is one less than a number of the circuit layers 11. Preferably, the circuit layers 11 are optically aligned with each other at the stacking location by an optical arrangement system. The optical arrangement system can facilitate accurate alignment to reduce misalignment between the layers. The positioning portions 10 of the substrate are defined (marked) by an optical positioning process to enhance the alignment accuracy.

(13) With reference to FIG. 2B, in Step 3 (S103), the circuit layers 11 of the substrate are pre joined at each positioning portion 10. The circuit layers 11 may be pre joined via thermal compression bonding, riveting, or a combination of bonding and riveting.

(14) With reference to FIG. 2C, in Step 4 (S104), an alignment hole 100 is formed through all of the circuit layers 11 and the at least one bonding layer 12 in each positioning portion 10 of the substrate, where the circuit layers 11 are pre-joined. The alignment holes 100 may be formed by machining drilling, laser drilling, perforating, or punching. Because the circuit layers 11 of the substrate are pre joined together before formation of the alignment holes 100, the circuit layers 11 and the bonding layers 12 abut against each other closely and are partially joined. Dust and cuttings of the bonding layers 12 (prepreg layers) generated during formation of the alignment holes 100 may not deposit between the surfaces of the adjacent circuit layers 11.

(15) The lamination of the substrate in Step 6 (S106) is processed by thermal compression bonding the substrate to bond the circuit layers 11 and the bonding layers 12 completely. Thus, the circuit layers 11 can be closely laminated in accurate alignment.

(16) With reference to FIG. 3A, one of the pre joining methods is bonding the circuit layers 11 of the substrate at the positioning portions 10 by thermal compression bonding. The circuit layers 11 are partially fixed in the positioning portions 10 by thermal compression bonding. The bonding layers 12 partially bond the adjacent circuit layers 11 at the positioning portions 10, before the alignment holes 100, which may be slots or round holes, are formed therein. Thus, dusts and cuttings will fall out from the substrate, and will not deposit between the bonding layers 12 and the circuit layers 11 to damage circuits formed on surfaces of the circuit layers 11.

(17) With reference to FIG. 3B, after the alignment holes 100 are formed in the substrate, the substrate is placed over the alignment pins 21 via the alignment holes 100 for the lamination process. The circuit layers 11 of the substrate are completely laminated together by the bonding layers 12. The substrate is partially joined at the positioning portions 10 by thermal compression bonding at the pre joining process, and the integrated substrate is placed over the alignment pins 21 via the alignment holes 100 for further positioning before the lamination process. Thus, the circuit layers 11, which are accurately aligned and stacked by the optical alignment system, can avoid misalignment during the lamination process.

(18) With reference to FIG. 4A, one of the pre joining methods is riveting the circuit layers 11 of the substrate at the positioning portions 10. Rivets 13 are each respectively mounted in the positioning portions 10 for fastening the circuit layers 11. The circuit layers 11 are partially fastened by the rivets 13 to provide a stronger joining strength. Even subjected to a force in parallel, the circuit layers 11 of the substrate will not be displaced relative to one another, thereby ensuring the alignment of the circuit layers 11. Preferably, the rivets 13 are tubular rivets, and the alignment holes 100 can be easily formed through the rivets 13. With reference to FIG. 4B, the alignment holes 100 are formed in the rivets 13 for the alignment pins 21 to mount therethrough. The circuit layers 11 are partially fastened at the positioning portions 10 by riveting. The alignment holes 100 are formed therein after the riveting, and the integrated substrate can be placed over the alignment pins 21 via the alignment holes 100. Thus, after the circuit layers 11 are optically aligned, the circuit layers 11 may not be displaced from the stacked position by external forces during transport or lamination.

(19) One of the pre joining methods is firstly bonding the circuit layers 11 of the substrate at the positioning portions 10 by thermal compression bonding, then riveting the substrate at various locations not at the positioning portions 10 to prevent the circuit layers 11 from slipping during riveting. The alignment accuracy of the circuit layers 11 can be further enhanced.

(20) Preferably, after the pre joining process, the substrate is optically aligned in the tooling machine by an optical alignment system, to ensure the positioning portions 10 are aligned with the respective hole-formation positions defined by the tooling machine. After that, the alignment holes 100 are respectively formed in the positioning portions 10 by the tooling machine.

(21) The stacking alignment of the circuit layers 11 is done by the optical alignment system. The optical alignment system can provide high alignment accuracy to ensure the circuit layers 11 are accurately aligned with each other. The positioning portions 10 are defined (marked) by the optical alignment system, and the circuit layers 11 are partially joined at the positioning portions 10 during the pre joining process. After that, the alignment holes 100 are respectively formed in the positioning portions 10 for placing the substrate on the alignment pins 21 via the alignment holes 100 before the lamination process. The positioning portions 10 are defined by the optical alignment system, which can provide accurate positioning. The alignment holes 100 can be accurately aligned with corresponding alignment pins 21.

(22) The substrate is partially joined and the bonding layers 12 are placed within the circuit layers 11 before the formation of the alignment holes 100. The alignment holes 100 are formed in the integrated substrate by drilling, punching, or perforating, instead of being respectively formed in the individual circuit layers 11 and the bonding layers 12 by drilling, punching, or perforating. Dusts and cuttings generated during drilling or punching may not deposit onto the surfaces of the inner circuit layers 11. The circuits of the circuit layers 11 can avoid scratching and damage by the dusts and the cuttings. The alignment holes 100 formed in the integrated substrate can enhance the positioning accuracy. Moreover, as the substrate is partially joined, the substrate can be integrally placed over the alignment pins 21, instead of being individually placed over the alignment pins 21 layer by layer. The damage to the edges of the alignment holes 100 and circuits formed on the surfaces of the circuit layers 11 can be reduced.

(23) With the manufacturing method of the present invention, the optical alignment after pre joining the substrate reduces the tolerance incurred from layer-to-layer alignment. Welding or bonding in the positioning portions 10 where the alignment holes 100 are formed will reduce dust from the bonding layer 12 (prepreg layer). Drilling the alignment holes 100 after optical alignment will improve accuracy of the layer-to-layer alignment. The whole substrate is installed on the alignment pins 21, already assembled and alignment holes added so damage from processing is reduced. The whole substrate is more stable during the final lamination process.