Semiconductor Element and Fabrication Method Thereof

Abstract

A semiconductor element has a metal protective layer and a metal oxide protective layer formed on the substrate to prevent the Si substrate surface from forming an amorphous layer; and a transition layer to reduce lattice difference between the metal oxide protective layer and the III-IV-group buffer layer, thus improving crystal quality of the III-IV-group buffer layer. A fabrication method can avoid formation of amorphous layers and cracks surrounding the Si substrate surface. A light-emitting diode (LED) element or a transistor element can be formed by depositing a high-quality multi-layer buffer structure via PVD and forming a GaN, InGaN or AlGaN epitaxial layer thereon.

Claims

1. A semiconductor element, comprising: a Si substrate, a multi-layer buffer structure, and an epitaxial function layer, wherein: the multi-layer buffer structure comprises a metal protective layer, a metal oxide protective layer, a transition layer, and a III-IV-group buffer layer in sequence; wherein the metal protective layer and the metal oxide protective layer are configured to prevent the Si substrate surface from forming an amorphous layer; and the transition layer is configured to reduce a lattice difference between the metal oxide protective layer and the III-IV-group buffer layer, thereby improving crystal quality of the III-IV-group buffer layer.

2. The semiconductor element according to claim 1, wherein the metal protective layer is made of aluminum with a thickness of 1˜100 Å.

3. The semiconductor element according to claim 1, wherein the metal oxide protective layer is made of aluminum oxide with a thickness of 1˜500 Å.

4. The semiconductor element according to claim 1, wherein the transition layer is made of oxygen-doped AlN, with an oxygen-doping concentration of ≧1×10.sup.19cm.

5. The semiconductor element according to claim 1, wherein the III-IV-group buffer layer is made of oxygen-doped AlN, with an oxygen-doping concentration of ≦4×10.sup.22cm.sup.−3.

6. A method for fabricating a semiconductor element structure by forming a multi-layer buffer structure and an epitaxial function layer on the Si substrate, wherein, the multi-layer buffer structure is formed by: depositing a metal protective layer on the Si substrate surface via physical vapor deposition (PVD); feeding oxygen to oxidize the upper surface of the metal protective layer, and depositing a metal oxide protective layer on the metal protective layer via PVD; keeping feeding of oxygen and feeding nitrogen, and depositing a transition layer on the surface of the metal oxide protective layer via PVD; stop feeding oxygen, and keeping feeding of nitrogen, and depositing an III-IV-group buffer layer on the transition layer surface via PVD to form a multi-layer buffer structure.

7. The method for fabricating a semiconductor element according to claim 6, wherein the metal protective layer is made of aluminum with thickness of 1˜100 Å.

8. The method for fabricating a semiconductor element according to claim 6, wherein the metal oxide protective layer is made of aluminum oxide with thickness of 1˜500 Å.

9. The method for fabricating a semiconductor element according to claim 6, wherein the transition layer is made of oxygen-doped AlN with oxygen concentration of ≧1×10.sup.19cm.sup.−3 and thickness of 1˜1000 nm.

10. The method for fabricating a semiconductor element according to claim 6, wherein the transition layer is made of oxygen-doped AlN with oxygen concentration of ≧1×10.sup.19cm.sup.−3 and thickness of 5˜50 nm.

11. The method for fabricating a semiconductor element according to claim 6, wherein the III-IV-group buffer layer is made of oxygen-doped AlN, with an oxygen-doping concentration of ≦4×10.sup.22cm.sup.−3 and a thickness of 10˜1000 nm.

12. The method for fabricating a semiconductor element according to claim 6, wherein the III-IV-group buffer layer is made of oxygen-doped AlN, with oxygen-doping concentration of ≦4×10.sup.22cm.sup.−3 and a thickness of 200˜300 nm.

13. The method for fabricating a semiconductor element according to claim 6, wherein an oxygen-doping concentration of the transition layer is higher than that of the III-IV-group buffer layer.

14. The method for fabricating a semiconductor element according to claim 6, wherein: the epitaxial function layer is a light-emitting diode (LED) epitaxial layer or a transistor epitaxial layer.

15. A light-emitting system comprising a plurality of semiconductor elements, each element comprising: a Si substrate, a multi-layer buffer structure, and an epitaxial function layer, wherein: the multi-layer buffer structure comprises a metal protective layer, a metal oxide protective layer, a transition layer, and a III-IV-group buffer layer in sequence; wherein the metal protective layer and the metal oxide protective layer are configured to prevent the Si substrate surface from forming an amorphous layer; and the transition layer is configured to reduce a lattice difference between the metal oxide protective layer and the III-IV-group buffer layer, thereby improving crystal quality of the III-IV-group buffer layer.

16. The system according to claim 15, wherein the metal protective layer comprises aluminum with a thickness of 1˜100 Å.

17. The system according to claim 15, wherein the metal oxide protective layer comprises aluminum oxide with a thickness of 1˜500 Å.

18. The system according to claim 15, wherein the transition layer comprises oxygen-doped AlN, with an oxygen-doping concentration of ≧1×10.sup.19cm.

19. The system according to claim 15, wherein the III-IV-group buffer layer comprises oxygen-doped AlN, with an oxygen-doping concentration of ≦4×10.sup.22cm.sup.−3.

20. The system according to claim 15, wherein each semiconductor element is fabricated by forming a multi-layer buffer structure and an epitaxial function layer on the Si substrate, wherein, the multi-layer buffer structure is formed by: depositing a metal protective layer on the Si substrate surface via physical vapor deposition (PVD); feeding oxygen to oxidize the upper surface of the metal protective layer, and depositing a metal oxide protective layer on the metal protective layer via PVD; keeping feeding of oxygen and feeding nitrogen, and depositing a transition layer on the surface of the metal oxide protective layer via PVD; stop feeding oxygen, and keeping feeding of nitrogen, and depositing an III-IV-group buffer layer on the transition layer surface via PVD to form a multi-layer buffer structure.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The accompanying drawings, which are included to provide a further understanding of the invention and constitute a part of this specification, together with the embodiments, are therefore to be considered in all respects as illustrative and not restrictive. In addition, the drawings are merely illustrative, which are not drawn to scale.

[0028] FIG. 1 is first structural diagram of a semiconductor structure of Embodiment 1.

[0029] FIG. 2 is a structural diagram of multi-layer buffer structure of Embodiment 1.

[0030] FIG. 3 is second structural diagram of a semiconductor structure of Embodiment 1.

[0031] FIG. 4 is a structural diagram of a semiconductor structure of Embodiment 2.

[0032] In the drawings: 10. Si substrate; 20. multi-layer buffer structure; 21. metal protective layer; 22. metal oxide protective layer; 23. transition layer; 24. III-IV-group buffer layer; 30. epitaxial function layer; 31. first semiconductor layer; 32. light-emitting layer; 33. second semiconductor layer; 34. non-doping semiconductor layer; 35. AlGaN layer; 36. GaN semiconductor layer; 37. AlGaN semiconductor layer; 38. GaN semiconductor covering layer.

DETAILED DESCRIPTION

[0033] The embodiments of the present disclosure will be described in detail with reference to the accompanying drawings and embodiments.

Embodiment 1

[0034] Referring to FIGS. 1 and 2, this embodiment provides a semiconductor element, comprising: a Si substrate 10, a multi-layer buffer structure 20 and an epitaxial function layer 30, wherein, the epitaxial function layer 30 is a LED epitaxial layer composed of a first semiconductor layer 31, a light-emitting layer 32 and a second semiconductor layer 33; the first semiconductor layer 31 is a semiconductor layer doped with donor impurity, and the second semiconductor layer 33 is a semiconductor layer doped with acceptor impurity. The semiconductor element according to some embodiments can also comprise a non-doping semiconductor layer 34 (Referring to FIG. 3). The multi-layer buffer structure 20 is composed of a 1˜100 Å metal protective layer 21, a 1˜500 Å metal oxide protective layer 22, a 1˜1,000 nm transition layer 23 and a 10˜1,000 nm III-IV-group buffer layer 24. In this embodiment, a 5˜50 nm transition layer 23 and a 200˜300 nm III-IV-group buffer layer 24 are preferred. Materials of the metal protective layer 21, the metal oxide protective layer 22, the transition layer 23 and the III-IV-group buffer layer 24 are aluminum, aluminum oxide, oxygen-doped AlN with oxygen concentration of ≧1×10.sup.19cm.sup.−3 and oxygen-doped AlN with oxygen concentration of ≦10×10.sup.22cm.sup.−3, wherein, to improve crystal quality of subsequently-deposited epitaxial layer, in this embodiment, oxygen-doping concentration of the transition layer 23 is higher than that of the III-IV-group buffer layer 24.

[0035] As a small amount of oxygen would be doped during depositing of an AlN buffer layer via conventional PVD, the Si substrate 10 is likely to be oxidized; therefore, when the AlN buffer layer containing micro oxygen is directly deposited on the surface of the Si substrate 10, the Si substrate 10 surface is oxidized into an amorphous silicon oxide layer. This amorphous silicon oxide layer leads to poor quality of the contact surface between the subsequently-deposited AlN buffer layer and the substrate 10, easy to generate cracks that degrade quality of the semiconductor devices; meanwhile, the amorphous silicon oxide layer lowers density of the AlN buffer layer and generates holes. In subsequent depositing of a Ga-containing nitride layer via MOCVD, Ga would corrode the Si substrate through the holes and form pits, which lead to poor performance of semiconductor devices. In the multi-layer buffer structure 20 of this embodiment, an Al protective layer 21 covers on the surface of the Si substrate 10 to prevent the Si substrate 10 surface from being oxidized as its direct contact with oxygen is blocked; then an aluminum oxide layer 22 is deposited to mitigate the Al protective layer 21 from being oxidized in subsequent depositing, which further protects the surface of the Si substrate 10 and avoids formation of an amorphous layer; then, a transition layer 23 with oxygen-doping concentration ≧1×10.sup.19cm.sup.−3 and an III-IV-group buffer layer 24 with oxygen-doping concentration ≦4×10.sup.22cm.sup.−3 are formed, wherein, the transition layer 23 effectively reduces lattice difference between the aluminum oxide layer 22 and the III-IV-group buffer layer 24, and improves crystal quality of the III-IV-group buffer layer 24, thus reducing internal crystal defects and dislocation of the subsequently-deposited epitaxial layer and improving performance the semiconductor.

[0036] To achieve the above structure and function, some embodiments of the present disclosure provide a method for fabricating the semiconductor epitaxial structure by forming a multi-layer buffer structure and an epitaxial function layer on the Si substrate, wherein, the multi-layer buffer layer can be formed by a process including one or more of the following steps.

[0037] First, providing a Si substrate 10 and putting it in a PVD chamber; cleaning the surface of the Si substrate 10 to remove impurities; in this step, the substrate 10 surface is cleaned with self-bias RF sputtering method under high temperature H2 or inert gas; wherein, inert gas is any one of argon, helium or neon. In this embodiment, argon is preferred.

[0038] Next, depositing a metal protective layer 21 on the Si substrate 10 surface via PVD; wherein, the metal protective layer 21 is made of aluminum; in this embodiment, magnetron sputtering is preferred.

[0039] Feeding oxygen to oxidize the upper layer of the metal protective layer 21, and depositing a metal oxide protective layer 22 on the surface of the metal protective layer 21 via PVD; wherein, the metal oxide protective layer 22 is made of aluminum oxide.

[0040] Keeping feeding of oxygen and feeding nitrogen, feeding a transition layer 23 on the metal oxide protective layer 22 via PVD, wherein, the transition layer is made of oxygen-doped AlN material with oxygen concentration of ≧1×10.sup.19cm.sup.−3.

[0041] Last, stop feeding oxygen, and keep feeding of nitrogen; then, depositing an III-IV-group buffer layer 24 made of oxygen-doped AlN material on the transition layer 23 surface via PVD to form a multi-layer buffer structure 20; wherein, oxygen concentration of the III-IV-group buffer layer 24 is ≦1×10.sup.22cm.sup.−3;

[0042] The multi-layer buffer structure 20 formed through this method features high crystal quality and flat interface. The dislocation, defect density and electric leakage of subsequently-formed Ga-containing LED are greatly reduced, thus improving device reliability and luminous efficiency of the entire light-emitting semiconductor device.

Embodiment 2

[0043] Referring to FIG. 4, difference between this embodiment and Embodiment 1 may include, a transistor epitaxial layer is deposited on the surface of the multi-layer buffer structure 20 as the epitaxial function layer 30, so as to form a transistor element. The fabrication method is structure is as follows: put the substrate of the multi-layer buffer structure 20 deposited with the metal protective layer 21, the metal oxide protective layer 22, the transition layer 23 and the III-IV-group buffer layer 24 into the MOCVD chamber, and deposit an AlGaN layer 35 via MOCVD to further mitigate lattice stress of the multi-layer buffer structure 20 and avoid cracks; then, deposit an unintentionally doped or C-doped or Fe-doped GaN semiconductor layer 36, and then an AlGaN semiconductor layer 37, wherein, the AlGaN semiconductor layer 37 generates high-density electron gas at interface through electric field polarization; and finally, deposit an GaN semiconductor covering layer 38, wherein, the covering layer 38 acts as a contact layer, to fabricate electrode and finally form a transistor element.

[0044] All references referred to in the present disclosure are incorporated by reference in their entirety. Although specific embodiments have been described above in detail, the description is merely for purposes of illustration. It should be appreciated, therefore, that many aspects described above are not intended as required or essential elements unless explicitly stated otherwise. Various modifications of, and equivalent acts corresponding to, the disclosed aspects of the exemplary embodiments, in addition to those described above, can be made by a person of ordinary skill in the art, having the benefit of the present disclosure, without departing from the spirit and scope of the disclosure defined in the following claims, the scope of which is to be accorded the broadest interpretation so as to encompass such modifications and equivalent structures.