Solder Alloy, Solder Paste, Solder Preform and Solder Joint

Abstract

Provided is a solder alloy, a solder paste, a solder preform, and a solder joint which suppress chip cracking during cooling, improve the heat dissipation characteristics of the solder joint, and exhibit high joint strength at high temperatures.

The solder alloy has an alloy composition of, by mass: Sb: 9.0 to 33.0%; Ag: more than 4.0% and less than 11.0%; and Cu: more than 2.0% and less than 6.0%, with the balance of Sn.

Moreover, the solder paste, the solder preform, and the solder joint all contain said solder alloy.

Claims

1-15. (canceled)

16. A solder alloy having an alloy composition consisting of, by mass: Sb: 9.0 to 33.0%; Ag: more than 4.0% and less than 11.0%; Cu: more than 2.0% and less than 6.0%; and the balance being Sn.

17. The solder alloy according to claim 16, wherein said alloy composition further comprises by mass at least one group of: a group consisting of at least one of Al: 0.003 to 0.1%, Fe: 0.01 to 0.2%, and Ti: 0.005 to 0.4%; a group in which the total content of at least one of P, Ge, and Ga is 0.002 to 0.1%; a group in which the total content of at least one of Ni, Co, and Mn is 0.01 to 0.5%; a group in which the total content of at least one of Au, Ce, In, Mo, Nb, Pd, Pt, V, Ca, Mg, Si, Zn, Bi, and Zr is 0.0005 to 1%.

18. The solder alloy according to claim 16, wherein said solder alloy has an alloy structure comprising at least one of: an Ag.sub.3Sn compound, a Cu.sub.3Sn compound, a Cu.sub.6Sn.sub.5 compound, and a SnSb compound, and the balance being a Sn phase.

19. The solder alloy according to claim 18, wherein said alloy structure includes the Sn phase in an amount of 5.6 to 70.2% by at %.

20. The solder alloy according to claim 18, wherein said alloy structure includes by at % the Ag.sub.3Sn compound: 5.8 to 15.4%, the Cu.sub.6Sn.sub.5 compound: 5.6 to 15.3%, the Cu.sub.3Sn compound: 1.0 to 2.8%, and the SnSb compound:16.8 to 62.1%.

21. The solder alloy according to claim 16, wherein said alloy composition satisfies the following equations (1) to (.sup.3): $\begin{array}{cc}1.2<\mathrm{Sn}\text{/}\left\{\left(\frac{26.84}{73.16}\right)\times \mathrm{Ag}+\left(\frac{60.89}{39.11}\right)\times \mathrm{Cu}\times x+\left(\frac{38.37}{61.63}\right)\times \mathrm{Cu}\times \left(1-x\right)+\left(\frac{49.37}{50.63}\right)\times \mathrm{Sb}\right\}\le 6.50& \mathrm{equation}\left(1\right)\\ \left(2/3\right)\le x\le \left(15.3/16\mathrm{.3}\right)& \mathrm{equation}\left(2\right)\\ 78\le \mathrm{Ag}\times \mathrm{Cu}\times \mathrm{Sb}\le 2029& \mathrm{equation}\left(3\right)\end{array}$ wherein Ag, Cu, and Sb each in the above equations (1) and (3) represent the content (mass %) in said alloy composition.

22. A solder alloy consisting of Ag, Cu, and Sb, the balance being Sn, wherein the solder alloy has an alloy structure comprising at least one of: an Ag.sub.3Sn compound, a Cu.sub.3Sn compound, a Cu.sub.6Sn.sub.5 compound, and a SnSb compound, and the balance being a Sn phase.

23. The solder alloy according to claim 22, wherein said alloy structure includes the Sn phase in an amount of 5.6 to 70.2% by at %.

24. The solder alloy according to claim 22, wherein said alloy structure includes by at % the Ag.sub.3Sn compound: 5.8 to 15.4%, the Cu.sub.6Sn.sub.5 compound: 5.6 to 15.3%, the Cu.sub.3Sn compound: 1.0 to 2.8%, and the SnSb compound: 16.8 to 62.1%.

25. A solder paste comprising the solder alloy according claim 16.

26. A solder paste comprising the solder alloy according to claim 17.

27. A solder preform comprising the solder alloy according to claim 16.

28. A solder preform comprising the solder alloy according to claim 17.

29. A solder joint comprising the solder alloy according claim 16.

30. A solder joint comprising the solder alloy according claim 17.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0039] FIG. 1 shows a cross-sectional SEM image and a cross-sectional EDS element mapping diagram of a solder joint.

[0040] FIG. 1A shows an SEM image of Comparative Example 2.

[0041] FIG. 1B shows a cross-sectional EDS element mapping diagram of Comparative Example 2.

[0042] FIG. 1C shows an SEM image of Example 6 of the present invention.

[0043] FIG. 1D shows a cross-sectional EDS element mapping diagram of Example 6 of the present invention.

[0044] FIG. 2 shows an optical micrograph and an X-ray plane image of the chip after soldering.

[0045] FIG. 2A shows an optical micrograph of Example 6 of the present invention.

[0046] FIG. 2B shows an X-ray plan image of Example 6 of the present invention.

[0047] FIG. 2C shows an optical micrograph of Example 10 of the present invention.

[0048] FIG. 2D shows an X-ray plan image of Example 10 of the present invention.

[0049] FIG. 2E shows an optical micrograph of Comparative Example 7.

[0050] FIG. 2F shows an X-ray plan image of Comparative Example 7.

[0051] FIG. 3 is a graph showing the shear strengths of Examples 1, 5, 6, and 10 of the present invention and Comparative Examples 1 to 8.

DETAILED DESCRIPTION

[0052] The present invention is described in more detail below. In the present description, “%” relating to the solder alloy composition refers to “mass %” unless otherwise specified.

[0053] 1. Solder Alloy

[0054] (1) Sb: 9.0 to 33.0%

[0055] Sb can improve the joint strength at high temperatures by precipitating the SnSb compound and crosslinking the semiconductor chip and the substrate. Furthermore, if the Sb content is within the above range, the amount of precipitated Sn phase can be controlled, and a high chip cracking resistance is maintained. In addition, Sb can improve the heat dissipation characteristics of the solder joint by optimizing the viscosity of the molten solder and suppressing the generation of voids.

[0056] If the Sb content is less than 9.0%, the amount of precipitated SnSb compound is small and the joint strength at a high temperature cannot be improved. Furthermore, because the amount of remaining Sn is relatively large, the elution of the back metal on the semiconductor chip side is accelerated and the back metal disappears, which may cause the semiconductor chip to peel off. In terms of the lower limit, the Sb content is 9.0% or more, preferably 15.0% or more, more preferably 19.5% or more, and even more preferably 20.0% or more.

[0057] On the other hand, if the Sb content exceeds 33.0%, a large amount of the SnSb compound is precipitated; thus, the Sn phase is not sufficiently precipitated, and the stress relaxing effect is lowered, which may cause chip cracking. In terms of the upper limit, the Sb content is 33.0% or less, preferably 30.0% or less, more preferably 27.5% or less, and even more preferably 27.0% or less.

[0058] (2) Ag: More than 4.0% and Less than 11.0%

[0059] Ag can improve the joint strength at high temperatures by precipitating the Ag.sub.3Sn compound and crosslinking the semiconductor chip and substrate. Furthermore, if the content of Ag is within the above range, the amount of precipitated Sn phase can be controlled, and a high chip cracking resistance is maintained.

[0060] If the Ag content is 4.0% or less, the amount of the precipitated Ag.sub.3Sn compound is small and the joint strength at a high temperature cannot be improved. Furthermore, because the amount of remaining Sn is relatively large, the elution of the back metal on the semiconductor chip side is accelerated and the back metal disappears, which may cause the semiconductor chip to peel off. In terms of the lower limit, the Ag content is more than 4.0%, preferably 4.1% or more, and more preferably 7.0% or more.

[0061] On the other hand, if the Ag content is 11.0% or more, a large amount of the Ag.sub.3Sn compound is precipitated, preventing the Sn phase from precipitating, and the stress relaxing effect is lowered, which may cause chip cracking. In terms of the upper limit, the Ag content is less than 11.0%, preferably 10.9% or less, and more preferably 10.0% or less.

[0062] (3) Cu: More than 2.0% and Less than 6.0%

[0063] Cu can improve the joint strength at high temperatures by precipitating the Cu.sub.6Sn.sub.5 and Cu.sub.3Sn compounds and crosslinking the semiconductor chip and the substrate. Furthermore, if the Cu content is within the above range, the amount of precipitated Sn phase can be controlled, and a high chip cracking resistance is maintained. In addition, Cu can suppress the diffusion of Cu on the lead frame side.

[0064] If the Cu content is 2.0% or less, the Cu.sub.6Sn.sub.5 and Cu.sub.3Sn compounds are not sufficiently precipitated, and the joint strength at a high temperature cannot be improved. Furthermore, because the amount of remaining Sn is relatively large, the elution of the back metal on the semiconductor chip side is accelerated and the back metal disappears, which may cause the semiconductor chip to peel off. In terms of the lower limit, the Cu content is more than 2.0%, preferably 2.1% or more, and more preferably 3.0% or more.

[0065] On the other hand, when the Cu content is 6.0% or more, a large amount of the Cu.sub.6Sn.sub.5 and Cu.sub.3Sn compounds are precipitated, which promotes Sn consumption and reduces the stress relaxing effect during solidification shrinkage after reflow, which may cause chip cracking. Furthermore, when a large amount of Sn is consumed to form the above-mentioned compounds, the melting point of the solder alloy does not decrease, and the molten solder does not completely melt during reflow. Thus, the viscosity of the molten solder is not expected to decrease, making it difficult to discharge voids. In terms of the upper limit, the Cu content is less than 6.0%, preferably 5.9% or less, and more preferably 4.0% or less.

[0066] (4) At Least One of Al: 0.003 to 0.1%, Fe: 0.01 to 0.2%, and Ti: 0.005 to 0.4%.

[0067] These elements are optional elements that can improve the joint strength at high temperatures by suppressing the coarsening of the SnSb, Cu.sub.6Sn.sub.5, Cu.sub.3Sn, and Ag.sub.3Sn compounds (hereinafter, appropriately referred to as “Sn compounds”).

[0068] These elements are preferentially precipitated during solidification to become seeds for non-uniform nucleation, preventing the coarsening of each phase. When the nucleation of each phase is promoted by non-uniform nucleation, the starting point of nucleation increases; thus, the area of the crystal grain boundaries in the solder alloy increases and the stress applied to the grain boundaries is dispersed. Therefore, the coarsening of the Sn compounds can be suppressed.

[0069] Furthermore, the contents of Al, Ti, and Fe are 0.003 to 0.7% to account for the minimum content of Al and the maximum content of all three types, which is a very small amount. Therefore, even if a compound having a melting point higher than that of the Sn compounds is precipitated as a metal compound containing Al, Ti, Fe and Sb, Ag, Cu, the amount of precipitate is small, and the consumption of Sb, Ag, and Cu in the solder alloy is small. Therefore, because a sufficient amount of precipitated Sn compound to crosslink the semiconductor chip and the substrate is secured, a high joint strength at a high temperature is maintained. In addition, the content of these elements is at most 0.7%, which does not affect the void suppression effect of the present invention and can exhibit high heat dissipation characteristics.

[0070] The Al content is preferably 0.003 to 0.1%, more preferably 0.01 to 0.08%, and even more preferably 0.02 to 0.05% in order to fully exhibit the above-mentioned effects. The Fe content is preferably 0.01 to 0.2%, more preferably 0.02 to 0.15%, and even more preferably 0.02 to 0.1%. The Ti content is preferably 0.005 to 0.4%, more preferably 0.01 to 0.3%, and even more preferably 0.02 to 0.2%.

[0071] (5) At Least One of P, Ge and Ga in a Total Amount of 0.002 to 0.1%

[0072] These are optional elements that reduce the surface tension of the molten solder to suppress oxidation, which is effective in discharging voids. The total content of these elements is preferably 0.002 to 0.1%, more preferably 0.003 to 0.01%. The content of each element is not particularly limited, but P content is preferably 0.002 to 0.005%, Ge content is preferably 0.002 to 0.006%, and Ga content is preferably 0.002 to 0.02% in order to fully exhibit the above-mentioned effects.

[0073] (6) Total of at Least One of Ni, Co, and Mn: 0.01 to 0.5%

[0074] These elements are optional elements that can make the structure of the solder alloy finer and improve the joint strength at high temperatures. The total content of these elements is preferably 0.01 to 0.5%, more preferably 0.01 to 0.05%. The content of each element is not particularly limited, but Ni content is preferably 0.02 to 0.07%, Co content is preferably 0.02 to 0.04%, and Mn content is preferably 0.02 to 0.05% in order to fully exhibit the above-mentioned effects.

[0075] (7) At Least One of Au, Ce, In, Mo, Nb, Pd, Pt, V, Ca, Mg, Si, Zn, Bi, and Zr in a Total Amount of 0.0005 to 1%

[0076] These elements are optional elements that may be contained within a range that does not impair the effects of the present invention. The total content of Au, Ce, In, Mo, Nb, Pd, Pt, V, Ca, Mg, Si, Zn, Bi, and Zr is preferably 0.0005 to 1%, more preferably 0.02 to 0.03%.

[0077] If Au is contained, its content is preferably 0.0005 to 0.02%. If Ce is contained, its content is preferably 0.0005 to 0.049%. If In is contained, its content is preferably 0.0005 to 0.9%. If Mo is contained, its content is preferably 0.0005 to 0.0025%. If Nb is contained, its content is preferably 0.0005 to 0.003%. If Pd is contained, its content is preferably 0.0005 to 0.03%. If Pt is contained, its content is preferably 0.0005 to 0.012%. If V is contained, its content is preferably 0.0005 to 0.012%. If Ca is contained, its content is preferably 0.0005 to 0.1%. If Mg is contained, its content is preferably 0.0005 to 0.0045%. If Si is contained, its content is preferably 0.0005 to 0.1%. If Zn is contained, its content is preferably 0.01 to 0.2%. If Bi is contained, its content is preferably 0.02 to 0.3%. If Zr is contained, its content is 0.0005 to 0.0008%.

[0078] (8) Alloy Structure

[0079] The solder alloy according to the present invention preferably has an alloy structure consisting of the Ag.sub.3Sn, Cu.sub.3Sn, Cu.sub.6Sn.sub.5, and SnSb compounds, with the balance consisting of the Sn phase.

[0080] The solder alloy according to the present invention crosslinks the semiconductor chip and the substrate through the compounds of Sn with Sb, Ag, and Cu, by containing a predetermined amount of Sb, Ag, and Cu. In other words, the solder joint formed of the solder alloy according to the present invention joins the semiconductor chip and the substrate via the above-mentioned Sn compounds, which have high melting points. Therefore, even if the semiconductor chip generates heat and the temperature of the solder alloy increases, the joint strength at high temperatures can be maintained, and the solder alloy can be used as a high-temperature solder.

[0081] Furthermore, the solder alloy according to the present invention can precipitate an appropriate amount of Sn phase by containing a predetermined amount of Sb, Ag, and Cu. When an appropriate amount of Sn phase is precipitated in the Sn compound, the Sn phase, which is softer than the Sn compounds, exhibits a stress relaxing action, and the stress applied to the semiconductor chip during cooling can be relaxed. Furthermore, as the melting point of the solder alloy is lowered, the molten solder is completely melted during reflow, and voids are discharged from the molten solder to improve the heat dissipation characteristics.

[0082] To exert such an effect, the solder alloy according to the present invention, preferably has an alloy structure consisting of the SnSb compound formed by precipitation of Sn with Sb, the Ag.sub.3Sn compound formed by precipitation of Sn with Ag, the Cu.sub.6Sn.sub.5 compound and the Cu.sub.3Sn compound, each formed by precipitation of Sn with Cu, with the balance consisting of the Sn phase. These compounds have a high melting point and crosslink the semiconductor chip and substrate. Therefore, even when the balance consists of the Sn phase, it functions sufficiently as a high temperature solder. To obtain such an alloy structure, it is preferable to have the above-mentioned alloy composition.

[0083] From this point of view, the amount of the precipitated Ag.sub.3Sn compound is preferably 5.8 to 15.4 at. %, the amount of the precipitated Cu.sub.6Sn.sub.5 compound is preferably 5.6 to 15.3 at. %, the amount of the precipitated Cu.sub.3Sn compound is preferably 1.0 to 2.8 at. %, the amount of the precipitated SnSb compound is preferably 16.8 to 62.1 at. %, and the amount of the precipitated Sn phase is preferably 5.6 to 70.2 at. %.

[0084] In the solder alloy according to the present invention, in terms of the lower limit, the amount of the precipitated Ag.sub.3Sn compound is more preferably 5.9 at. % or more, even more preferably 13.9 at. % or more. In terms of the upper limit, the amount of the precipitated Ag.sub.3Sn compound is more preferably 15.2 at. % or less, even more preferably 14.3 at. % or less, particularly preferably 14.2 at. % or less, most preferably 14.1 at. % or less.

[0085] In the solder alloy according to the present invention, in terms of the lower limit, the amount of the precipitated Cu.sub.6Sn.sub.5 compound is more preferably 8.0 at. % or more, even more preferably 10.5 at. % or more. In terms of the upper limit, the amount of the precipitated Cu.sub.6Sn.sub.5 compound is more preferably 12.5 at. % or less, even more preferably 10.6 at. % or less.

[0086] In the solder alloy according to the present invention, in terms of the lower limit, the amount of the precipitated Cu.sub.3Sn compound is more preferably 1.5 at. % or more. In terms of the upper limit, the amount of the precipitated Cu.sub.3Sn compound is more preferably 2.4 at. % or less, even more preferably 1.9 at. % or less.

[0087] In the solder alloy according to the present invention, in terms of the lower limit, the amount of the precipitated SnSb compound is more preferably 17.2 at. % or more, even more preferably 37.5 at. % or more. In terms of the upper limit, the amount of the precipitated SnSb compound is more preferably 61.1 at. % or less, even more preferably 50.7 at. % or less.

[0088] In the solder alloy according to the present invention, in terms of the lower limit, the Sn phase content is more preferably 11.3% or more, even more preferably 22.7% or more. In terms of the upper limit, the Sn phase content is more preferably 56.7 at. % or less, even more preferably 38.2 at. % or less, particularly preferably 35.9% or less.

[0089] The alloy structure in the present invention may contain a compound different from the above four types to the extent that the effect of the solder alloy according to the present invention is not affected.

[0090] (9) Equations (1) to (3)

[0091] The alloy composition of the solder alloy according to the present invention preferably satisfies the following equations (1) to (3).

[00002]$\begin{array}{cc}1.2<\mathrm{Sn}\text{/}\left\{\left(\frac{26.84}{73.16}\right)\times \mathrm{Ag}+\left(\frac{60.89}{39.11}\right)\times \mathrm{Cu}\times x+\left(\frac{38.37}{61.63}\right)\times \mathrm{Cu}\times \left(1-x\right)+\left(\frac{49.37}{50.63}\right)\times \mathrm{Sb}\right\}\le 6.50& \mathrm{equation}\left(1\right)\\ \left(2/3\right)\le x\le \left(15.3/16\mathrm{.3}\right)& \mathrm{equation}\left(2\right)\\ 78\le \mathrm{Ag}\times \mathrm{Cu}\times \mathrm{Sb}\le 2029& \mathrm{equation}\left(3\right)\end{array}$

[0092] wherein Ag, Cu, and Sb each in the above equations (1) and (3) represents the content (mass %) in the alloy composition.

[0093] Equation (1) is a preferable aspect as a condition under which the Sn phase is precipitated after the Sn compounds described above are precipitated. Each of the coefficients in the middle side of equation (1) is obtained in order to keep the Sn remaining. First, the coefficient of Ag is described in detail.

[0094] Because the unit cell of the Ag.sub.3Sn compound is composed of 3 Ag and 1 Sn, the elemental ratio of the Ag.sub.3Sn compound is Ag.sub.at:Sn.sub.at=3:1. Because the atomic weight of Ag is 107.8682 and the atomic weight of Sn is 118.71, the mass ratio of the Ag.sub.3Sn compound is Ag.sub.mass:Sn.sub.mass=107.8682×3:118.71≈73.16:26.84. Therefore, the Sn amount required to precipitate the Ag.sub.3Sn compound is “(26.84/73.16)×Ag” when represented by the Ag content.

[0095] Next, the coefficient of Cu is described in detail. Because Cu precipitates the Cu.sub.6Sn.sub.5 and Cu.sub.3Sn compounds, it is necessary to determine the Sn content in order to precipitate each of them. Here, the amount of precipitated Cu.sub.6Sn.sub.5 and Cu.sub.3Sn compounds varies depending on the heating conditions during reflow, but it is considered that the amount of precipitated Cu.sub.6Sn.sub.5 compound is larger than that of the Cu.sub.3Sn compound in a general reflow step. The ratio of the amount of the precipitated compounds is approximately Cu.sub.6Sn.sub.5:Cu.sub.3Sn=8:2, but it is easily assumed that this ratio varies. Therefore, as a preferred aspect of the present invention, to determine the range wherein the effect of the present invention is fully exerted, the coefficient of the Cu.sub.6Sn.sub.5 compound is multiplied by “x” in equation (2), and the coefficient of the Cu.sub.3Sn compound is multiplied by “1−x”, in equation (1).

[0096] Namely, in equation (1), because the amount of the precipitated Cu-derived compound is taken into consideration in equation (2) in addition to the Sn content, the semiconductor chip and the substrate are crosslinked by the Ag.sub.3Sn, Cu.sub.6Sn.sub.5, Cu.sub.3Sn, and SnSb compounds, and the Sn phase is appropriately precipitated. Therefore, a high joint strength at high temperatures can be obtained, and damage to the semiconductor chip can be suppressed. In addition, by precisely controlling the alloy composition so that the Sn phase is appropriately precipitated, the melting point is slightly lowered, and voids can be suppressed.

[0097] Because the unit cell of the Cu.sub.6Sn.sub.5 compound is composed of 6 Cu and 5 Sn, the elemental ratio of the Cu.sub.6Sn.sub.5 compound is Cu.sub.at.:Sn.sub.at.=6:5. Because the atomic weight of Cu is 63.546 and the atomic weight of Sn is 118.71, the mass ratio of the Cu.sub.6Sn.sub.5 compound is Cu.sub.mass:Sn.sub.mass=63.546×6:118.71×5≈39.11:60.89. Therefore, the Sn amount required to precipitate the Cu.sub.6Sn.sub.5 compound is “(60.89/39.11)×Cu” when represented by the Cu content.

[0098] Because the unit cell of the Cu.sub.3Sn compound is composed of 3 Cu and 1 Sn, the elemental ratio of the Cu3Sn compound is Cu.sub.at.:Sn.sub.at.=3:1. Because the atomic weight of Cu is 63.546 and the atomic weight of Sn is 118.71, the mass ratio of the Cu.sub.3Sn compound is Cu.sub.mass:Sn.sub.mass=63.546×3:118.71≈61.63:38.37. Therefore, the Sn amount required to precipitate the Cu.sub.3Sn compound is “(38.37/61.63)×Cu” when represented by the Cu content.

[0099] Similarly, because the unit cell of the SnSb compound is composed of 1 Sb and 1 Sn, the elemental ratio of the SnSb compound is Sb.sub.at.:Sn.sub.at.=1:1. Because the atomic weight of Sb is 121.76 and the atomic weight of Sn is 118.71, the mass ratio of the SnSb compound is Sb.sub.mass:Su.sub.mass=121.76:118.71≈50.63:49.37. Therefore, the Sn amount required to precipitate the SnSb compound is “(49.37/50.63)×Sb” when represented by the Sb content.

[0100] From the above, in a preferred aspect of the present invention, it was considered that the Sn phase would precipitate if the value obtained by dividing the Sn content by the total amount of these was 1.2 or more. In terms of the lower limit, the value of equation (1) is preferably 1.2 or more, more preferably 1.28 or more, even more preferably 1.29 or more, particularly preferably 1.66 or more, and most preferably 1.68 or more.

[0101] On the other hand, it is desirable that the semiconductor chip and the substrate are crosslinked with a series of Sn compounds by controlling the amount of the precipitated Sn phase to an appropriate amount, which likely to result in a higher joint strength at higher temperatures. From this point of view, in terms of the upper limit, the value of equation (1) is preferably 6.50 or less, more preferably 4.42 or less, further 4.25 or less, even more preferably 4.17 or less, and particularly preferably 2.38 or less, and most preferably 2.34 or less.

[0102] In the present invention, x in equation (2) can be obtained as follows. First, the cross section of the solder alloy is observed to determine the area ratio of Cu.sub.6Sn.sub.5 and Cu.sub.3Sn. Assuming that the same area ratio can be obtained even if any cross section is observed, the obtained area ratio is regarded as the volume fraction. The mass ratio is calculated by multiplying the obtained volume fraction by the density of each compound, and the atomic ratio of each compound is converted from the mass ratio. The values of x and 1−x can be obtained from the ratio of the atomic ratios of each compound. When the ratio of the amount of precipitation is Cu.sub.6Sn.sub.5:Cu.sub.3Sn=8(at. %):2(at. %), x=8/(8+2)=0.8, and 1−x=0.2.

[0103] Then, based on the calculated result of equation (2), the middle side of equation (1) can be obtained.

[0104] Furthermore, it is preferable that the solder alloy according to the present invention contains Sb, Ag, and Cu, which easily precipitate Sn compounds, and that the Sn compounds and Sn phase as described above are precipitated. Therefore, in the alloy composition of the solder alloy according to the present invention, the contents of Sb, Ag, and Cu are within the above ranges, and equation (3) is preferably satisfied in addition to equations (1) and (2).

[0105] Equation (3) is the product of the Sb, Ag, and Cu contents. When these elements are added to a solder alloy in a well-balanced manner so as to satisfy equation (3), the amount of the precipitated specific Sn compound does not increase, and the coarsening of the specific Sn compound can be suppressed. Therefore, it is presumed that the joint strength at high temperatures can be improved. In terms of the lower limit, the value of equation (3) is preferably 78 or more, more preferably 360.0 or more, even more preferably 377.0 or more, particularly preferably 483.0 or more, and most preferably 800.0 or more. In terms of the upper limit, the value of equation (3) is preferably 2029 or less, more preferably 1357 or less, even more preferably 1320 or less, and particularly preferably 1080 or less.

[0106] (9) Balance: Sn

[0107] The balance of the solder alloy according to the present invention is Sn. In addition to the above-described elements, unavoidable impurities may be contained. Even if it contains unavoidable impurities, it does not affect the above-mentioned effects.

[0108] 2. Solder Paste

[0109] The solder alloy according to the present invention can be used as a solder paste. The solder paste is obtained by mixing a solder alloy powder with a small amount of flux to form a paste. The solder alloy in the present invention may be utilized as a solder paste for mounting an electronic component on a printed circuit board using a reflow soldering method. The flux used for the solder paste may be either a water-soluble flux or a water-insoluble flux.

[0110] Furthermore, the flux used for the solder paste of the present invention is not particularly limited as long as it can be soldered by a common method. Therefore, a commonly used rosin, organic acid, activator, and solvent may be appropriately mixed and used. In the present invention, the blending ratio of the metal powder component and the flux component is not particularly limited, but the content of the solder alloy powder is preferably 5 to 15% based on the total mass of the solder paste.

[0111] 3. Preform

[0112] The solder alloy according to the present invention can be used as a preform. Examples of the shape of the preform material include washers, rings, pellets, discs, ribbons, wires, balls and the like.

[0113] The preform solder may be used in reduced atmosphere joining without using flux. Because the reduced atmosphere joining does not contaminate the joined portion with flux, not only the cleaning of the joined portion in the post-joining process becomes unnecessary, but also the void of the solder joint can be reduced.

[0114] 4. Solder Joint

[0115] The solder joint according to the present invention joins and connects a semiconductor chip in a semiconductor package with a ceramic substrate, printed circuit board, metal substrate, or the like. That is, the solder joint according to the present invention refers to the connection portion of the electrodes and can be formed by using general soldering conditions.

[0116] 5. Other

[0117] Furthermore, the method for producing the solder alloy according to the present invention may be carried out according to a common method. The joining method using the solder alloy according to the present invention may be carried out according to a common method using, for example, a reflow furnace. When flow soldering is performed, the melting temperature of the solder alloy may be approximately 20° C. higher than the liquidus temperature. Furthermore, in the case of joining using the solder alloy according to the present invention, the precipitation of the Sn phase can be controlled by considering the cooling rate during solidification. For example, the solder joint is cooled at a cooling rate of 2 to 3° C./s or more. The other joining conditions may be appropriately adjusted in accordance with the alloy composition of the solder alloy.

[0118] The solder alloy according to the present invention can produce a low-α-ray alloy using a low α-ray material as its raw material. When such a low α-ray alloy is used to form solder bumps around a memory, soft errors can be suppressed.

Examples

[0119] A solder alloy comprising the alloy composition shown in Table 1 was prepared to produce a test substrate. The presence or absence of chip cracking after reflow was observed, the area ratio of voids was determined, and the shear strength at a high temperature was evaluated as the joint strength. Furthermore, for each alloy composition, the amount of precipitation of each compound was determined from the area ratio of each compound.

[0120] Evaluation of the Presence or Absence of Chip Cracking

[0121] The solder alloys listed in Table 1 were atomized to obtain the solder powder. A solder paste of each solder alloy was prepared by mixing with a soldering flux (manufactured by SENJU METAL INDUSTRY CO., LTD.: D128) composed of pine resin, solvent, activator, thixotropic agent, organic acid and the like. The content of the solder alloy powder in this solder paste was 90% based on the total mass of the solder paste. The solder paste was printed on a Cu substrate having a thickness of 3.0 mm with a metal mask having a thickness of 100 μm, followed by mounting 15 silicon chips with a mounter, and preparing a test substrate through reflow soldering under the conditions of a maximum temperature of 350° C. and a holding time of 60 seconds.

[0122] The 15 chips mounted on the test substrate were observed using an optical microscope at a magnification of 30 times, and it was visually confirmed whether the chips were cracked. The case where no crack was confirmed was regarded as “No,” and the case where even one crack was confirmed was regarded as “Yes.”

[0123] Void Area Ratio

[0124] As to the test substrate produced in “Evaluation of the presence or absence of chip cracking”, the X-ray plane image with 30-fold magnification was displayed on a monitor using a TOSMICRON-6090FP manufactured by Toshiba FA System Engineering Co., Ltd., and voids were detected from the displayed image and the area ratio was calculated from the detected voids. The image analysis software used for the detection was Scandium, manufactured by Soft imaging system. Because the contrast between the voids and the other parts on the image is different, they can be identified using image analysis, and the measurement was performed by detecting only the voids. When the measured void area was less than 4.8% of the silicon chip area, the void was rated as “S”, when it was 4.8% or more and 5% or less, the void was rated as “A”, and when it exceeded 5%, the void was rated as

[0125] Shear Strength at High Temperatures

[0126] The shear strength of the solder joint was measured on 3 test substrates arbitrarily extracted from the test substrate prepared in “Evaluation of the presence or absence of chip cracking” at high temperatures (260° C.) using the joint strength tester STR-1000 manufactured by Resca, and the measured shear strength was regarded as the joint strength. The test conditions for the shear strength were a shear speed of 24 mm/min and a test height of 100 μm. Then, the shear strength was measured for each silicon chip, and the average was calculated. Those having an average value of 30 N or more were rated as “S,” those having an average value of 20 N or more and less than 30 N were rated as “A,” and those having an average value of less than 20 N were rated as “C.”

[0127] Amounts of Precipitated Compounds

[0128] The solder alloy having the alloy composition shown in Table 1 was prepared, the prepared solder alloy was mirror-polished, and a cross-sectional image at 1000-fold magnification was taken using SEM. EDS analysis was carried out on this image, and the area of the compound was measured using image analysis software (Scandium) manufactured by Seika Sangyo Co., Ltd. The area ratio (%) of each compound was calculated by dividing the area of each compound by the area of the joint obtained from the SEM image. Assuming that the obtained area ratio was the volume fraction, the mass ratio was calculated by multiplying the volume fraction and the density of each compound and converted into an atomic ratio to obtain the amount (at. %) of precipitation of each compound.

[0129] Furthermore, in equation (1), regarding the ratio of the amount of precipitated Cu.sub.6Sn.sub.5 and Cu.sub.3Sn, the ratio of the amount of the precipitation was obtained from the atomic ratio of both compounds, and “x” and “1−x” in the middle side of equation (2) were obtained. This result was applied to equation (1) to calculate the value of the middle side of equation (1) for each alloy composition.

[0130] The results are shown in Tables 1 and 2.

TABLE-US-00001 TABLE 1 Cu.sub.6Sn.sub.5 Cu.sub.3Sn Cu.sub.6Sn.sub.5 Cu.sub.3Sn Volume × Volume × Cu.sub.6Sn.sub.5 Cu.sub.3Sn Volume × Volume × Density = Density = Alloy composition (mass %, balance: Sn) Area Area Density = Density = Mass Mass Sn Sb Ag Cu others (=Volume) (=Volume) Mass Mass (wt %) (wt %) Ex. 1 bal. 9 4.1 2.1 763 98 6180.3 828.1 88.18 11.82 Ex. 2 bal. 23 4.1 4 1523 212 12336.3 1791.4 87.32 12.68 Ex. 3 bal. 23 10 2.1 691 102 5597.1 861.9 86.66 13.34 Ex. 4 bal. 9 10 4 1690 89 13689 752.05 94.79 5.21 Ex. 5 bal. 20 10 4 1516 221 12279.6 1867.45 86.80 13.20 Ex. 6 bal. 27 10 4 1453 190 11769.3 1605.5 88.00 12.00 Ex. 7 bal. 23 10.9 4 1489 117 12060.9 988.65 92.42 7.58 Ex. 8 bal. 23 10 5.9 1756 255 14223.6 2154.75 86.84 13.16 Ex. 9 bal. 33 10 4 1567 198 12692.7 1673.1 88.35 11.65 Ex. 10 bal. 33 10.9 5.9 1821 234 14750.1 1977.3 88.18 11.82 Ex. 11 bal. 20 10 4 Al:0.03 1467 92 11882.7 777.4 93.86 6.14 Ex. 12 bal. 20 10 4 Fe:0.046 1522 103 12328.2 870.35 93.41 6.59 Ex. 13 bal. 20 10 4 Ti:0.04 1577 96 12773.7 811.2 94.03 5.97 Ex. 14 bal. 20 10 4 P:0.003 1465 127 11866.5 1073.15 91.71 8.29 Ex. 15 bal. 20 10 4 Ge:0.005 1392 165 11275.2 1394.25 89.00 11.00 Ex. 16 bal. 20 10 4 Ga:0.005 1428 179 11566.8 1512.55 88.44 11.56 Ex. 17 bal. 20 10 4 Ni:0.03 1378 89 11161.8 752.05 93.69 6.31 Ex. 18 bal. 20 10 4 Co:0.04 1476 101 11955.6 853.45 93.34 6.66 Ex. 19 bal. 20 10 4 Mn:0.02 1542 134 12490.2 1132.3 91.69 8.31 Ex. 20 bal. 20 10 4 Au:0.02 1590 157 12879 1326.65 90.66 9.34 Ex. 21 bal. 20 10 4 Ce:0.049 1554 161 12587.4 1360.45 90.25 9.75 Ex. 22 bal. 20 10 4 In:0.9 1442 125 11680.2 1056.25 91.71 8.29 Ex. 23 bal. 20 10 4 Mo:0.0025 1560 148 12636 1250.6 90.99 9.01 Ex. 24 bal. 20 10 4 Nb:0.003 1572 166 12733.2 1402.7 90.08 9.92 Ex. 25 bal. 20 10 4 Pd:0.015 1598 186 12943.8 1571.7 89.17 10.83 Ex. 26 bal. 20 10 4 Pt:0.0096 1538 178 12457.8 1504.1 89.23 10.77 Ex. 27 bal. 20 10 4 V:0.005 1582 192 12814.2 1622.4 88.76 11.24 Ex. 28 bal. 20 10 4 Ca:0.1 1566 170 12684.6 1436.5 89.83 10.17 Ex. 29 bal. 20 10 4 Mg:0.0045 1589 199 12870.9 1681.55 88.44 11.56 Table 1 continued Cu.sub.6Sn.sub.5 Cu.sub.3Sn Middle Middle Middle Shear Atomic Atomic side of side of side of Void Strength Weight Weight Equation Equation Equation Chip Area at High (at. %) (at. %) (2) x 1 − x (1) (3) Cracking Ratio Temperature Ex. 1 70.31 29.69 0.7031 0.2969 6.54 77 No S A Ex. 2 68.61 31.39 0.6861 0.3139 2.38 377 No S S Ex. 3 67.33 32.67 0.6733 0.3267 2.26 483 No S S Ex. 4 85.24 14.76 0.8524 0.1476 4.25 360 No S S Ex. 5 67.60 32.40 0.6760 0.3240 2.34 800 No S S Ex. 6 69.94 30.06 0.6994 0.3006 1.68 1080 No S S Ex. 7 79.47 20.53 0.7947 0.2053 1.95 1003 No S S Ex. 8 67.69 32.31 0.6769 0.3231 1.82 1357 No S S Ex. 9 70.65 29.35 0.7065 0.2935 1.29 1320 No S S Ex. 10 70.30 29.70 0.7030 0.2970 1.15 2122 No A S Ex. 11 82.91 17.09 0.8291 0.1709 2.29 800 No S S Ex. 12 81.80 18.20 0.8180 0.1820 2.30 800 No S S Ex. 13 83.33 16.67 0.8333 0.1667 2.29 800 No S S Ex. 14 77.82 22.18 0.7782 0.2218 2.31 800 No S S Ex. 15 71.96 28.04 0.7196 0.2804 2.33 800 No S S Ex. 16 70.82 29.18 0.7082 0.2918 2.33 800 No S S Ex. 17 82.49 17.51 0.8249 0.1751 2.30 800 No S S Ex. 18 81.64 18.36 0.8164 0.1836 2.30 800 No S S Ex. 19 77.78 22.22 0.7778 0.2222 2.31 800 No S S Ex. 20 75.49 24.51 0.7549 0.2451 2.32 800 No S S Ex. 21 74.59 25.41 0.7459 0.2541 2.32 800 No S S Ex. 22 77.82 22.18 0.7782 0.2218 2.31 800 No S S Ex. 23 76.23 23.77 0.7623 0.2377 2.31 800 No S S Ex. 24 74.23 25.77 0.7423 0.2577 2.32 800 No S S Ex. 25 72.33 27.67 0.7233 0.2767 2.33 800 No S S Ex. 26 72.44 27.56 0.7244 0.2756 2.33 800 No S S Ex. 27 71.48 28.52 0.7148 0.2852 2.33 800 No S S Ex. 28 73.70 26.30 0.7370 0.2630 2.32 800 No S S Ex. 29 70.84 29.16 0.7084 0.2916 2.33 800 No S S

TABLE-US-00002 TABLE 2 Cu.sub.6Sn5 Cu.sub.3Sn Cu.sub.6Sn.sub.5 Cu.sub.3Sn Volume × Volume × Cu.sub.6Sn.sub.5 Cu.sub.3Sn Volume × Volume × Density = Density = Alloy composition (mass %, balance: Sn) Area Area Density = Density = Mass Mass Sn Sb Ag Cu Others (=Volume) (=Volume) Mass Mass (wt %) (wt %) Ex. 30 bal. 20 10 4 Si:0.0008 1521 162 12320.1 1368.9 90.00 10.00 Ex. 31 bal. 20 10 4 Zn:0.2 1545 158 12514.5 1335.1 90.36 9.64 Ex. 32 bal. 20 10 4 Bi:0.3 1488 143 12052.8 1208.35 90.89 9.11 Ex. 33 bal. 20 10 4 Zr:0.0008 1571 168 12725.1 1419.6 89.96 10.04 Ex. 34 bal. 20 10 4 Al:0.03, 1360 92 11016 777.4 93.41 6.59 Fe:0.046, Ti:0.04, P:0.003, Ge:0.005, Ga:0.005, Ni:0.03, Co:0.04, Mn:0.02, Au:0.02, Ce:0.049, In:0.9, Mo:0.0025, Nb:0.003, Pd:0.015, Pt:0.0096, V:0.005, Ca:0.1, Mg:0.0045, Si:0.0008, Zn:0.2 Bi:0.3, Zr:0.0008 Comp. Ex. 1 bal. 8 3 1 284 23 2300.4 194.35 92.21 7.79 Comp. Ex. 2 bal. 8 10 4 1533 139 12417.3 1174.55 91.36 8.64 Comp. Ex. 3 bal. 35 10 4 1323 88 10716.3 743.6 93.51 6.49 Comp. Ex. 4 bal. 20 3 4 1580 157 12798 1326.65 90.61 9.39 Comp. Ex. 5 bal. 20 12 4 1522 132 12328.2 1115.4 91.70 8.30 Comp. Ex. 6 bal. 20 10 1 303 18 2454.3 152.1 94.16 5.84 Comp. Ex. 7 bal. 20 10 7 1926 298 15600.6 2518.1 86.10 13.90 Comp. Ex. 8 bal. 35 12 7 1806 242 14628.6 2044.9 87.74 12.26 Table 2 continued Cu.sub.6Sn.sub.5 Cu.sub.3Sn Middle Middle Middle Shear Atomic Atomic side of side of side of Void Strength Weight Weight Equation (2) Equation Equation Chip Area at High (at. %) (at. %) x 1 − x (1) (3) Cracking Ratio Temperature Ex. 30 74.07 25.93 0.7407 0.2593 2.32 800 No S S Ex. 31 74.84 25.16 0.7484 0.2516 2.32 800 No S S Ex. 32 75.99 24.01 0.7599 0.2401 2.32 800 No S S Ex. 33 73.99 26.01 0.7399 0.2601 2.32 800 No S S Ex. 34 81.81 18.19 0.8181 0.1819 2.30 800 No S S Comp. Ex. 1 78.98 21.02 0.7898 0.2102 8.58 24 No S C Comp. Ex. 2 77.04 22.96 0.7704 0.2296 4.63 320 No S C Comp. Ex. 3 82.06 17.94 0.8206 0.1794 1.18 1400 Yes C — Comp. Ex. 4 75.38 24.62 0.7538 0.2462 2.82 240 No S C Comp. Ex. 5 77.82 22.18 0.7782 0.2218 2.18 960 Yes A — Comp. Ex. 6 83.66 16.34 0.8366 0.1634 2.81 200 No S C Comp. Ex. 7 66.29 33.71 0.6629 0.3371 1.98 1400 Yes C — Comp. Ex. 8 69.42 30.58 0.6942 0.3058 0.97 2940 Yes C — * The underlined number indicates that it is outside the range of the present invention.

[0131] As is clear from Tables 1 and 2, it was found in each of Examples of the present invention, that chip cracking did not occur, the area ratio of voids was low, the heat dissipation characteristics were excellent, and the shear strength at high temperatures was high. It was also confirmed that, except for Examples 1 and 10 of the present invention, all of Ag.sub.3Sn, Cu.sub.6Sn.sub.5, Cu.sub.3Sn, and SnSb, and Sn phases were present, and the amount of each precipitated was within the above-mentioned preferable range. Therefore, because Examples 2 to 9 and Examples 11 to 34 of the present invention all satisfy equations (1) to (3), it was found that an appropriate precipitation of the Sn phase further exerts the above effect.

[0132] Meanwhile, in Comparative Example 1, because the Sb, Ag, and Cu contents were all small, the shear strength at high temperatures was inferior. In Comparative Example 2, because the Sb content was low, the shear strength at high temperatures was inferior. In Comparative Example 3, because the Sb content was high, chip cracking occurred. Therefore, it was not possible to measure the shear strength at high temperatures.

[0133] In Comparative Example 4, because the Ag content was low, the shear strength at high temperatures was inferior. In Comparative Example 5, because the Ag content was high, chip cracking occurred. Therefore, it was not possible to measure the shear strength at high temperatures. In Comparative Example 6, because the Cu content was low, the shear strength at high temperatures was inferior. In Comparative Example 7, because the Cu content was high, chip cracking occurred, and many voids also occurred. Therefore, it was not possible to measure the shear strength at high temperatures. In Comparative Example 8, the Sb, Ag, and Cu contents were all high, chip cracking occurred, and many voids also occurred. Therefore, it was not possible to measure the shear strength at high temperatures.

[0134] Next, the structure of the solder alloy is described using a cross-sectional image of the solder joint. FIG. 1 shows a cross-sectional SEM image and a cross-sectional EDS element mapping diagram of a solder joint. FIG. 1A shows an SEM image of Comparative Example 2. FIG. 1B shows a cross-sectional EDS element mapping diagram of Comparative Example 2. FIG. 1C shows an SEM image of Example 6 of the present invention. FIG. 1D shows a cross-sectional EDS element mapping diagram of Example 6 of the present invention.

[0135] As shown in FIG. 1, it was found that SnSb, Cu.sub.6Sn.sub.5, Cu.sub.3Sn, and Ag.sub.3Sn were formed in this example. As shown in FIG. 1D, it was found that the solder joint of Example 6 of the present invention had an excellent balance between Cu.sub.6Sn.sub.5 and Cu.sub.3Sn. Furthermore, as shown in FIG. 1D, in Example 6 of the present invention, because the Sn phase was separated by the compound, it was found that the test substrate and the silicon chip were crosslinked by the compound. Therefore, it was found that Example 6 of the present invention exhibits excellent shear strength at high temperatures. Meanwhile, as shown in FIG. 1B, in Comparative Example 2, it was found that the Sn phase on the left side of the image was continuous from the vicinity of the test substrate to the vicinity of the silicon chip, and this portion was not crosslinked by the compound. Therefore, it was found that in Comparative Example 2, the shear strength at high temperatures was inferior.

[0136] FIG. 2 shows an optical micrograph and an X-ray plane image of the chip after soldering. FIG. 2A shows an optical micrograph of Example 6 of the present invention. FIG. 2B shows an X-ray plan image of Example 6 of the present invention. FIG. 2C shows an optical micrograph of Example 10 of the present invention. FIG. 2D shows an X-ray plan image of Example 10 of the present invention. FIG. 2E shows an optical micrograph of Comparative Example 7. FIG. 2F shows an X-ray plan photograph of Comparative Example 7. In Examples 6 and 10 of the present invention, it was found that chip cracking did not occur and the void area ratio was 5% or less. It was found that Example 6 of the present invention had a void area ratio that was even lower than that of Example 10 of the present invention. On the other hand, in Comparative Example 7, it was found that chip cracking occurred, and the void area ratio far exceeded 5%.

[0137] FIG. 3 is a graph showing the shear strengths of Examples 1, 5, 6, and 10 of the present invention and Comparative Examples 1 to 8. In FIG. 4, in Comparative Examples 3, 5, 7, and 8, chip cracking occurred and the shear strength at high temperatures could not be measured, so the fields were left blank. As is clear from FIG. 3, it was found that all of Examples of the present invention showed higher shear strength at high temperatures than Comparative Examples. Furthermore, it was found that Examples 5, 6, and 10 of the present invention all exhibited higher shear strength at high temperature than Example 1 of the present invention.