METHOD FOR FABRICATION OF A SENSOR DEVICE

Abstract

A method for fabrication of a sensor device (1) for measuring a parameter of a test substance, comprising: i) providing a substrate; ii) arranging on its front side a structured first protection layer (2); iii) arranging on the substrate with the structured first protection layer (2) a stack including first and second electrodes (3,4), a sacrificial layer between the first and second electrodes (3,4); and iv) etching in an etching step from the back side through the substrate such as to remove material of the semiconductor substrate and the sacrificial layer. The present invention also relates to such a sensor device (1).

Claims

1-15. (canceled)

16. A method for fabrication of a sensor device, the sensor device being adapted for measuring a first parameter of a test substance, the method comprising the steps of: i) providing a substrate with a front side and a back side, the front and back sides each extending in an in-plane direction and being located at a distance to one another in an out-of-plane direction; ii) depositing from the front side of the substrate a structured first protection layer; iii) arranging on the front side of the substrate a stack of dielectric and conducting in-plane layers, the stack comprising: a first electrode; a second electrode; a sacrificial layer; wherein the first and second electrodes are arranged on the first protection layer and at a distance to one another in the in-plane direction, wherein the sacrificial layer is arranged without overlap with the first protection layer with respect to the in-plane direction and between the first electrode and the second electrode with respect to the in-plane direction; and the stack further comprising: a passivation layer that covers front sides of the first and second electrodes and the sacrificial layer, respectively; and iv) generating from the back side of the substrate, in a process step an opening, the opening extending through the substrate from its back side to its front side and the opening removing at least part of the sacrificial layer, thereby creating a sensing cavity extending between the first electrode and the second electrode, wherein the first protection layer protects the first and second electrodes from being removed during the process step iv).

17. The method according to claim 16, wherein the process step iv) is a deep reactive-ion etching process step, wherein the structured first protection layer acts as an etching stop to prevent etching of the first and second electrodes during the process step iv).

18. The method according to claim 16, wherein the sensing cavity is partly or completely filled with a sensitive substance, the sensitive substance being chosen such that it has a measurable second parameter, wherein, when the sensitive substance is in contact with the test substance, the second parameter of the sensitive substance varies upon variation of the measurement parameter of the test substance.

19. The method according to claim 16, wherein the substrate is made from a material selected from the group comprising silicon and other semiconductor materials.

20. The method according to claim 16, wherein the first and second electrodes and the sacrificial layer each have an out-of-plane thickness of 50 nanometers to 250 nanometers, or of 160 nanometers to 240 nanometers.

21. The method according to claim 16, wherein the structured first protection layer is a layer as used in standard CMOS technology, and wherein the first protection layer either protrudes in in-plane direction over the respective first or second electrode in the in-plane direction or is removed after the process step iv).

22. The method according to claim 16, wherein the first and second electrodes or the first and second electrodes and the sacrificial layer, are covered by a second protection layer protecting against external influences, the second protection layer having an out-of-plane thickness of 30 nanometers to 250 nanometers, or of 80 nanometers to 120 nanometers, or is 100 nanometers.

23. The method according to claim 22, wherein the process step iv) is designed such that the first and second electrodes remain covered by the second protection layer such that the first and second electrodes are protected against external influences.

24. The method according to claim 16, wherein the sacrificial layer is completely removed during the process step iv).

25. The method according to claim 16, wherein, after the process step iv), at least the back side of the stack is covered by a third protection layer, the third protection layer having an out-of-plane thickness of 20 nanometers to 350 nanometers, or of 120 nanometers to 180 nanometers.

26. A sensor device for measuring a first parameter of a test substance, the sensor device comprising: a substrate, having a first side and a second side, the first and second sides each extending in an in-plane direction and being located at a distance to one another in an out-of-plane direction, the substrate having an opening extending from the second side to the first side of the substrate; a stack arranged on the first side of the substrate and at least partly spanning the opening; a first electrode and a second electrode arranged in the stack such as to overlap with the opening with respect to the in-plane direction, the first electrode and the second electrode being separated in the in-plane direction by a space from one another; wherein the opening is further extending at least partly into the space between the first electrode and the second electrode, thereby delimiting a sensing cavity therebetween; wherein the first and second electrodes are made from standard CMOS polysilicon layer materials.

27. The sensor device according to claim 26, wherein a structured first protection layer is arranged on second sides of the first and second electrodes, the structured first protection layer being adapted to protect the first and second electrodes from being damaged during the etching process that forms the sensing cavity.

28. The sensor device according to claim 27, wherein the substrate is made from a semiconductor material, wherein the first protection layer has an out-of-plane thickness from 100 nanometers to 600 nanometers, or from 320 nanometers to 480 nanometers, or wherein the structured first protection layer protrudes in in-plane direction over the first and second electrodes.

29. The sensor device according to claim 26, wherein the space is delimited in out-of-plane direction by an end surface that extends in in-plane direction, and wherein the end surface is free of an etch stop structure.

30. The sensor device according to claim 26, wherein the opening is partially or completely filled with a sensitive substance, the sensitive substance being chosen such that it has a measurable second parameter, wherein, when the sensitive substance is in contact with the test substance, the second parameter of the sensitive substance varies upon variation of the measurement parameter of the test substance.

31. The method according to claim 16, wherein said first parameter of the test substance is a humidity of the test substance.

32. The method according to claim 16, wherein the first and second electrodes and the sacrificial layer are made from materials selected from the group consisting of doped polysilicon or any other standard CMOS polysilicon layer materials.

33. The method according to claim 18, wherein the first and second electrodes form a capacitor with the sensitive substance acting as a dielectric in the capacitor.

34. The method according to claim 18, wherein the sensitive substance is a polymer substance and the second parameter is a relative permittivity of that polymer substance, the relative permittivity changing upon absorption or desorption of humidity from the test substance when the sensitive substance is in contact with the test substance.

35. The method according to claim 18, wherein an out-of-plane thickness of the sensitive substance is 0.5 micrometers to 15 micrometers or is 5.6 micrometers to 8.4 micrometers or is 7 micrometers.

36. The method according to claim 19, wherein the semiconductor material has an out-of-plane thickness of 100 micrometers to 1000 micrometers, or of 200 micrometers to 500 micrometers.

37. The method according to claim 20, wherein the first and second electrodes are structured in an interdigitated manner with respect to one another; wherein the first and second electrodes and the sacrificial layer each have an in-plane width of 80 nanometers to 1000 nanometers, or of 140 nanometers to 260 nanometers, or is 200 nanometers.

38. The method according to claim 20, wherein an in-plane distance between the first or second electrode and the sacrificial layer is at least 150 nanometers, and wherein an in-plane distance between the first electrode and the second electrode is 150 nanometers to 1000 nanometers, or of 400 nanometers to 600 nanometers, or is 500 nanometers.

39. The method according to claim 20, wherein the passivation layer has an out-of-plane thickness of 500 nanometers to 1500 nanometers, or of 720 nanometers to 1080 nanometers, or of 900 nanometers, or wherein the passivation layer comprises or consists of SiO.sub.2.

40. The method according to claim 21, wherein the structured first protection layer is a silicon oxide or a silicon nitride layer or wherein an out-of-plane thickness of the structured first protection layer ranges from 100 nanometers to 600 nanometers or ranges from 320 nanometers to 480 nanometers or is 400 nanometers.

41. The method according to claim 21, wherein the first protection layer protrudes in in-plane direction over the respective first or second electrode by up to 100 nanometers.

42. The method according to claim 22, wherein second protection layer is made from SiN.

43. The method according to claim 25, wherein third protection layer is made from SiN.

44. The sensor device according to claim 26, wherein the first parameter is of the test substance is a humidity of the test substance or wherein the substrate is made from doped polysilicon.

45. The sensor device according to claim 26, wherein the first protection layer is a layer made from a material selected from the group consisting of silicon oxide, silicon nitride, or any other standard CMOS technology material.

46. The sensor device according to claim 26, wherein the structured first protection layer protrudes in in-plane direction over the first and second electrodes by up to 100 nanometers.

47. A sensor device for measuring a first parameter of a test substance, the sensor device comprising: a substrate, having a first side and a second side, the first and second sides each extending in an in-plane direction and being located at a distance to one another in an out-of-plane direction, the substrate having an opening extending from the second side to the first side of the substrate; a stack arranged on the first side of the substrate and at least partly spanning the opening; a first electrode and a second electrode arranged in the stack such as to overlap with the opening with respect to the in-plane direction, the first electrode and the second electrode being separated in the in-plane direction by a space from one another; wherein the opening is further extending at least partly into the space between the first electrode and the second electrode, thereby delimiting a sensing cavity therebetween; wherein the first and second electrodes are made from standard CMOS polysilicon layer materials, wherein a structured first protection layer is arranged on second sides of the first and second electrodes, the structured first protection layer being adapted to protect the first and second electrodes from being damaged during the etching process that forms the sensing cavity.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Preferred embodiments of the invention are described in the following with reference to the drawings, which are for the purpose of illustrating the present preferred embodiments of the invention and not for the purpose of limiting the same. In the drawings,

[0065] FIG. 1 shows, in a top view, an embodiment of a sensor chip with a sensor device on a semiconductor substrate, the sensor device comprising a first and a second electrode, the first and second electrodes being arranged in an interdigitated manner and forming the sensitive structure of the sensor device;

[0066] FIG. 2 shows, in a cross-sectional view, an embodiment of the pre-processed sensor device before a measurement opening is etched in a process step iv) according to invention through the semiconductor substrate and into a stack of dielectric and conducting layers arranged on the semiconductor substrate;

[0067] FIG. 3 shows, in a cross-sectional view, the layer arrangement according to FIG. 2 after the process step iv) has been carried out;

[0068] FIG. 4 shows the layer arrangement according to FIG. 3 after a sensitive substance has been deposited to cover the sensing structure; and

[0069] FIG. 5 shows a block diagram of an embodiment of the method according to the present invention.

DESCRIPTION OF PREFERRED EMBODIMENTS

[0070] Preferred embodiments of the present invention are described with reference to FIGS. 1 to 6.

[0071] FIG. 1 shows, in a top view, an embodiment of a sensor chip 100 with a sensor device 1 on a substrate 10. The sensor device 1 is designed for measuring, as a first parameter P.sub.1, a humidity value of a test substance. The test substance may be ambient air. The sensor device 1 has a first electrode 3 and a second electrode 4, the first and second electrodes 3, 4 being arranged in an interdigitated manner with respect to one another and spanning a measurement field 103 of the sensor device 1. The measurement field 103 may have an area of about 100 micrometers by 100 micrometers.

[0072] The measurement field 103 is covered by a sensitive substance 9 (cf. FIG. 4). The sensitive substance 9 may be a polymeric or a ceramic material, wherein the sensitive substance 9 has a second parameter P.sub.2, wherein said second parameter P.sub.2 may be measured by means of the sensor device 1 and wherein, when the sensitive substance 9 is in contact with the test substance, the second parameter P.sub.2 of the sensitive substance 9 varies upon variation of the measurement parameter P.sub.1 of the test substance due to, for example, a change in the external conditions. Polymeric material of the sensitive substance 9 may absorb or desorption humidity, i.e. water vapor in the air, which changes the relative permittivity of the sensitive substance 9. As the sensitive substance 9 acts as a dielectric of the capacitor formed by the first and second electrodes 3, 4, said changing relative permittivity may be accessed by measuring the properties of said capacitor.

[0073] An active integrated circuitry 101 is integrated into the sensor chip 100. The integrated circuitry 101 may comprise, for example, evaluation and/or amplification circuitry for reading out a signal, such as a change in the relative permittivity of dielectric of the capacitor, picked-up by the sensing structure formed by the first and second electrodes 3, 4. Preferably, the integrated circuitry 101 is located outside the measurement field 103. A connecting structure 104 provides electric outside-world connection to the sensor chip 100 for the purpose of data transfer and/or power supply.

[0074] The integrated circuitry 101 may comprise a computer program product comprising a processor unit (CPU, μP), a non-volatile (e.g. a flash ROM) memory, and a volatile (RAM) memory. The processor communicates with the memory modules. The non-volatile memory stores, inter alia, received or generated signals, as well as a machine-executable program code for execution in the processor. Via a data interface, the processor may communicate with various peripherals, including, for example and depending on the application, the sensor device 1 and a user interface. The user interface may include, e.g., at least one of a network interface for interfacing with an external input/output device, a dedicated input device such as a keyboard and/or mouse for inputting, e.g., a measurement scheme or the like, and a dedicated output device, such as, e.g., an LCD screen for displaying information.

[0075] FIG. 2 shows, in a cross-sectional view, an embodiment of the sensor device 1 before an opening 13 (cf. FIG. 3) is etched in a process step iv) according to invention into the structure.

[0076] In a first step of an embodiment of the method according to invention, the substrate 10 is provided. The substrate 10 is a semiconductor substrate, preferably made from silicon; it may be part of a standard silicon wafer as commonly used in standard CMOS technology. The substrate 10 extends along and in-plane direction x and may have an out-of-plane thickness h.sub.10 extending along an out-of-plane direction z. In FIG. 1, the out-of-plane direction z points out of the drawing sheet. The out-of-plane thickness h.sub.10 ranges from 100 micrometers to 1000 micrometers, in particular 200 micrometers to 500 micrometers.

[0077] The substrate 10 has a front side 11 and a back side 12. On or in the substrate 10 there is provided a first protection layer 2 that is structured to outline a path of the first and second electrodes 3, 4, i.e. the first protection layer 2 is arranged in a meander pattern on the substrate 10.

[0078] If the first protection layer 2 is provided in the substrate 10, it is provided preferably such that front sides 11 and 21 of the substrate and the first protection layer 2, respectively, are flush with one another.

[0079] The first protection layer 2 may be a silicon oxide or a silicon nitride layer. Moreover, the first protection layer 2 protects the first and second electrodes 3, 4 during the process step iv) according to invention.

[0080] As for the structure of the first protection layer 2: The first protection layer 2 has an out-of-plane thickness h.sub.2 of 100 nanometers to 600 nanometers. It is preferred that h.sub.2 has a value that, after the process step iv) according to invention (see below), is 100 nanometers to 600 nanometers, more preferably 320 nanometers to 480 nanometers, even more preferably is 400 nanometers. An initial out-of-plane thickness h.sub.2 may be 380 nanometers to 580 nanometers, preferably 480 nanometers. A width w.sub.2 the first protection layer 2 is chosen such that, in the final sensor device 1, the first protection layer 2 sections, i.e. its paths, protrude in in-plane direction over the respective first or second electrodes 3, 4 by 100 nanometers to either side in in-plane direction x, i.e. the width w.sub.2 of the paths of the first protection layer 2 is 200 nanometers wider than the width of the first and second electrodes 3, 4 in in-plane direction x. An in-plane width w.sub.2 of the first protection layer 2 may be 80 nanometers to 1000 nanometers, preferably 140 nanometers to 260 nanometers, more preferably 200 nanometers.

[0081] After providing the substrate 10, a stack 6 of dielectric and conducting layers as commonly used in CMOS technology is deposited onto the front side 11 of the substrate 10 with the structured first protection layer 2. The dielectric and conducting layers of the stack 6 extend along the in-plane direction x. The stack 6 comprises the first electrode 3 and the second electrode 4, as well as a sacrificial layer 5. Moreover, the stack 6 comprises a second protection layer 7 and a passivation layer 61.

[0082] In some other embodiments, further elements may be comprised in the stack 6 depending on the specific application of the sensor device 1.

[0083] The first and second electrodes 3, 4 are arranged on the structured first protection layer 2 and at the distance to one another in the in-plane direction x to form an interdigitated electrode structure which constitutes a structured capacitor. The sections of the first protection layer 2 (i.e. its paths) that carry the first electrode 3 are located at the distance of the first protection layer 2 that carry the second electrode 4; accordingly, the structured first protection layer 2 mirrors that interdigitated pattern of the electrode structure.

[0084] The sacrificial layer 5 is arranged between the first and second electrodes 3, 4 with respect to the in-plane direction x. Moreover, the sacrificial layer 5 is arranged outside the first protection layer 2, i.e. it does not overlap with the first protection layer 2 in in-plane direction x.

[0085] Out-of-plane heights h.sub.3, h.sub.4, h.sub.5 of the first and second electrodes 3, 4 and the sacrificial layer 5, respectively, are 50 nanometers to 250 nanometers, preferably 160 nanometers to 240 nanometers, more preferably 200 nanometers each. In-plane widths w.sub.3, w.sub.4, w.sub.5 of the first and second electrodes 3, 4 and the sacrificial layer 5, respectively, may be 80 nanometers to 1000 nanometers, preferably 140 nanometers to 260 nanometers, in particular 200 nanometers.

[0086] In-plane distances d.sub.35, d.sub.45 between the first or second electrodes 3, 4 and the sacrificial layer 5, respectively, may be at least 150 nanometers, preferably 220 nanometers to 340 nanometers, more preferably 280 nanometers.

[0087] An in-plane distance d.sub.34 between the first electrode 3 and the second electrode 4 may be 150 nanometers to 1000 nanometers, preferably 400 nanometers to 600 nanometers, more preferably 500 nanometers.

[0088] The first and second electrodes 3, 4 and the sacrificial layer 5 may be made from standard CMOS polysilicon layer materials, preferably from doped polysilicon.

[0089] The stack 6 is grown such that the first and second electrodes 3, 4 and the sacrificial layer 5 are coated, on their front sides 31, 41, 51, with the second protection layer 7, the second protection layer 7 being a barrier against external influences, such as oxygen, in order to protect the first and second electrodes 3, 4 from deteriorating during use of the sensor device 1. Preferably, the second protection layer 7 is a highly oxygen proof barrier material such as SiN. A thickness h.sub.7 may be 30 nanometers to 250 nanometers, preferably 80 nanometers to 120 nanometers, more preferably 100 nanometers. The lateral sections of the protection layer 7 extending in the out-of-plane direction z may act as spacers between the sacrificial layer 5 and the first or the second electrodes 3, 4, respectively.

[0090] The passivation layer 61 may cover the entire measurement field 103, in particular the first and second electrodes 3, 4 and the sacrificial layer 5. The passivation layer 61 may have an average out-of-plane thickness h.sub.61 of 500 nanometers to 1500 nanometers, preferably 720 nanometers to 1080 nanometers, more preferably of 900 nanometers. Preferably, the passivation layer 61 comprises or consists of SiO.sub.2.

[0091] After providing the substrate 10 with the stack 6, in a next step, the opening 13 (cf. FIG. 3) is etched from the back side 12 of substrate 10 into the substrate 10 in during the process step iv), the process being, for example, a deep reactive-ion etching process step, a SF6 plasma etching step, a KOH wet-etching step, or any combination thereof.

[0092] FIG. 3 shows the result of this process step iv) according to invention. The process step iv) according to invention is designed such that the final opening 13 extends from the back side 12 to the front side 11 and further into the stack 6 of the sensor device 1. Moreover, the sacrificial layer 5 has been removed by the same process step iv) thereby creating a sensing cavity extending between the first and second electrodes 3, 4.

[0093] In the present embodiment, the sacrificial layer 5 has been completely removed but in other embodiments only part of the sacrificial layer 5 is removed.

[0094] As the first protection layer 2 is exposed to the etching action during the process step iv), it has been reduced in thickness from an initial thickness of 480 nanometers to a final thickness of 400 nanometers. Sections of the second protection layer 7 that are arranged without overlap in the in-plane direction x with the first protection layer 2 are completely or partially removed by the process step iv); accordingly, only sections of the second protection layer 7 that are in direct contact with the first and second electrodes 3, 4—and therefore enjoy protection by the electrode overlapping first protection layer 2 from being removed by the etching step—remain on the sensor device 1. In this context it is noted again that the first protection layer 2 extends over a distance d.sub.overlap beyond the first and second electrodes 3, 4 to either side in in-plane direction x by more than 100 nanometers (cf. FIG. 3). Thereby it is insured that sections of the second protection layer 7, which are protecting the first and second electrodes 3, 4 from deteriorating, are not removed during the process step iv). Accordingly, the first and second electrodes 3, 4 are enclosed by the first and second protection layers 2, 7 (cf. FIG. 3).

[0095] As a result of the process step iv), a part of the passivation layer 61 has been removed as well. An extent d.sub.oxideloss in out-of-plane direction z of this material loss may be on the 20 nanometers to several hundred nanometers.

[0096] Due to the removal of the sacrificial layer 5, the opening 13 extends into a space 130 between the first and second electrodes 3, 4 in in-plane direction x. Accordingly, the sensing cavity 8 extends between the first and second electrodes 3, 4. A total out-of-plane depth d.sub.polyoveretch, located at the position where the sacrificial layer 5 had been and as measured from the back side 32, 42 of the first and second electrodes 3, 4 to an in-plane end surface 131 of the space 130, may be 200 nanometers to 700 nanometers, preferably 340 nanometers to 500 nanometers, more preferably of 420 nanometers. The total out-of-plane depth d.sub.polyoveretch may, in some embodiments, be calculated as h.sub.5+h.sub.7+d.sub.oxidloss, i.e. during the process step iv), the sacrificial layer is removed (giving an initial depth of h.sub.5), the second protection layer 7 is removed (adding another h.sub.7 to the total depth d.sub.polyoveretch), and, some of the passivation layer 61 is lost due to over etching (adding another d.sub.oxidloss of about 120 nanometers to 200 nanometers to the total depth d.sub.polyoveretch).

[0097] After the opening 13 is processed into the sensor device 1, a third protection layer 63 may be deposited onto the revealed sensing structure, i.e. over the structured first protection layer 2 and onto the structured back side 60 of the stack 6 as shown in FIG. 3. The third protection layer 63 may be a SiN layer that is deposited with a thickness of h.sub.63 of 20 nanometers to 350 nanometers, preferably of 120 nanometers to 180 nanometers, more preferably 150 nanometers. The third protection layer 63 protects the revealed structure from damage and/or deterioration.

[0098] As a result, a sensing cavity 8 has been created, during the process step iv), extending in in-plane direction x between the first and second electrodes 3, 4. A width w.sub.8 of the sensing cavity 8 between the first and second electrodes 3, 4 may be 400 nanometers.

[0099] In the next step, at least the sensing cavity 8, preferably the entire opening 13, may be partially or completely filled with a sensitive substance 9 (cf. FIG. 4). The sensitive substance 9 is deposited into opening 13 preferably by means of micro-dispensing or ink-jetting. The sensitive substance 9 may be a polymeric material that absorbs or desorption water vapor from the test substance upon contact between the sensitive substance and the test substance. An out-of-plane thickness h.sub.9 of the sensitive substance may be 0.5 micrometers to 15 micrometers, preferably 5.6 micrometers to 8.4 micrometers, in particular 7 micrometers.

[0100] FIG. 4 shows a sensor device 1 after completion.

[0101] FIG. 5 shows in a simplified block diagram that method according to invention in a preferred embodiment. In step i), the substrate 10 is provided, thereafter, in step ii), the structured first protection layer 2 is deposited onto the front side 11 of the substrate 10. In step iii), the stack 6 is deposited on the front side 11 of the substrate 10 with the structured protection layer 2. Optionally, the second protection layer 7 is included in stack 6. In the process step iv) the opening 13 is processed into the substrate 10 and the stack 6. In preferred embodiments, the third protection layer 63 is deposited onto the revealed sending structure including the first and second electrodes 3, 4 and/or the sensitive substance 9 is filled into at least part of the opening 13.

[0102] It is to be understood that different designs of the sensor device 1 may be created depending on the requirements of the specific application. The present invention is particularly advantageous as the opening 13, which extends as a through hole through the entire substrate 10 and into stack 6 such as to remove at least part of the sacrificial layer 5, is processed into the sensor device 1 in the process step iv), the process step iv) being a single or a plurality of deep reactive-ion etching process steps and/or a KOH wet-etching step and/or a SF.sub.6 plasma step or any combination thereof. This simplifies the manufacturing process of such sensor devices. Also, the entire manufacturing process may be designed with standard CMOS materials and standard CMOS process steps. In particular, the electrode structure comprising the first and second electrodes 3, 4, as well as the sacrificial layer 5, may be made from poly silicon available in the standard CMOS process.

TABLE-US-00001 LIST OF REFERENCE SIGNS 1 sensor device 10 substrate of 1 11 first or front side of 10 12 second or back side of 10 13 opening 130 space 131 end surface of 130 100 sensor chip with 1 101 integrated circuitry of 100 103 measurement field of 1 104 connecting structure 2 first protection layer 21 front side of 2 3 first electrode 31 front side of 3 32 back side of 3 4 second electrode 41 front side of 4 42 back side of 4 5 sacrificial layer 51 front side of 5 52 back side of 5 6 stack 60 back side of 6 61 passivation layer 63 third protection layer 7 second protection layer 8 sensing cavity 9 sensitive substance d.sub.34 in-plane distance between 3 and 4 d.sub.35 in-plane distance between 3 and 5 d.sub.45 in-plane distance between 4 and 5 d.sub.overlap part of 2 that extends beyond the electrode in x d.sub.oxideloss extent of loss of 61 d.sub.polyoveretch depth of space 130 in z P.sub.1 first parameter of a test substance P.sub.2 second parameter of sensing substance h.sub.2 out-of-plane thickness of 2 h.sub.3 out-of-plane thickness of 3 h.sub.4 out-of-plane thickness of 4 h.sub.5 out-of-plane thickness of 5 h.sub.7 thickness of 7 h.sub.9 out-of-plane thickness of 9 h.sub.10 out-of-plane thickness of 10 h.sub.61 out-of-plane thickness of 61 h.sub.63 out-of-plane thickness of 63 w.sub.2 in-plane width of 2 w.sub.3 in-plane width of 3 w.sub.4 in-plane width of 4 w.sub.5 in-plane width of 5 w.sub.8 in-plane width of 8 x in-plane direction z out-of-plane direction