ELECTRICAL COMPONENT AND METHOD FOR MANUFACTURING AN ELECTRONIC COMPONENT

Abstract

An electrical component having a DC link capacitor and an EMC filter. The electrical component includes an input port and an output port. The EMC filter includes a first filter stage and a second filter stage. The first filter stage is arranged between the input port and the DC link capacitor, and the second filter stage is arranged between the output port and the DC link capacitor. Another aspect concerns a method for manufacturing an electronic component.

Claims

1. An electrical component comprising, a DC link capacitor and an EMC filter, wherein the electrical component comprises an input port and an output port, wherein the EMC filter comprises a first filter stage and a second filter stage, wherein the first filter stage is arranged between the input port and the DC link capacitor and the second filter stage is arranged between the output port and the DC link capacitor.

2. Electrical component according to claim 1, wherein the EMC filter comprises a further filter stage.

3. Electrical component according to claim 1, wherein the EMC filter and the DC link capacitor are integrated into a single circuit.

4. Electrical component according to claim 1, wherein the input port is configured for connecting the electrical component to a DC input, and wherein the output port is configured for connecting the electrical component to an inverter semiconductor bridge.

5. Electrical component according to claim 1, wherein the electrical component is configured to receive a direct current at the input port and to provide a direct current at the output port.

6. Electrical component according to claim 1, wherein the second filter stage is configured to avoid noise migration to the DC link capacitor, or wherein the second filter stage includes at least one of a magnetic element operating as inductor or a snubber capacitor.

7. (canceled)

8. Electrical component according to claim 1, wherein the second filter stage includes a snubber capacitor, wherein the snubber capacitor is a film capacitor which comprises a plastic film, or wherein the snubber capacitor is a ceramic capacitor, or wherein the snubber capacitor is an aluminum electrolytic capacitor.

9. Electrical component according to claim 1, wherein the second filter stage comprises at least one Y capacitor connected between a signal line and a reference potential.

10. Electrical component according to claim 9, wherein the at least one Y capacitor is a film capacitor that comprises a plastic film, or wherein the at least one Y capacitor is a ceramic capacitor, or wherein the at least one Y capacitor is an aluminum electrolytic capacitor.

11. (canceled)

12. Electrical component according to claim 11, wherein the magnetic element comprises a Manganese-zinc ferrite core or a nickel-zinc ferrite core or a nanocrystalline tape core.

13. Electrical component according to claim 1, wherein the first filter stage comprises at least one of an x-capacitor connected between two signal lines, or at least one Y capacitor connected between a signal line and a reference potential, or a magnetic element operating as inductor.

14. Electrical component according to claim 13, wherein the first filter stage comprises the x-capacitor, wherein the x-capacitor is a film capacitor which comprises a plastic film, or wherein the x-capacitor is a ceramic capacitor, or wherein the x-capacitor is an aluminum electrolytic capacitor.

15. (canceled)

16. (canceled)

17. Electrical component according to claim 1, wherein the first filter stage comprises a magnetic element operating as an inductor, wherein the magnetic element of the first filter stage comprises a Manganese-zinc ferrite core or a nanocrystalline tape core.

18. Electrical component according to claim 1, wherein the DC link capacitor is configured to provide capacitive noise suppression.

19. (canceled)

20. Electrical component according to claim 1, wherein the electrical component comprises at least one of a temperature sensor, a current sensor, a humidity sensor, a pressure sensor, a gas sensor, a functional component, or a module for transferring data.

21. Electrical component according to claim 1, wherein the DC link capacitor is a film capacitor which comprises a plastic film, or wherein the DC link capacitor is a ceramic capacitor, or wherein the DC link capacitor is an aluminum electrolytic capacitor.

22. A power inverter circuit comprising an electrical component according to claim 1 and an inverter semiconductor bridge, wherein the output port of the electrical component is connected to the inverter semiconductor bridge.

23. Method for manufacturing an electronic component according to claim 1, comprising the steps of: a. manufacturing functional DC link capacitor units, b. connecting the functional DC link capacitor units to a busbar, c. manufacturing an EMC filter or filter sub-units which comprises a first filter stage and a second filter stage, d. assembling the functional DC link capacitor units connected to the busbar and the EMC filter or the filter sub-units in a housing, wherein step c. is performed either before step a., or before step b. or before step d.

24. Method according to claim 23, wherein, in step d., a sensor and/or a functional component is assembled in the housing.

25. An electrical component comprising, a DC link capacitor and an EMC filter, wherein the electrical component comprises an input port and an output port, wherein the EMC filter comprises a first filter stage and a second filter stage, wherein the first filter stage is arranged between the input port and the DC link capacitor (C.sub.DCL) and the second filter stage is arranged between the output port and the DC link capacitor, wherein the DC link capacitor has a capacitance of at least 50 μF, wherein the EMC filter and the DC link capacitor are integrated into a single component comprising one chassis with the input terminals of the input port and the output terminals of the output port, wherein the electrical component does not comprise an interface between the DC link capacitor and the EMC filter, which has to be closed when assembling the electrical component.

Description

[0038] In the following, preferred embodiments of the present invention are described with reference to the figures.

[0039] FIG. 1 shows a power inverter circuit.

[0040] FIG. 2 shows a circuit diagram of an electrical component of the power inverter circuit.

[0041] FIGS. 3 and 4 show the permeability for two cores which can be used as magnetic elements.

[0042] FIG. 5 shows the electrical component in a perspective view.

[0043] FIG. 6 shows a noise level of the power inverter circuit shown in FIG. 1 compared to the noise level of a comparative power inverter circuit.

[0044] FIG. 7 shows the comparative power inverter circuit.

[0045] FIG. 1 shows a power inverter circuit 1. The power inverter circuit 1 comprises an electrical component 2, an inverter semiconductor bridge 3 and a magnetic element 4. The electrical component 2 comprises an input port 2a and an output port 2b. The input port 2a of the electrical component 2 is also the input port of the power inverter circuit 1. The input port 2a of the electrical component 2 is configured to be connected to a DC input, for example a battery.

[0046] The inverter semiconductor bridge 3 comprises an input port 3a and an output port 3b. The output port 2b of the electrical component 2 is configured to be connected to the input port 3a of the inverter semiconductor bridge 3. The output port 3b of the inverter semiconductor bridge 3 is configured to be connected to a cable wherein the inverter semiconductor bridge 3 is configured to provide an alternating current to the cable. The cable is configured to be connected to a motor. The magnetic element 4 is arranged around the output port 3b of the inverter semiconductor bridge 3. The magnetic element 4 is configured to provide a filtering of the alternating current provided at the output port 3b of the inverter semiconductor bridge 3.

[0047] The inverter semiconductor bridge 3 is configured to transform a direct current provided at the input port of the power inverter circuit 1 into an alternating current provided at the output port of the power inverter circuit 1. The inverter semiconductor bridge 3 comprises one or more transistors.

[0048] The electrical component comprises a DC link capacitor C.sub.DCL and an EMC filter (EMC=electromagnetic compatibility). The DC link capacitor C.sub.DCL is configured to store energy. The EMC filter is configured to limit unwanted emissions and to increase the inverter immunity.

[0049] The DC link capacitor C.sub.DCL and the EMC filter of the electrical component are integrated into a single circuit. Thus, for connecting the DC link capacitor C.sub.DCL and the EMC filter to the power inverter circuit 1, only a single interface connection between the electrical component 2 and the inverter semiconductor bridge 3 has to be closed.

[0050] The EMC filter comprises a first filter stage 6 and a second filter stage 7 which are schematically indicated in FIG. 1. The first filter stage 6 is arranged between the input port 2a of the electrical component 2 and the DC link capacitor C.sub.DCL. The second filter stage 7 is arranged between the output port 2b of the electrical component 2 and the DC link capacitor C.sub.DCL.

[0051] During operation of the power inverter circuit 1, parasitic currents and disturbances can be generated in the inverter semiconductor bridge 3. By arranging the second filter stage 7 at the output port 2b of the electrical component 2, the second filter stage 7 is arranged close to the inverter semiconductor bridge 3. Accordingly, the second filter stage 7 can filter and reduce any parasitic current or disturbances generated in the inverter semiconductor bridge 3 before the parasitic currents or disturbances can reach the DC link capacitor C.sub.DCL. Thus, the second filter stage 7 can avoid noise migration from the inverter semiconductor bridge 3 to the DC link capacitor C.sub.DCL. The second filter stage 7 is configured to filter noise right at the source before it can spread in an uncontrolled manner within the power inverter circuit. Accordingly, the second filter stage 7 is an early filter stage.

[0052] The first filter stage 6 is arranged between the DC link capacitor C.sub.DCL and the input port 2a such that the first filter stage 6 is configured to filter and reduce any noise or parasitic currents provided at the input port 2a before the noise can mitigate into the DC link capacitor C.sub.DCL.

[0053] The electrical component 2 is discussed in detail with respect to FIG. 2 which shows a circuit diagram of the electrical component 2. In particular, FIG. 2 shows the first filter stage 6 and the second filter stage 7 in more detail.

[0054] The input port 2a and the output port 2b of the electrical component 2 each comprise two terminals. A first terminal of the input port 2a is connected by the first signal line 8 to a first terminal of the output port 2b. A second terminal of the input port 2a is connected by a second signal line 9 to a second terminal of the output port 2b.

[0055] The first filter stage 6 comprises a first y-capacitor C.sub.y11, a second y-capacitor C.sub.y12, an x-capacitor C.sub.x, a first magnetic element Lb.sub.1 and a second magnetic element Lb.sub.2 wherein each of the magnetic elements Lb.sub.1, Lb.sub.2 operates as an inductor.

[0056] The y-capacitors C.sub.y11, C.sub.y12 are designed to filter out common-mode noise. The first y-capacitor C.sub.y11 of the first filter stage 6 is connected to the first signal line 8 and a reference potential. The reference potential can be a housing or a chassis of the electrical component 2. The first Y-capacitor C.sub.y11 is connected in series with a first resistor R1. In particular, the first signal line 8 is connected via the first resistor R1 and the first y-capacitor C.sub.y11 of the first filter stage 6 to the reference potential. The first resistor R1 provides resistive damping.

[0057] The second y-capacitor C.sub.y12 of the first filter stage 6 is connected to the second signal line 9 and to the reference potential. In particular, the second signal line 9 is connected via a second resistor R2, the second Y-capacitor C.sub.y12 to the reference potential.

[0058] The x-capacitor C.sub.x is connected between the two signal lines 8, 9. The x-capacitor C.sub.x is configured to protect the power inverter circuit 1 against differential mode interference.

[0059] Each of the magnetic elements Lb.sub.1, Lb.sub.2 comprises a core. According to one embodiment, the cores comprise manganese-zinc ferrite. According to another embodiment, the cores comprise nanocrystalline tape cores.

[0060] The first magnetic element Lb.sub.1 is arranged around the first signal line 8. The second magnetic element Lb.sub.2 is arranged around the second signal line 9.

[0061] Additionally, the first filter stage 6 comprises a third resistor R3 which is connected between the two signal lines 8, 9. The third resistor R3 is connected parallel to the DC link capacitor C.sub.DCL.

[0062] The second filter stage 7 comprises a first y-capacitor C.sub.y21, a second y-capacitor C.sub.y22, a snubber capacitor C.sub.S, a first magnetic element La.sub.1 and a second magnetic element La.sub.2, each of the magnetic elements La.sub.1, La.sub.2 operating as inductors.

[0063] The y-capacitors C.sub.y21, C.sub.y22 of the second filter stage 7 are designed to filter out common-mode noise. The first y-capacitor C.sub.y21 of the second filter stage 7 is connected to the first signal line 8 and a reference potential. The reference potential can be a housing or a chassis of the electrical component 2. The first Y-capacitor C.sub.y21 is connected in series with a fourth resistor R4. In particular, the first signal line 8 is connected via the fourth resistor R4 and the first y-capacitor C.sub.y21 of the second filter stage 7 to the reference potential. The fourth resistor R4 provides resistive damping.

[0064] The second y-capacitor C.sub.y22 of the second filter stage 7 is connected to the second signal line 9 and to the reference potential. In particular, the second signal line 9 is connected via a fifth resistor R5 and the second Y-capacitor C.sub.y22 to the reference potential.

[0065] The snubber capacitor C.sub.S is connected between the two signal lines 8, 9.

[0066] Each of the magnetic elements La.sub.1, La.sub.2 of the second filter stage 7 comprises a core. According to one embodiment, the cores comprise manganese-zinc ferrite. According to another embodiment, the cores comprise nanocrystalline tape cores.

[0067] The first magnetic element La.sub.1 is arranged around the first signal line 8. The second magnetic element La.sub.2 is arranged around the second signal line 9.

[0068] Additionally, the second filter stage 7 comprises a sixth resistor R6 which is connected between the two signal lines 8, 9. The sixth resistor R6 is connected parallel to the DC link capacitor C.sub.DCL.

[0069] The magnetic elements La.sub.1, La.sub.2 are configured to decouple a parasitic current provided at the output port 2b of the electrical component 2. In particular, current peaks of a parasitic current can be damped by the magnetic elements La.sub.1, La.sub.2. At the same time, the magnetic elements La.sub.1, La.sub.2 operating as an inductor create a leakage inductance which is compensated by the snubber capacitor C.sub.S. Accordingly, the magnetic elements La.sub.1, La.sub.2 and the snubber capacitor C.sub.S provide an LC-filter.

[0070] Each of the first filter stage 6 and the second filter stage 7 forms an LC-filter which is additionally combined with y-capacitors. As the DC link capacitor C.sub.DCL is arranged between the two filter stages 6, 7 which each comprise a magnetic element Lb.sub.1, Lb.sub.2, La.sub.1, La.sub.2 operating as an inductor, the DC link capacitor C.sub.DCL is configured and arranged to provide capacitive noise suppression. Accordingly, the DC link capacitor C.sub.DCL provides an additional pole in the filter circuit and helps to reduce the overall amount of additional symmetrical capacitors in the circuit.

[0071] Parasitic inductances of the DC link capacitor C.sub.DCL can result in ringing. The two filter stages 6, 7 of the EMC filter comprising y-capacitors C.sub.y11, C.sub.y12, C.sub.y21, C.sub.y22, the snubber capacitor C.sub.S and, respectively, the x-capacitor C.sub.x can reduce the unwanted ringing.

[0072] FIGS. 3 and 4 show the permeability for two cores which can be used as magnetic elements Lb.sub.1, Lb.sub.2, La.sub.1, La.sub.2 for different frequencies. FIG. 3 shows the real permeability and FIG. 4 shows the complex permeability of the two cores. According to a first embodiment, the cores of the magnetic elements Lb.sub.1, Lb.sub.2, La.sub.1, La.sub.2 are MnZn cores. According to a second embodiment, the cores are nanocrystalline tape cores. The curves K1 show the real and complex permeability of the cores of the first embodiment and the curves K2 show the real and complex permeability of the cores of the second embodiment.

[0073] Both cores have, in general, losses in the range above 100 KHz which help to damp ringing. The complex part of the permeability shown in FIG. 4 reflects the losses. It can be seen in FIG. 4 that the MnZn core provides high losses and therefore good filtering for frequencies of roughly 10.sup.6 Hz. Further, the nanocrystalline tape cores provide particularly good filtering for frequencies of roughly 100 KHz. The nanocrystalline tape cores can provide good losses in the kilohertz up to FM frequency range.

[0074] FIG. 5 shows the electrical component 2 in a perspective view. The DC link capacitor C.sub.DCL requires most of the volume of the electrical component 2. The first filter stage 6 is arranged between the input port 2a and the DC link capacitor C.sub.DCL and the second filter stage 7 is arranged between the output port 2b and the DC link capacitor C.sub.DCL. By combining the EMC filter and the DC link capacitor C.sub.DCL into a single component comprising one chassis 10 with input and output terminals, the overall volume requirement is reduced compared to a device wherein the DC link capacitor and the EMC filter are separate components.

[0075] FIG. 6 shows the noise level NL.sub.new of the power inverter circuit 1 shown in FIG. 1 compared to the noise level NL.sub.comp of a comparative power inverter circuit wherein the EMC filter and the DC link capacitor are provided as separate elements, as shown in FIG. 7. It is shown that the noise level NL.sub.new for the power inverter circuit 1 comprising the electrical component 2 of the present invention is reduced compared to the comparative power inverter circuit. Thus, the performance of the power inverter circuit 1 is improved over the comparative embodiment. In particular, for frequencies above 10 MHz the noise of the power inverter circuit 1 of the present invention is reduced compared to the comparative embodiment.

REFERENCE NUMERALS

[0076] 1 power inverter circuit [0077] 2 electrical component [0078] 2a input port [0079] 2b output port [0080] 3 inverter semiconductor bridge [0081] 3a input port [0082] 3b output port [0083] 4 magnetic element [0084] 6 first filter stage [0085] 7 second filter stage [0086] 8 first signal line [0087] 9 second signal line [0088] 10 chassis [0089] C.sub.DCL DC link capacitor [0090] C.sub.y11 first y-capacitor of the first filter stage [0091] C.sub.y12 second y-capacitor of the first filter stage [0092] C.sub.x x-capacitor [0093] Lb.sub.1 first magnetic element of the first filter stage [0094] Lb.sub.2 second magnetic element of the first filter stage [0095] C.sub.y21 first y-capacitor of the second filter stage [0096] C.sub.y22 second y-capacitor of the second filter stage [0097] C.sub.x snubber capacitor [0098] La.sub.1 first magnetic element of the second filter stage [0099] La.sub.2 second magnetic element of the second filter stage [0100] R1 first resistor [0101] R2 second resistor [0102] R3 third resistor [0103] R4 fourth resistor [0104] R5 fifth resistor [0105] R6 sixth resistor