Wafer mounting table and method of manufacturing the same

Abstract

A wafer mounting table includes a first electrode and a second electrode buried inside of a ceramic substrate having a wafer mounting surface so as to be parallel to the wafer mounting surface with the first electrode closer to the wafer mounting surface than the second electrode. The wafer mounting table includes a conductive section that electrically conducts the first electrode and the second electrode. The conductive section is such that a plurality of circular members comprised of plate-shaped metal meshes parallel to the wafer mounting surface are stacked between the first electrode and the second electrode.

Claims

1. A wafer mounting table comprising a first electrode and a second electrode buried inside of a ceramic substrate having a wafer mounting surface so as to be parallel to the wafer mounting surface; and a conductive section that electrically connects the first electrode and the second electrode, which have a vertical distance therebetween, with the first electrode closer to the wafer mounting surface than the second electrode, wherein the conductive section comprises a plurality of circular members, which are formed of a metal mesh, such that the circular members extend horizontally and are vertically stacked on one another, with each circular member being in electrical contact with an immediately adjacent circular member such that the plurality of circular members form a substantially cylindrical body that has a continuous vertical conductive path having a length between the first electrode and the second electrode, and the length of the continuous vertical conductive path of the conductive section is substantially equal to the vertical distance between the first electrode and the second electrode.

2. The wafer mounting table according to claim 1, Wherein a material of the ceramic substrate is included in a mesh space of the circular members.

3. The wafer mounting table according to claim 1, wherein the first electrode and the second electrode are used as electrostatic electrodes, used as RF electrodes, or used as both an electrostatic electrode and an RF electrode.

4. The wafer mounting table according to claim 1, wherein the first electrode is a disc electrode, and the second electrode is a disc electrode or a ring-shaped electrode which is larger than the first electrode in diameter, and concentric to the first electrode.

5. The wafer mounting table according to claim 1, wherein the ceramic substrate has a ring-shaped step surface which is outside of and lower than the wafer mounting surface, the first electrode is provided to be opposed to the wafer mounting surface, and the second electrode is provided to be opposed to the ring-shaped step surface.

6. A method of manufacturing the wafer mounting table of claim 1, the method comprising: (a) a step of digging a hole for placing a conductive section from one of surfaces of a ceramic pressure molded body in which a first electrode or its precursor is buried up to the first electrode or the precursor; (b) a step of stacking and inserting a plurality of plate-shaped metal mesh members in the hole to be parallel to the first electrode or the precursor so that an uppermost one of the metal mesh members reaches an opening of the hole; (c) a step of providing a second electrode or its precursor in the one of the surfaces of the ceramic pressure molded body to be parallel to the first electrode and in contact with the uppermost one of the metal mesh members; (d) a step of obtaining a laminated body by spreading ceramic powder on the one of the surfaces of the ceramic pressure molded body to cover the second electrode or the precursor, and performing pressure molding on the ceramic powder; and (e) a step of performing hot press calcination on the laminated body.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a vertical cross-sectional view of a wafer mounting table 10.

(2) FIG. 2 is a plan view of the wafer mounting table 10.

(3) FIG. 3 is a perspective view of a circular member 32.

(4) FIG. 4 is a cross-sectional view of a conductive section 30.

(5) FIGS. 5A to 5F show views of manufacturing steps for the wafer mounting table 10.

(6) FIG. 6 shows cross-sectional views of a plurality of stacked circular members 32 before and after hot press calcination.

(7) FIG. 7 is an explanatory view illustrating an example of use of the wafer mounting table 10.

(8) FIG. 8 is a vertical cross-sectional view of a wafer mounting table 110.

(9) FIG. 9 is a perspective view of a conductive section comprised of a metal mesh bent in zigzag.

DETAILED DESCRIPTION OF THE INVENTION

(10) A preferred embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a vertical cross-sectional view (a cross-sectional view when a ceramic substrate 12 is cut along a plane through its central axis) of a wafer mounting table 10, FIG. 2 is a plan view of the wafer mounting table 10, FIG. 3 is a perspective view of a circular member 32, and FIG. 4 is a cross-sectional view of a conductive section 30. It is to be noted that a focus ring FR is omitted in FIG. 2.

(11) The wafer mounting table 10 is used for performing CVD or etching on a wafer W by utilizing plasma, and is mounted on a chamber (not illustrated) for semiconductor process. The wafer mounting table 10 includes a first electrode 21, a second electrode 22, and the conductive section 30 inside the ceramic substrate 12.

(12) The ceramic substrate 12 is a disc-shaped plate comprised of a ceramic material represented by aluminum nitride, silicon carbide, silicon nitride, aluminium oxide, and others. The ceramic substrate 12 includes a circular wafer mounting surface 12a, a focus ring mounting surface 12b lower than the wafer mounting surface 12a by one level outwardly of the wafer mounting surface 12a, and a back surface 12c on the side opposite to the wafer mounting surface 12a. The first electrode 21 and the second electrode 22 are buried inside of the ceramic substrate 12 so as to be parallel (including the case of substantially parallel, and the same applies to the following) to the wafer mounting surface 12a with the first electrode 21 closer to the wafer mounting surface 12a than the second electrode 22. A plurality of depressions and projections which are not illustrated are formed by embossing on the wafer mounting surface 12a and the focus ring mounting surface 12b of the ceramic substrate 12. A gas (for instance, a He gas) for thermal conduction is supplied between the depressions provided in the wafer mounting surface 12a and the wafer W mounted on the wafer mounting surface 12a and between the depressions provided in the focus ring mounting surface 12b and the focus ring FR mounted on the focus ring mounting surface 12b through a gas supply path from the side of the back surface 12c, the gas supply path being not illustrated. The focus ring FR includes a step along the inner circumference of the upper end so as not to interfere with the wafer W.

(13) The first electrode 21 is a disc electrode concentric to the ceramic substrate 12, and is provided to be opposed to the wafer mounting surface 12a. The first electrode 21 is formed of a metal mesh or a metal plate with the main component of molybdenum, tungsten, or tungsten carbide. When the wafer W mounted on the wafer mounting surface 12a is electrostatically adsorbed, a DC voltage is applied to the first electrode 21. The first electrode 21 is connected to a power feed rod (not illustrated) inserted in the back surface 12c of the ceramic substrate 12, and a DC voltage is applied to the first electrode 21 via the power feed rod.

(14) The second electrode 22 is a ring-shaped electrode having an outer diameter larger than that of the first electrode 21 and concentric to the ceramic substrate 12, and is provided to be opposed to the focus ring mounting surface 12b. The second electrode 22 is formed of a metal mesh or a metal plate which is the same material as the first electrode 21. When the focus ring FR mounted on the focus ring mounting surface 12b is electrostatically adsorbed, a DC voltage is applied to the second electrode 22. The second electrode 22 is electrically connected to the first electrode 21 via the conductive section 30. Therefore, when a DC voltage is applied to the first electrode 21, a DC voltage is also applied to the second electrode 22 accordingly.

(15) The conductive section 30 is provided between the first electrode 21 and the second electrode 22, and is such that a plurality of circular members 32 (see FIG. 3) parallel to the wafer mounting surface 12a are stacked. As illustrated in FIG. 2, multiple pieces (8 pieces herein) of the conductive section 30 are provided at equal intervals along the circumferential direction of the wafer mounting table 10. The circular members 32 are formed of a metal mesh with the same material as the first electrode 21. The metal mesh preferably has a wire diameter of 0.1 to 0.5 mm, and the number of grids per inch is preferably 20 to 50. The plurality of circular members 32 are overlapped with each other on the surface. Therefore, two circular members 32 in contact with each other have a great number of point contact sections 30a (see FIG. 4). Also, a conductive path formed between the first electrode 21 and the second electrode 22 in the conductive section 30 has a length substantially equal to the distance between the first electrode 21 and the second electrode 22.

(16) Next, an example of manufacturing the wafer mounting table 10 will be described using FIGS. 5A to 5F. FIGS. 5A to 5F show explanatory views illustrating the steps of manufacturing the wafer mounting table 10.

(17) First, a disc-shaped ceramic pressure molded body 40 including the first electrode 21 is produced using ceramic powder having an average particle diameter of several “m to several 10 μm (see FIG. 5A). At this point, the first electrode 21 is made parallel to the upper surface and the lower surface of the ceramic pressure molded body 40.

(18) Subsequently, a hole 42 reaching the first electrode 21 is dug at a position where the conductive section 30 is provided in the upper surface of the ceramic pressure molded body 40 (see FIG. 5B).

(19) Subsequently, the plurality of circular members 32 are stacked parallel to the first electrode 21 and inserted in the hole 42 to form the multilayer body 34, then the mesh space of the circular members 32 is further filled with ceramic powder (see FIG. 5C). The circular members 32 are each a metal mesh, and the wire diameter and the number of grids per inch are within the above-described numerical ranges. Thus, the multilayer body 34 with the plurality of circular members 32 stacked is relatively close to a bulk (solid cylindrical body) after calcination contraction by hot press. For this reason, the ceramic powder filled in the mesh space of the circular members 32 is relatively small in amount.

(20) Subsequently, the ring-shaped second electrode 22 is placed on the upper surface of the ceramic pressure molded body 40 so as to be parallel to the first electrode 21 (see FIG. 5D). At this point, the second electrode 22 is in contact with the uppermost one of the circular members 32 in the multilayer body 34.

(21) Subsequently, the ceramic pressure molded body 40 with the second electrode 22 placed is inserted into a mold, ceramic powder is spread over the upper surface of the ceramic pressure molded body 40 so as to cover the second electrode 22, and pressure molding is performed, thereby obtaining a laminated body 44 (see FIG. 5E).

(22) Subsequently, hot press calcination is performed on the laminated body 44 (see FIG. 5F). Consequently, the ceramic powder contained in the laminated body 44 is sintered and turns into a disc-shaped ceramic substrate 46. Also, the multilayer body 34 turns into the conductive section 30. As illustrated in FIG. 6, the multilayer body 34 with the plurality of circular members 32 stacked is contracted in a vertical direction to the surface at the time of hot press calcination, thus the ceramic powder is not prevented from being sintered and contracted. Subsequently, the outer circumferential portion of the lower surface of the disc-shaped ceramic substrate 46 is polished to form a step, and thus the ceramic substrate 12 including the wafer mounting surface 12a and the focus ring mounting surface 12b is obtained.

(23) Next, an example of use of the wafer mounting table 10 will be described using FIG. 7. FIG. 7 is an explanatory view illustrating an example of use of the wafer mounting table 10.

(24) After a cooling plate 50 made of metal is mounted on the back surface 12c of the ceramic substrate 12, the wafer mounting table 10 is installed in a chamber 80. In the chamber 80, a shower head 90 is installed at the position opposed to the wafer mounting table 10.

(25) The disc-shaped wafer W is mounted on the wafer mounting surface 12a of the wafer mounting table 10, the focus ring FR is mounted on the focus ring mounting surface 12b, and a DC voltage is applied to the first electrode 21 via a power feed rod which is not illustrated. Then, a DC voltage is also applied to the second electrode 22 which is electrically connected to the first electrode 21 via the conductive section 30. Thus, the wafer W is electrostatically adsorbed to the wafer mounting surface 12a, and the focus ring FR is electrostatically adsorbed to the focus ring mounting surface 12b. The temperature of the wafer W and the temperature of the focus ring FR can be controlled by adjusting the temperature of a cooling medium supplied to a cooling medium path of the cooling plate 50 mounted on the back surface of the wafer mounting table 10, the cooling medium path being not illustrated.

(26) In this state, the inside of the chamber 80 is set to a predetermined vacuum atmosphere (or a depressurized atmosphere), and high frequency power is supplied between the cooling plate 50 and the shower head 90 to generate a plasma while a process gas is supplied from the shower head 90. Then, CVD film formation is performed and etching is performed on the wafer W by utilizing the plasma. Although the focus ring FR is also consumed along with plasma treatment of the wafer W, the focus ring FR is replaced after several pieces of the wafer W are processed because the focus ring FR has a large thickness.

(27) In the wafer mounting table 10 described above, when plasma treatment is performed on the wafer W, a high frequency current flows through the conductive section 30. The conductive section 30 is such that a plurality of circular members 32 comprised of plate-shaped metal meshes parallel to the wafer mounting surface 12a are stacked between the first electrode 21 and the second electrode 22. In the conductive section 30, a conductive path has a length substantially equal to the distance between the first electrode 21 and the second electrode 22, and moreover, the metal meshes are in contact with each other at many points, thus the impedance when a high frequency current flows is decreased as compared with the metal mesh bent in zigzag of FIG. 9, for instance. Therefore, an upper portion of the conductive section 30 can be prevented from having an abnormally high temperature, and the thermal uniformity of the wafer W becomes favorable.

(28) Also, since the material of the ceramic substrate 12 is included in the mesh space of the circular members 32, advantage in strength is achieved.

(29) Furthermore, since the conductive section 30 is produced by stacking a plurality of circular members 32 in the manufacturing steps of FIGS. 5A to 5F, the ceramic powder is not prevented from being sintered and contracted at the time of hot press calcination. In addition, the distance between the first electrode 21 and the second electrode 22 is easily controlled. The force to cause the wafer W to be adsorbed to the wafer mounting surface 12a depends on the thickness of the layer (a first dielectric layer) between the first electrode 21 and the wafer mounting surface 12a in the ceramic substrate 12, and the force to cause the focus ring FR to be adsorbed to the focus ring mounting surface 12b depends on the thickness of the layer (a second dielectric layer) between the second electrode 22 and the focus ring mounting surface 12b in the ceramic substrate 12. Although the thickness of the first dielectric layer and the thickness of the second dielectric layer often have different design values, the thickness of the first dielectric layer and the thickness of the second dielectric layer can be easily matched to the respective design values by adopting the manufacturing steps of FIGS. 5A to 5F.

(30) Moreover, since the ceramic powder is included in the mesh space of the circular members 32 in the hole 42 before hot press calcination, crack is unlikely to occur in the ceramic substrate 12 after the calcination, as compared with the case where the mesh space is hollow.

(31) It is needless to say that the present invention is not limited to the above-described embodiment in any way, and may be practiced in various modes as long as the modes belong to the technical scope of the present invention.

(32) For instance, although the second electrode 22 is a ring-shaped electrode in the above-described embodiment, a second electrode 122 may be a disc electrode, like a wafer mounting table 110 of FIG. 8, which has an outer diameter larger than that of the first electrode 21. In FIG. 8, the same components as those of the above-described embodiment are labeled with the same symbols. In the case where the first electrode 21 is a disc electrode and the second electrode 22 is a ring-shaped electrode, when the first electrode 21 is viewed from the above of the wafer mounting surface 12a, the first electrode 21 includes an overlapping portion (a portion provided with the conductive section 30) which overlaps with the second electrode 22 and a non-overlapping portion which does not overlap with the second electrode 22. Thus, there is a possibility that an effect given to the wafer W is different between the overlapping portion and the non-overlapping portion. In contrast, in the case where each of the first and second electrodes 21, 122 is a disc electrode as in FIG. 8, when the first electrode 21 is viewed from the above of the wafer mounting surface 12a, the first electrode 21 in its entirety overlaps with the second electrode 122, thus there is no such possibility.

(33) In the above-described embodiment, a resistance heating element may be buried in the ceramic substrate 12. In that case, a resistance heating element which heats the wafer W mounted on the wafer mounting surface 12a and a resistance heating element which heats the focus ring FR mounted on the focus ring mounting surface 12b may be independently provided. Alternatively, a zone for heating the wafer W may be divided into multiple subzones, and a resistance heating element may be provided in each of the subzones.

(34) In the above-described embodiment, the case has been exemplified, in which the first and second electrodes 21, 22 are used as electrostatic electrodes. However, the first and second electrodes 21, 22 may be used as an electrostatic electrode as well as an RF electrode. In this case, high frequency power is supplied between the first and second electrodes 21, 22, and the shower head 90 to generate a plasma. It is to be noted that the first and second electrodes 21, 22 may be each used as an RF electrode, not as an electrostatic electrode.

(35) In the above-described embodiment, a description has been given in which a DC voltage is applied to the first electrode 21 via a power feed rod which is inserted in the back surface 12c of the ceramic substrate 12, the power feed rod being not illustrated. However, alternatively, a DC voltage may be applied to the second electrode 22 via a power feed rod which is inserted in the back surface 12c of the ceramic substrate 12, the power feed rod being not illustrated. In this case, since the first electrode 21 is electrically connected to the second electrode 22 via the conductive section 30, when a DC voltage is applied to the second electrode 22, a DC voltage is also applied to the first electrode 21 accordingly.

(36) This application is based on and claims priority of U.S. Provisional Patent Application No. 62/576,240, filed on Oct. 24, 2017, the entire contents of which are incorporated herein by reference.