PIXEL CIRCUIT, DISPLAY PANEL AND METHOD FOR IMPROVING LOW GRAY-LEVEL UNIFORMITY FOR DISPLAY PANEL

Abstract

A pixel circuit, a display panel and a method for improving low gray-level uniformity for a display panel are provided. A feedthrough effect can be effectively reduced by increasing resistance value of a resistor line between a source of a switching thin-film transistor and a gate of a driving thin-film transistor. Low gray-level uniformity of the display panel is improved. Quality of the display panel is enhanced.

Claims

1. A pixel circuit, comprising: a first thin-film transistor, a gate of the first thin-film transistor connecting to a first node, a drain of the first thin-film transistor receiving a power supply voltage, a source of the first thin-film transistor being an output end of a driving signal; a second thin-film transistor, the gate of the second thin-film transistor connecting to a writing signal line, the drain of the second thin-film transistor connecting to a data signal line, the source of the second thin-film transistor connecting to a second node; and a resistor line, connected between the first node and the second node.

2. The pixel circuit according to claim 1, further comprising: a parasitic capacitor, a first end of the parasitic capacitor connecting to the writing signal line, a second end of the parasitic capacitor connecting to the second node; a storage capacitor, the first end of the storage capacitor connecting to the first node, the second end of the storage capacitor connecting to a third node; and a light-emitting element, an anode of the light-emitting element connecting to the third node, a cathode of the light-emitting element connecting to a common ground voltage of the circuit.

3. The pixel circuit according to claim 2, further comprising: a third thin-film transistor, the gate of the third thin-film transistor connecting to the writing signal line, the source of the third thin-film transistor connecting to the third node, the drain of the third thin-film transistor connecting to a monitoring signal line.

4. The pixel circuit according to claim 1, wherein a formula of resistance value of the resistor line is R=ρl/s, where R is the resistance value, p is electrical resistivity and s is a cross-sectional area of the resistor line.

5. The pixel circuit according to claim 1, wherein the first thin-film transistor, the second thin-film transistor and the third thin-film transistor are any one of a low temperature poly-silicon thin-film transistor, an oxide semiconductor thin-film transistor and an amorphous-silicon (a-Si) thin-film transistor.

6. The pixel circuit according to claim 1, wherein resistance value of the resistor line ranges from 900 to 1200 kΩ.

7. A display panel, comprising the pixel circuit according to claim 1, wherein low gray-level uniformity obtained during the display panel displays images is proportional to resistance value of the resistor line.

8. A method for improving low gray-level uniformity for a display panel, comprising: providing the display panel according to claim 7; and inputting a low voltage level signal to the writing signal line, switching off a writing signal of the writing signal line, lowering a voltage of the source of the second thin-film transistor, and discharging electricity of a storage capacitor to the source of the second thin-film transistor.

9. The method according to claim 8, wherein when the source of the second thin-film transistor undergoes the discharging, the resistor line generates an instantaneous current, resistance value of the resistor line increases, a divided voltage of the resistor line increases, a speed of discharging electricity of the storage capacitor is slowed down, and a decrease of a voltage of the first node becomes small.

10. The method according to claim 8, wherein when a decrease of the voltage of the first node becomes small, a voltage between the first node and the second node maintains stable and a current flowing through a light-emitting element maintains stable.

Description

DESCRIPTION OF DRAWINGS

[0023] The technical solutions and other beneficial effects of the present application will be more apparent with reference to the detailed descriptions of the embodiments of the present application below in accompanying with the drawings.

[0024] FIG. 1 is a circuit diagram illustrating a 3T1C pixel circuit in an existing art.

[0025] FIG. 2 is a diagram illustrating signal changes of a writing signal line WR in an existing art.

[0026] FIG. 3 is a circuit diagram illustrating a pixel circuit according to the present embodiment.

[0027] FIG. 4 is a diagram illustrating an equivalent circuit of X shown in FIG. 3 according to the present embodiment.

[0028] FIG. 5 is a structural schematic diagram illustrating selection of each position on the display panel according to the present embodiment.

[0029] Reference numbers of the elements in the figures are indicated below:

[0030] 1 resistor line; 2 light-emitting element; 3 monitoring signal line.

DESCRIPTION OF EMBODIMENTS OF THE DISCLOSURE

[0031] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to appended drawings of the embodiments of the present application. Obviously, the described embodiments are merely a part of embodiments of the present application and are not all of the embodiments. Based on the embodiments of the present application, all the other embodiments obtained by those of ordinary skill in the art without making any inventive effort are within the scope the present application.

[0032] In the description of the present application, it needs to be understood that the terms “first” and “second” are used for descriptive purposes only, and should not be taken to indicate or imply relative importance, or implicitly indicate the indicated number of technical features. Thus, by defining a feature with “first” or “second”, it may explicitly or implicitly include one or more features. In the description of the present application, “a plurality” means two or more unless explicitly defined.

[0033] In the description of the present application, it should be noted that unless otherwise explicitly specified or limited, the terms “installed”, “connected”, and “connection” should be construed broadly, for example, a fixed connection, a removable connection, or integrally connected. These terms may be directed to a mechanical connection, and may also be directed to an electrical connection or communication. Moreover, these terms can be directed to “directly attached”, “indirectly connected” through an intermediate medium, and may be directed to “internally communicated” with two components or the “interaction relationship” between two components. For persons skilled in the art, they can understand the specific meaning of the terms in the present application based on specific conditions.

[0034] The following disclosure provides a plurality of different embodiments or examples to implement different structures of this application. To simplify the disclosure of this application, the following describes components and settings in particular examples. Certainly, the examples are merely for illustrative purposes, and are not intended to limit this application. In addition, in this application, reference numerals and/or reference letters may be repeated in different examples. This repetition is for the purpose of simplicity and clarity, and does not in itself indicate a relationship between the various embodiments and/or settings that are discussed. In addition, this application provides examples of various particular processes and materials, but a person of ordinary skill in the art will recognize that other processes and/or materials may be applied and/or used.

[0035] The present embodiment provides a pixel circuit, which is a 3T1C pixel circuit. The pixel circuit includes a first thin-film transistor T1, a second thin-film transistor T2, a third thin-film transistor T3, a resistor line 1, a parasitic capacitor CgsT2, a storage capacitor Cst and a light-emitting element 2.

[0036] The first thin-film transistor T1 is a driving thin-film transistor (Driving TFT). The drain of the first thin-film transistor T1 receives a power supply voltage. The source of the first thin-film transistor T1 is an output end of a driving signal. Specifically, the gate of the first transistor T1 is connected to a first node Vg, the source of the first transistor T1 is connected to a second node Vs, and the drain of the first transistor T1 is connected to the power supply voltage Vdd.

[0037] The second thin-film transistor T2 is a switching transistor (Switching TFT). The drain of the second thin-film transistor T2 is connected to a data signal line and the gate of the second thin-film transistor T2 is connected to a writing signal line WR. The gate of the second transistor T2 is connected to the writing signal line WR, the source of the second transistor T2 is connected to the second node A, and the drain of the second transistor T2 is connected to the data signal line VData.

[0038] The resistor line 1 is connected between the first node Vg and the second node A. Specifically, the resistor line 1 is located between the gate of the first thin-film transistor T1 and the source of the second thin-film transistor T. In the present embodiment, a formula of resistance value of the resistor line 1 is R=ρl/s, where R is the resistance value, p is electrical resistivity and s is a cross-sectional area of the resistor line. The resistance value of the resistor line 1 ranges from 900 to 1200 kΩ.

[0039] A first end of the parasitic capacitor CgsT2 is connected to the gate of the first thin-film transistor T1 and a second end of the parasitic capacitor CgsT2 is connected to the second node A.

[0040] A first end of the storage capacitor Cst is connected to the first node Vg and a second end of the storage capacitor Cst is connected to a third node Vs. Specifically, the first end of the storage capacitor Cst is connected to a second end of the resistor line 1 and the second end of the storage capacitor Cst is connected to the source of the first thin-film transistor T1.

[0041] The anode of the light-emitting element 2 is connected to the third node Vs and the cathode of the light-emitting element 2 is connected to a common ground voltage Vss of the circuit. Specifically, the anode of the light-emitting element 2 is connected to the second end of the storage capacitor Cst and the source of the first thin-film transistor T1 and the cathode of the light-emitting element 2 is connected to the common ground voltage Vss of the circuit.

[0042] The gate of the third thin-film transistor T3 is connected to the writing signal line WR, the source of the third thin-film transistor T3 is connected to the third node Vs, and the drain of the third thin-film transistor T3 is connected to a monitoring signal line 3.

[0043] The gate of the third thin-film transistor T3 is connected to the writing signal line WR, the source of the third thin-film transistor T3 is connected to the anode of the light-emitting element 2, and the drain of the third thin-film transistor T3 is connected to the monitoring signal line 3. In other words, the gate of the third thin-film transistor T3 is connected to the writing signal line WR, the source of the third thin-film transistor T3 is connected to the second node Vs, and the drain of the third thin-film transistor T3 is connected to the monitoring signal line 3.

[0044] In the present embodiment, the first thin-film transistor T1, the second thin-film transistor T2 and the third thin-film transistor T3 are any one of a low temperature poly-silicon thin-film transistor, an oxide semiconductor thin-film transistor and an amorphous-silicon (a-Si) thin-film transistor.

[0045] The present embodiment further provides a display panel, which includes the afore-described pixel circuit, wherein low gray-level uniformity obtained during the display panel displays images is proportional to resistance value of the resistor line.

[0046] The present embodiment further provides a method for improving low gray-level uniformity for a display panel, which includes inputting a low voltage level signal to the writing signal line, switching off a writing signal of the writing signal line, lowering a voltage of the source of the second thin-film transistor, and discharging electricity of a storage capacitor to the source of the second thin-film transistor. when the source of the second thin-film transistor undergoes the discharging, the resistor line generates an instantaneous current, resistance value of the resistor line increases, a divided voltage of the resistor line increases, a speed of discharging electricity of the storage capacitor is slowed down, and a decrease of a voltage of the first node becomes small. when a decrease of the voltage of the first node becomes small, a voltage between the first node and the second node maintains stable and a current flowing through a light-emitting element maintains stable.

[0047] The method for improving low gray-level uniformity for a display panel will be described in detail below with reference to the 3T1C pixel circuit diagram shown in FIG. 3.

[0048] As shown in FIG. 4, when the source of the second thin-film transistor T2 undergoes the discharging, the resistor line 1 will generate an instantaneous current, the resistance value R of the resistor line 1 increases, the divided voltage of the resistor line 1 increases, the speed of discharging electricity of the storage capacitor Cst is slowed down, and a decrease of the voltage of the first node Vg becomes small. When a decrease of the voltage of the first node Vg becomes small, a voltage between the first node Vg and the second node maintains stable and a current flowing through the light-emitting element 2 maintains stable.

[0049] FIG. 5 is a structural schematic diagram illustrating selection of each position on the display panel according to the present embodiment. The left and right sides of the display panel are symmetric since a bidirectional (left and right) driving approach is adopted for the writing signals of the writing signal line WR.

[0050] Table 1 shows a relation between current and resistance R at each point acquired from the point positions on the display panel shown in FIG. 5.

TABLE-US-00001 TABLE 1 Gray Position Position Position Position Position Position Uniformity R(kΩ) Level 1(nA) 2(nA) 4(nA) 5(nA) 7(nA) 8(nA) (%) 0 255 316.65 331.08 316.81 331.21 317.05 331.37 97.73 128 51.44 67.62 51.22 67.54 51.50 67.66 86.18 32 0.81 3.01 0.82 3.02 0.81 3.02 42.08 10 255 317.61 331.45 317.79 331.58 318.02 331.74 97.82 128 51.72 67.71 51.51 67.63 51.78 67.75 86.38 32 0.82 3.03 0.84 3.04 0.83 3.03 42.65 100 255 325.51 334.75 325.87 334.94 325.98 335.06 98.55 128 54.09 68.56 53.99 68.53 54.16 68.60 88.08 32 0.99 3.14 1.00 3.16 1.00 3.15 47.71 1000 255 368.44 361.78 368.43 361.85 368.64 362.00 99.06 128 67.98 75.64 67.78 75.56 67.99 75.64 94.52 32 2.54 4.28 2.47 4.23 2.51 4.26 73.16

[0051] As can be seen from Table 1, the relation between the resistance R and uniformity of the current at different positions of the display panel is illustrated. Low gray-level uniformity obtained during the display panel displays images is proportional to the resistance value of the resistor line. As the resistance R gradually increases, the uniformity at each point position of the display panel is significantly improved, especially the uniformity of low gray-level points (with gray level 32). The formula used to calculate the uniformity of the display panel is that uniformity=[(Imax−Imin)/(Imax+Imin)]*100%. It can be seen by the comparison of gray levels in above table, that improvements on uniformity of gray level 32 are more obvious. Accordingly, the uniformity of the display panel can be effectively improved.

[0052] It can be seen that the increase in resistance R is beneficial to improve the uniformity of the display panel. With reference to FIG. 4, when the WR is turned off, the feedthrough effect causes the source voltage of the second thin-film transistor (Switching TFT) to drop and the storage capacitor Cst discharges electricity to the source of the Switching TFT. During the discharging, the resistor line 1 will generate the instantaneous current i, so the resistance R will occupy a divided voltage iR. Therefore, the amount of charge transferred is:

[00001]$Q=\frac{C_{\mathrm{gsT}2}*\mathrm{Cst}}{C_{\mathrm{gsT}2}+\mathrm{Cst}}\left[\Delta \left(V_1-V_4\right)-\mathrm{iR}\right]=C_{\mathrm{gsT}2}*\Delta \left(V_1-V_2\right)=\mathrm{Cst}*\Delta \left(V_3-V_4\right)$

[0053] When the resistance R increases, iR increases and Δ(V1−V4)−iR decreases, so Δ(V3−V4), i.e., Δ(Vg−Vs), decreases, and the voltage of Vg−Vs is more stable. Since the current Ioled flowing through the light-emitting element is positively correlated with the voltage of Vg−Vs, the current flowing through the OLED is more stable, that is, the influence of the feedthrough effect is reduced and the uniformity of the panel is improved.

[0054] Therefore, the present embodiment provides a pixel circuit, a display panel and a method for improving low gray-level uniformity for a display panel. Influence of the feedthrough effect can be effectively reduced by increasing the resistance value of the resistor line between the source of the second thin-film transistor (Switching TFT) and the gate of the first transistor (Driving TFT). The uniformity of the panel is improved. The formula for calculating the resistance value of the resistor line is R=ρl/s, where R is the resistance value, p is electrical resistivity and s is a cross-sectional area of the resistor line. Accordingly, when the length and the resistivity of the resistor line are fixed, those skilled in the art can adjust the resistance value of the resistor line since the resistance value increases as the thickness of the resistor line decreases. Alternatively, when the length and the thickness of the resistor line are fixed, those skilled in the art can adjust the resistance value of the resistor line since the resistance value increases as the resistivity of the resistor line increases. Alternatively, when the length of the resistor line is fixed, those skilled in the art can not only reduce the thickness of the resistor line but also increase the resistivity of the resistor line so as to increase the resistance value of the resistor line.

[0055] Compared to the existing arts, the present embodiment provides a method for improving low gray-level uniformity for a display panel without having to optimize the structure of TFT (thin-film transistor) and increase the storage capacitance, and is particularly suitable for high PPI pixel design, and the implementation is simple and is widely applicable.

[0056] Hereinbefore, a pixel circuit, a display panel and a method form improving low gray-level uniformity for a display panel provided in the embodiments of the present application are introduced in detail, the principles and implementations of the embodiments are set forth herein with reference to specific examples, descriptions of the above embodiments are merely served to assist in understanding the technical solutions and essential ideas of the present application. Those having ordinary skill in the art should understand that they still can modify technical solutions recited in the aforesaid embodiments or equivalently replace partial technical features therein; these modifications or substitutions do not make essence of corresponding technical solutions depart from the spirit and scope of technical solutions of embodiments of the present application.