Semiconductor component having a highly doped quantum structure emitter
11211512 · 2021-12-28
Assignee
Inventors
Cpc classification
H01L31/035254
ELECTRICITY
Y02E10/50
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
International classification
H01L31/00
ELECTRICITY
Abstract
A semiconductor device having a highly doped quantum structure emitter is disclosed. In an embodiment, the semiconductor device includes a quantum structure emitter. The quantum structure emitter includes of a first layer made of an undoped semiconductor material with a large band gap, a second, middle, highly doped layer made of a semiconductor material with a low band gap and a third, undoped layer made of a semiconductor material with a large band gap.
Claims
1. A semiconductor component comprising: a quantum structure emitter having a first layer made of an undoped semiconductor material with a large band gap, a second, middle, highly doped layer made of a semiconductor material with a low band gap, and a third, undoped layer made of a semiconductor material with a large band gap, wherein the quantum structure emitter forms at least a part of a first diode; and a second diode having a fourth layer, a fifth layer and a sixth layer, wherein the second diode is made of other semiconductor materials with larger or smaller band gaps than those of the first diode and is attached to the first diode, wherein the first layer and the third layer are composed of (Si.sub.yGe.sub.1-y).sub.l-xC.sub.x with 0≤y≤1 and 0.05≤x≤0.5 and the second layer is composed of Si, Ge or SiGe, wherein the fourth layer is made of SiGe with a germanium proportion of more than 30% and directly adjoins the third layer, wherein the fifth layer diode directly following the fourth layer is an intrinsic amorphous Si layer, wherein the sixth layer directly following the fifth layer is a contact layer made of highly doped a-Si, and wherein the semiconductor component is a solar cell.
2. The semiconductor component according to claim 1, wherein the band gap of the first and third layers is at least 1.5 eV, and wherein the band gap of the second layer is at most 0.9 eV and a dopant concentration is at least 5×10.sup.181/cm.sup.3.
3. The semiconductor component according to claim 2, wherein the quantum structure emitter consists essentially of the first to third layers.
4. The semiconductor component according to claim 3, wherein the first to third layers extend in a planar and continuous manner over the quantum structure emitter.
5. The semiconductor component according to claim 1, wherein each layer of the quantum structure emitter fulfills tunnel conditions.
6. The semiconductor component according to claim 5, wherein a total thickness of the quantum structure emitter is at most 10 nm such that the quantum structure emitter overall meets the tunnel conditions.
7. The semiconductor component according to claim 1, wherein the second layer is doped until degenerate.
8. The semiconductor component according to claim 1, wherein the layers of the quantum structure emitter are monocrystalline or polycrystalline.
9. The semiconductor component according to claim 1, wherein the layers of the quantum structure emitter are monocrystalline.
10. The semiconductor component according to claim 1, wherein the layers of the quantum structure emitter are polycrystalline.
11. The semiconductor component according to claim 1, wherein the second layer is composed of SiGe.
12. The semiconductor component according to claim 11, wherein the second layer is composed of SiGe with 20%-50% Ge and 5×10.sup.18 1/cm.sup.3.
13. The semiconductor component according to claim 1, wherein the second layer is Si.sub.zGe.sub.1-z with 0.6≤z≤0.9.
14. The semiconductor component according to claim 1, wherein the first layer and the third layer are composed of (Si.sub.yGe.sub.1-y).sub.1-xC.sub.x with 0.25≤y≤0.9 and 0.05≤x≤0.5.
15. The semiconductor component according to claim 1, wherein the fourth layer has a thickness between 20 nm and 80 nm, inclusive, the fifth layer has a thickness of between 10 nm and 40 nm, inclusive and the sixth layer has a thickness of between 10 nm and 40 nm, inclusive.
16. The semiconductor component according to claim 1, further comprising a transparent conductive oxide layer (TCO) directly located on the sixth layer.
17. The semiconductor component according to claim 16, further comprising an electrical contact structure directly located on the TCO layer, the electrical contact structure including Ag or Cu.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) In the following, a semiconductor component described here will be explained in more detail with reference to the drawing on the basis of exemplary embodiments. Identical reference symbols indicate the same elements in the individual figures. However, relationships true to scale are shown here, but individual elements can be illustrated in an exaggerated fashion for better understanding.
(2) In the figures:
(3)
(4)
DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
(5)
(6) Starting from a low-doped 1-2 Ω-cm n-type PV wafer 1, a quantum structure emitter 23 consisting of a triple layer 2, 3, 2 is located on a top side. The two outer layers 2 are each a layer of SiC, GeC or SiGeC. These layers 2 are distinguished above all in that they have a significantly higher band gap than Si. In the case of Si, the band gap is approximately 1.1 eV, whereas the band gap of the layers 2, as shown in
(7) It is also possible for these layers 2 to be formed, for example, of SiO.sub.2 or Al.sub.2O.sub.3 in order to form so-called tunnel barriers. This function also determines the thickness of the layers 2, which is particularly preferably less than 10 nm, in order to achieve a significant tunnel effect. Typically, the thickness of these layers 2 is between one atom monolayer and 7 nm.
(8) The middle layer 3 is made of a lower bandgap material, for example, of Si, Ge or SiGe. However, III-V semiconductor materials are also possible for this layer 3, such as InP or GaInP. The advantage of the SiGe used here is that Ge has a substantially higher absorption coefficient than Si.
(9) The middle layer 3 has two functions at the same time. On the one hand, it is intended to form a quantum well on the basis of its position and, on the other hand, it should serve as an emitter of the proposed solar cell. The position between the two tunnel barriers 2 with a large band gap leads to the formation of mini-bands or sub-bands in the quantum well. As a result, short-wavelength photons can also be converted into electron-hole pairs. It can also be assumed that multi-electron effects occur which lead to a current increase in relation to conventional solar cells towards the exterior.
(10) Therefore, this middle layer 3 is highly doped, for example, as illustrated here with boron, and thus forms a hole-conducting region. The doping should be above the degenerate, that is, the doping must be so high that the valence band EV—see the lower thick line in
(11) For example, a transparent conductive oxide, for example TCO, can be applied to the emitter layer 3 as an electrically conductive layer 5. This may be, for example, indium tin oxide, ITO for short. The rear side of the solar cell consists of a highly doped layer 4, here of the n-type, which is preferably also doped beyond the degenerate. For Si, this is the case above 2×10.sup.19 1/cm.sup.3. In this case, the layer can be monocrystalline, polycrystalline or even amorphous.
(12) In the solar cells shown in
(13) The solar cell illustrated in
(14) Therefore, the single stage solar cell of
(15) In this case, these semiconductor layers 7, 8, 9 form a second diode with a higher band gap. In this case, the layers 3, 7 form a band-to-band tunnel contact in order to electrically connect the two cells in series. This contact is designed in SiGe with a germanium proportion of more than 30% in order to increase the tunnel probability. For example, the first layer 7 is doped with As with more than 2×10.sup.19 1/cm.sup.3 and preferably has a thickness between 20 nm and 80 nm inclusive.
(16) The second semiconductor layer 8 is preferably an intrinsic, amorphous Si layer, for example, having a thickness between 10 nm and 40 nm, in particular around 20 nm. The contact layer 9 is in particular a highly doped a-Si layer, likewise with a thickness of around 20 nm, for example, of at least 10 nm and at most 40 nm. The contacts 5, 6 are formed at the top and bottom, as in
(17) Unless indicated otherwise, the components shown in the figures in each case preferably follow one another directly in the specified sequence. Layers which are not in contact in the figures are preferably spaced apart from one another. If lines are drawn parallel to one another, the corresponding surfaces are preferably likewise aligned parallel to one another. Likewise, unless indicated otherwise, the relative positions of the illustrated components with respect to one another are correctly reproduced in the figures.
(18) The invention described here is not limited by the description with reference to the exemplary embodiments. Rather, the invention comprises each novel feature and any combination of features, including, in particular, any combination of features in the claims, even if this feature or combination itself is not explicitly recited in the claims or embodiments.