ELECTROSTATIC CHUCK

Abstract

An electrostatic chuck includes a ceramic base, a ceramic dielectric layer, an electrostatic electrode, and a ceramic insulating layer. The ceramic dielectric layer is positioned on the ceramic base and is thinner than the ceramic base. The electrostatic electrode is embedded between the ceramic dielectric layer and the ceramic base. The ceramic insulating layer is positioned on the ceramic dielectric layer and is thinner than the ceramic dielectric layer. The ceramic insulating layer has a higher volume resistivity and withstand voltage than the ceramic dielectric layer, and the ceramic dielectric layer has a higher dielectric constant than the ceramic insulating layer.

Claims

1. An electrostatic chuck comprising: a ceramic base; a ceramic dielectric layer positioned on the ceramic base and being thinner than the ceramic base; an electrostatic electrode embedded between the ceramic dielectric layer and the ceramic base; and a ceramic insulating layer positioned on the ceramic dielectric layer and being thinner than the ceramic dielectric layer, wherein the ceramic insulating layer has a higher volume resistivity and withstand voltage than the ceramic dielectric layer, and the ceramic dielectric layer has a higher dielectric constant than the ceramic insulating layer.

2. The electrostatic chuck according to claim 1, wherein the ceramic insulating layer is an aerosol deposition film or a thermally sprayed film.

3. The electrostatic chuck according to claim 1, wherein a material of the ceramic dielectric layer is barium titanate or lead zirconate titanate, and a material of the ceramic insulating layer is alumina.

4. The electrostatic chuck according to claim 1, wherein the ceramic insulating layer is disposed to cover an entire surface of the ceramic dielectric layer and includes a plurality of projections supporting a wafer.

5. The electrostatic chuck according to claim 1, wherein the ceramic dielectric layer includes a plurality of projections supporting a wafer, and the ceramic insulating layer is disposed at least on top surfaces of the projections.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0018] FIG. 1 is a vertical sectional view of an electrostatic chuck according to an embodiment.

[0019] FIG. 2 is a vertical sectional view of an electrostatic chuck according to another embodiment.

[0020] FIG. 3 is a vertical sectional view of an electrostatic chuck according to still another embodiment.

[0021] FIG. 4 is a vertical sectional view of an electrostatic chuck of related art.

DETAILED DESCRIPTION OF THE INVENTION

[0022] A preferred embodiment of the present invention will be described below with reference to the drawing. FIG. 1 is a view (vertical sectional view) illustrating a step of manufacturing a wafer placement stand.

[0023] As illustrated in FIG. 1, an electrostatic chuck includes a ceramic base, a ceramic dielectric layer, an electrostatic electrode, and a ceramic insulating layer. The ceramic dielectric layer is positioned on the ceramic base and is thinner than the ceramic base. In this embodiment, the ceramic dielectric layer and the ceramic base are an integrally fired ceramic sintered body. The electrostatic electrode is embedded between the ceramic dielectric layer and the ceramic base. The ceramic insulating layer is positioned on the ceramic dielectric layer and is thinner than the ceramic dielectric layer. The ceramic insulating layer has a higher volume resistivity and withstand voltage than the ceramic dielectric layer, and the ceramic dielectric layer has a higher dielectric constant than the ceramic insulating layer.

[0024] The ceramic insulating layer may be a CVD film or PVD film, but it is preferably an AD film or a thermally sprayed film from a point of view that a thickness of the AD film or the thermally sprayed film can be relatively easily increased. In the AD film, particularly, the volume resistivity and the withstand voltage are increased for the following reason. A glass phase with low insulation is not present in the AD film at the grain boundary between raw material grains, and the AD film is equivalent to a film obtained by sintering the raw material grains. The AD film is a film formed by an AD method (including a plasma AD method). In the case of using the AD method, because ceramic grains can be deposited to form a film with an impact solidification phenomenon, there is no need of sintering the ceramic grains at a high temperature.

[0025] A material of the ceramic dielectric layer is preferably barium titanate or lead zirconate titanate, and a material of the ceramic insulating layer is preferably alumina.

[0026] In the above-described electrostatic chuck according to this embodiment, since the ceramic insulating layer has the higher volume resistivity and withstand voltage than the ceramic dielectric layer, insulation performance is held high by the ceramic insulating layer. On the other hand, since the ceramic dielectric layer has the higher dielectric constant than the ceramic insulating layer, an electrostatic attraction force increasing in proportion to the dielectric constant is increased by the ceramic dielectric layer.

[0027] As a matter of course, the present invention is in no way limited to the above-described embodiment, and the present invention can be implemented in various embodiments insofar as falling within the technical scope of the present invention.

[0028] For example, in the above-described embodiment, the ceramic insulating layer may be disposed to cover an entire surface of the ceramic dielectric layer and may include a plurality of projections supporting a wafer (see FIG. 2). Such a structure may be obtained, for example, by forming an AD film to cover the entire surface of the ceramic dielectric layer, polishing a surface of the AD film into a mirror finish surface (a surface with surface roughness Ra of, for example, 0.1 μm or less), and then forming the plurality of projections on the mirror finish surface by the AD method (including the plasma AD method). In such a case, a region of the ceramic dielectric layer where the projections are not formed remains as the mirror finish surface and hence does not become the cause of generating particles in a semiconductor process.

[0029] In the above-described embodiment, the ceramic dielectric layer may include a plurality of projections supporting the wafer, and the ceramic insulating layer may be disposed only on top surfaces of the projections (see FIG. 3). From the viewpoint of increasing the withstand voltage, however, the ceramic insulating layer preferably covers the entire surface of the ceramic dielectric layer instead of covering only the projections of the ceramic dielectric layer.

[0030] In the above-described embodiment, at least one of an RF electrode and a heater electrode (resistance heating element) may be embedded in the ceramic base.

[0031] The present application claims priority from Japanese Patent Application No. 2019-121488, filed on Jun. 28, 2019, the entire contents of which are incorporated herein by reference.