5-6 GHz wideband dual-polarized massive MIMO antenna arrays

Abstract

5-6 GHz wideband dual-polarized MIMO array antennas are disclosed. The antennas comprise a double layered PCB, a single layered PCB and a plurality of microstrip patch antennas. The microstrip patches are radiating elements which are coupled to apertures in the ground plane. The aperture coupling avoids the need for complex multi-layered boards with plated via holes. Standard SMA connectors can be used with the array antenna.

Claims

1. An antenna comprising: a first substrate; a ground plane positioned on a first side of the first substrate wherein the ground plane comprises two or more coupling apertures and two or more feed pin apertures passing through the first substrate; a micro-strip layer on a second side of the first substrate further comprising at least one pair of micro-strip elements wherein each element of the pair of micro-strip elements comprises a first end and a second end and further wherein the micro-strip element engages one of the feed pin apertures; and a second substrate positioned on the micro-strip layer of the first substrate wherein the second substrate comprises one or more patches.

2. The antenna of claim 1 wherein the ground plane further comprises a first coupling aperture and a second c-shaped coupling aperture.

3. The antenna of claim 1 wherein the pair of micro-strip elements further comprises a first leg positioned substantially perpendicular to a second leg.

4. The antenna of claim 3 wherein the first leg and the second leg have the same length.

5. The antenna of claim 3 wherein the first leg and the second leg have different lengths.

6. The antenna of claim 5 wherein the antenna is an array of coupling apertures, feed pin apertures, micro-strip elements, and patches, the array further comprises 64 antenna elements.

7. The antenna of claim 6 wherein the 64 antenna element array has >28 dBi effective peak gain.

8. The antenna of claim 1 wherein the antenna is a 5-6 GHz wideband dual-polarized MIMO array antenna.

9. The antenna of claim 1 wherein each aperture coupled patch has >7 dBi peak gain.

10. A single panel MIMO array comprising: a first substrate; a ground plane positioned on a first side of the first substrate wherein the ground plane comprises a row of aperture clusters in a first direction and a column of aperture clusters in a second direction; a micro-strip layer on a second side of the first substrate further comprising a row of micro-strip elements in a first direction and a column of micro-strip elements in a second direction wherein each element of the microstrip elements comprises a first end and a second end and further wherein each of the micro-strip elements engages a feed pin aperture of one of the aperture clusters on the ground plane; and a second substrate positioned on the micro-strip layer of the first substrate wherein the second substrate comprises a row of patches in a first direction and a column of patches in a second direction, wherein the array has an effective peak gain>28 dBi.

11. The single panel MIMO array of claim 10 wherein each aperture cluster further comprises a first coupling aperture and a second c-shaped coupling aperture.

12. The single panel MIMO array of claim 10 wherein the pair of microstrip elements have a first leg positioned substantially perpendicular to a second leg.

13. The single panel MIMO array of claim 12 wherein the first leg and the second leg have the same length.

14. The single panel MIMO array of claim 12 wherein the first leg and the second leg have different lengths.

15. The single panel MIMO array of claim 10 wherein the array is 64 antenna elements.

16. The single panel MIMO array of claim 10 wherein the antenna is a 5-6 GHz wideband dual-polarized MIMO array antenna.

17. The single panel MIMO array of claim 10 wherein each aperture coupled patch has >7 dBi peak gain.

18. A system comprising: a mounting device further comprising a first surface engaging a plurality of SMA connectors, a pair of arms, and a cable holder positioned between the pair of arms, an antenna comprising a first substrate, a ground plane positioned on a first side of the first substrate wherein the ground plane comprises two or more coupling apertures and two or more feed pin apertures passing through the first substrate, a micro-strip layer on a second side of the first substrate further comprising at least one pair of micro-strip elements wherein each element of the pair of micro-strip elements comprises a first end and a second end and further wherein the micro-strip element engages one of the feed pin apertures, and a second substrate positioned on the micro-strip layer of the first substrate wherein the second substrate comprises one or more patches wherein the antenna engages the first surface of the mounting device; and a plurality of cables.

19. An antenna comprising: a first substrate; a ground plane disposed on a first side of the first substrate, the ground plane comprising a plurality of aperture clusters, each aperture cluster comprising at least a coupling aperture and a pair of feed pin apertures passing through the first substrate; a plurality of pairs of microstrip elements disposed on a second side of the first substrate, each pair of microstrip elements located opposite an aperture cluster, each microstrip element of the pairs of microstrip elements being connected to a different one of the pair of feed pin apertures of the opposing aperture cluster; and a second substrate comprising one or more patches, the plurality of pairs of microstrip elements disposed between the ground plane and the second substrate.

20. The antenna of claim 19, wherein each of the one or more patches on the second substrate is vertically aligned with an aperture cluster and the pair of microstrip elements opposite the aperture cluster.

21. The antenna of claim 20, wherein each patch extends over at least a portion of the coupling aperture in the aperture cluster with which the patch is aligned.

22. The antenna of claim 20, wherein the feed pin apertures of each of the aperture clusters are located outward of the patch vertically aligned with that aperture cluster, such that the patch does not extend over the feed pin apertures.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The novel features of the invention are set forth with particularity in the appended claims. A better understanding of the features and advantages of the present invention will be obtained by reference to the following detailed description that sets forth illustrative embodiments, in which the principles of the invention are utilized, and the accompanying drawings of which:

(2) FIG. 1A illustrates the front of the lower substrate of an antenna array according to the disclosure;

(3) FIG. 1B illustrates the detail of micro-strip radiating features on the lower substrate of an antenna array according to the disclosure;

(4) FIG. 1C illustrates the back of the lower substrate of an antenna array according to the disclosure;

(5) FIG. 2 illustrates the back of the upper substrate of an antenna array according to the disclosure;

(6) FIG. 3A illustrates the combined patch/micro-strip radiating features of an antenna array from a top view according to the disclosure;

(7) FIG. 3B is an exploded view of the layers of the antenna array according to the disclosure;

(8) FIG. 4 is a plot of simulated return loss of an antenna array according to the disclosure;

(9) FIG. 5 is a plot of simulated voltage standing wave ratio (VSWR) of an antenna according to the disclosure;

(10) FIG. 6 is a plot of simulated isolation between two ports of an antenna in an antenna array according to the disclosure;

(11) FIG. 7 is a plot of simulated isolation between two antennas of an antenna array according to the disclosure;

(12) FIG. 8 is a plot of simulated efficiency of an antenna array according to the disclosure;

(13) FIG. 9 is a plot of simulated peak gain of an antenna array according to the disclosure;

(14) FIG. 10 is a plot of simulated average gain of an antenna array according to the disclosure; and

(15) FIGS. 11A-B illustrate a mounted antenna array.

DETAILED DESCRIPTION

(16) Disclosed are microstrip patch antennas. The microstrip patch antennas are stacked, aperture-coupled patch antenna arrays with dual-polarization and multiple-input, multiple-output (MIMO) architecture. The antenna array incorporates 64 antenna elements, arranged in a symmetrical array. Other symmetrical array configurations can be used in Massive MIMO architecture. A single stacked patch in this array can be used as a high gain broadband patch solution. This can be expended into a modular design with an unlimited number of antennas in the array. Each antenna element incorporates two ports for dual polarization. With 64 antenna elements, the result is a 128-antenna wireless antenna system.

(17) The disclosed antenna array utilizes a double layered printed circuit board (PCB) and a single layered PCB with no vias. An aperture coupled-feed with a two-layer substrate stack is provided for increased bandwidth. The antenna is dual linear polarized which allows the antenna to transmit on one polarization and receive on another, opposing, polarization. This configuration results in zero interference between transmitting and receiving signals. The microstrip patches are used as radiating elements which are coupled with apertures in the ground plane to excite radiation in a desired frequency. Thus, the design allows for phase shift needed for beam steering and is suitable for 5G applications where high gain directive beams can be used to address high-bandwidth demands. The disclosed antenna array uses aperture coupling forms of excitation (which is non-contact) which avoids the need to provide complex multi-layered boards.

(18) The disclosed antenna array can be used with standard off-the-shelf SubMiniature Version A (SMA) connectors, along with common soldering techniques as a result of the aperture coupling feed structure. SMA pins can be easily accessed and soldered to the microstrip feed lines. The SMA connectors can also be bolted to a conductive back panel with the pin extended though the optimized airgap between substrates to be soldered onto the microstrip feed lines. The back plate is grounded to the PCB ground layer by conductive spaces fixed between the conductive back panel and the PCB. This allows the SMA connectors to bear the weight of RF cables leading from each antenna port. The conductive back plate also acts as a reflector, increasing the gain of each directive antenna element.

(19) The stacked substrate design enables ultra-wide bandwidth (UWB) coverage, e.g. 1 GHz 10 dB instantaneous bandwidth, with the aperture coupling design allowing greater peak gain per antenna versus that of a typical patch antenna. The massive MIMO architecture allows for data to be transmitted and received over multiple antennas which increases coverage and capacity gain with no additional power or bandwidth requirement.

(20) The disclosed antenna array comprises a two-layer substrate stack consisting of a first substrate (e.g., lower substrate) and a second substrate (e.g., an upper substrate). Each of the two substrates is illustrated as square and substantially planar with a substantially uniform thickness. The length and width of the lower substrate can be identical to the length and width of the upper substrate. The lower substrate is formed of dielectric material with copper cladding, an example of which is double-layered Rogers 4750 board. The back side of the lower substrate forms the ground plane; it contains an array of apertures, a number of which facilitate the passage of pin-mount SMA connectors to elements on the front side of the lower substrate. The front side of the lower substrate contains an array of metal micro-strip lines which serve as radiating elements. The upper substrate is a single-layer dielectric material. The back side of the upper substrate contains an array of radiating metal patches, whose step-size matches that of the metal micro-strip lines on the lower substrate. The back side of the upper substrate is aligned with and secured to the front side of the lower substrate so that the radiating features on each substrate align, forming an array of combined patch/micro-strip radiating features.

(21) Turning now to FIG. 1A, a front surface of a lower substrate 100 of an exemplar antenna array according to the disclosure is illustrated. The lower substrate 100 is a dielectric with copper cladding, such as a double layered PCB 101. In this embodiment lower substrate 100 is square and substantially planar, with a first lower substrate side 102, a second lower substrate side 104, a third lower substrate side 106 and a fourth lower substrate side 108, numbered clockwise as viewed from above. A reference coordinate system 112 is provided to assist in description of the disclosure. The first lower substrate side 102 and third lower substrate side 106 are parallel to each other at an end and aligned with the x-axis of reference coordinate system 112. The second lower substrate side 104 and fourth lower substrate side 108 are parallel each other and perpendicular to the first lower substrate side 102 and the third lower substrate side 106 and aligned with the y-axis of reference coordinate system 112. Other relationships of the substrate sides can be employed without departing from the scope of the disclosure.

(22) Upon the lower substrate front surface 110, resides a plurality of micro-strip pair 114 elements. The micro-strip pair 114 elements are shown arranged on the lower substrate front surface 110 in a square, orthogonal array whose row and column axes are aligned, respectively, with the x- and y-axes of reference coordinate system 112. Other configurations can be used without departing from the scope of the disclosure. The micro-strip pair 114 elements are regularly and uniformly spaced across both row and column dimensions. As illustrated, the micro-strip pair 114 elements number eight per array row 116 and eight per array column 117. There are eight array rows 116 on lower substrate front surface and eight array columns 117, resulting in a total of sixty-four micro-strip pair 114 elements in the array on lower substrate front surface 110.

(23) FIG. 1B illustrates the details of an example of a micro-strip pair 114 on the lower substrate 100 of an antenna array according to the disclosure. The micro-strip pair 114 includes a short micro-strip 120 and a long micro-strip 122. Both the short micro-strip 120 and the long micro-strip 122 are L-shaped and either or both are made of metal. The legs 121, 121′ of the short micro-strip 120 are of equal length, while the long micro-strip 122 has a short leg 123 which is approximately 15% greater than the leg length of the short micro-strip 120 and a long leg 123′ which is, for example, approximately 31% greater than the leg of the short micro-strip 120. At one end of each leg of both the short micro-strip 120 and the long micro-strip 122 is a feed-pin aperture 124. As is evident in FIG. 1B, the short micro-strip 120 and the long micro-strip 122 are arranged in staggered fashion such that the long micro-strip 122 is located beneath and to the right of the short micro-strip 120 when viewed in the context established in FIG. 1A. Note that the feed-pin aperture 124 is at opposite ends of the micro-strip pair 114. The whole array can be scaled to operate at any frequency. As an example, for a center frequency of operation of 5.5 GHz, the microstrip feed line elements can have a thickness of about 2.3 mm.

(24) FIG. 1C illustrates the back surface of the lower substrate 100 of the double layered PCB 101 of an exemplar antenna array according to the disclosure. As described in FIG. 1A, the lower substrate 100 is illustrated as square and substantially planar, with a first lower substrate side 102, a second lower substrate side 104, a third lower substrate side 106 and a fourth lower substrate side 108, numbered counter-clockwise as viewed from above. Upon lower substrate 100 back surface 126, resides the backside aperture clusters 130. The backside aperture clusters 130 are arranged on the lower substrate 100 back surface 126 in a square, orthogonal array whose row and column axes are aligned, respectively, with the x- and y-axes of reference coordinate system 112. Each backside aperture cluster 130 consists of a pair of feed-pin apertures 124 (which pass through the lower substrate as shown in FIG. 1B), a first coupling aperture 132 and a second coupling aperture 134. The first coupling aperture 132 can be rectangular, as illustrated. Alternative configurations include, but are not limited to c-slot, l-slot, -slot, curved slot, etc. The second coupling aperture 134 can be c-shaped, as illustrated. The first coupling aperture 132 has its long axis aligned with the x-axis; the second coupling aperture 134 has its long axis aligned with the y-axis. As viewed from above, the second coupling aperture 134 is positioned beneath and to the right of midpoint of the long axis of the first coupling aperture 132. The backside aperture clusters 130 are regularly and uniformly spaced across both row and column dimensions, numbering eight per array row 116 and eight per column row 117, and resulting in a total of sixty-four of the backside aperture clusters 130 in the array on lower substrate 100 back surface 126. The whole array can be scaled with frequency. As an example, with a center frequency of 5.5 GHz, the patch sizes can have a diameter of about 20 mm. The size of the patches, apertures and microstrip lines also depends on substrate selection.

(25) FIG. 2 illustrates the back of the upper substrate 200 having a single layered PCB 201 of an exemplar antenna array according to the disclosure. In this embodiment, the upper substrate 200 is square and planar, with overall dimensions matching those of lower substrate 100 (FIG. 1A). Upper substrate 200 has a first upper substrate side 202, a second upper substrate side 204, a third upper substrate side 206 and a fourth upper substrate side 208, numbered counter-clockwise as viewed from above. First upper substrate side 202 and second upper substrate side 204 are aligned with the x-axis of reference coordinate system 112; third upper substrate side 106 and fourth upper substrate side 108 are aligned with the y-axis of reference coordinate system 112. Upon upper substrate back surface 210, reside the metal patch elements 212. The metal patch elements 212 are arranged on the upper substrate back surface 210 in a square, orthogonal array whose row and column axes are aligned, respectively, with the x- and y-axes of reference coordinate system 112. The metal patch elements 212 are regularly and uniformly spaced across both row and column dimensions, matching exactly the spacing of micro-strip pair 114 elements (FIG. 1A). There are eight array rows 216 and eight columns 217 on upper substrate front surface, resulting in a total of sixty-four of the metal patch elements 212 in the array on upper substrate back surface 210.

(26) FIG. 3A illustrates the combined patch/micro-strip radiating features of an exemplar antenna array according to the disclosure. For reference, first lower substrate side 102, second lower substrate side 104, third lower substrate side 106 and fourth lower substrate side 108, numbered clockwise as viewed from above are called out as are first upper substrate side 202, second upper substrate side 204, third upper substrate side 206 and fourth upper substrate side 208. Note the exact alignment of first lower substrate side 102 and first upper substrate side 202; second lower substrate side 104 and second upper substrate side 204; third lower substrate side 106 and third upper substrate side 206; and fourth lower substrate side 108 and fourth upper substrate side 208. Each micro-strip pair 114 element combines with its corresponding metal patch elements 212 to form patch/micro-strip element 302, of which there are sixty-four in the antenna array. The patch elements are positioned so that they are over at least one end of a micro-strip element when the layers are stacked.

(27) To characterize performance of the antenna array, a number of simulations were performed for an exemplar 2×1 antenna array with four ports. Because each antenna element is identical in the disclosed 8×8 array, it is expected that many data curves will overlap almost exactly. This characteristic is borne out in results of the simulation. Furthermore, it is expected that the results of the simulation for a 2×1 array may be extended to those for the 8×8 antenna array of the disclosure.

(28) FIG. 3B is an exploded view of the layers of the antenna array. A bottom layer 310 is provided which is positioned on a bottom surface of a two-sided substrate 320. A top surface of the two-sided substrate 320 has a top layer 330. A one-sided substrate 340 is then positioned next. The one-sided substrate 340 has an upper layer 350.

(29) The bottom layer 310 has backside aperture cluster 130 which consist of a pair of feed-pin apertures 124, a first coupling aperture 132 and a second coupling aperture 134. The two-sided substrate 320 has feed-pin apertures 124 that pass from the bottom layer 310 to the top layer 330. The top layer 330 has a plurality of micro-strip pair 114 elements. The upper layer 350 has metal patch elements 212.

(30) TABLE-US-00001 TABLE 1 Exemplar Dimensions Layer Length (mm) Width (mm) Thickness (mm) Bottom Layer 315 315 0.033 Two-sided substrate 315 315 0.8 Top Layer 315 315 0.033 One-sided substrate 315 315 0.8 Upper Layer 315 315 0.033
As will be appreciated by those skilled in the art, the dimensions provided in Table 1 are provided as an example of dimensions for purposes of illustration. The dimensions can be scaled up or down depending on a variety of factors including, but not limited to, desired frequency and substrate material used.

(31) FIG. 4 is a plot of the simulated return loss from 4 GHz to 8 GHz for a 2×1 antenna array. Traces on the plot represent results for antenna 1 port 1 return loss 410, antenna 1 port 2 return loss 420, antenna 2 port 1 return loss 430 and antenna 2 port 2 return loss 440. Note that the results for antenna 1 port 1 return loss 410 and antenna 2 port 1 return loss 430 are almost identical, deviating from one another only slightly from approximately 5.1 GHz to approximately 5.8 GHz. The results for antenna 1 port 2 return loss 420 and antenna 2 port 2 return loss 440 are so close as to be indistinguishable on the plot.

(32) FIG. 5 is a plot of the simulated VSWR from 4 GHz to 8 GHz for a 2×1 antenna array according to the disclosure. Traces on the plot represent results for antenna 1 port 1 VSWR 510, antenna 1 port 2 VSWR 520, antenna 2 port 1 VSWR 530 and antenna 2 port 2 VSWR 540. Note that the results for antenna 1 port 1 VSWR 510 and antenna 2 port 1 VSWR 530 are so close as to be indistinguishable on the plot, as are the results for antenna 1 port 2 VSWR 520 and antenna 2 port 2 VSWR 540.

(33) FIG. 6 is a plot of the simulated port-to-port isolation for each 2-port antenna from 4 GHz to 8 GHz in a 2×1 antenna array according to the disclosure. Traces on the plot represent results for antenna 1: port 1/port 2 isolation 610, and antenna 2: port 1/port 2 isolation 620. In the 5 GHz-6 GHz frequency domain, antenna 1: port 1/port 2 isolation 610 ranges from approximately −17.9 dB at 6.0 GHz to approximately −19.9 dB at approximately 5.4 GHz. Similarly, antenna 2: port 1/port 2 isolation 620 ranges from approximately −18.1 dB at 6.0 GHz to approximately −19.7 dB at approximately 5.45 GHz within the 5 GHz-6 GHz frequency domain.

(34) FIG. 7 is a plot of the simulated isolation between the two 2-port antennas from 4 GHz to 8 GHz in a 2×1 antenna array according to the disclosure. Traces on the plot represent results for antenna 1 port 1/antenna 2 port 1 isolation 710, antenna 1 port 1/antenna 2 port 2 isolation 720, antenna 1 port 2/antenna 2 port 1 isolation 730 antenna 1 port 2/antenna 2 port 2 isolation 740. In the 5 GHz-6 GHz frequency domain, the order of isolation of the antenna/port pairs from greatest to least is antenna 1 port 2/antenna 2 port 1 isolation 730, followed by antenna 1 port 1/antenna 2 port 2 isolation 720, followed, in turn by antenna 1 port 2/antenna 2 port 2 isolation 740, and finishing with antenna 1 port 1/antenna 2 port 1 isolation 710, which exhibits the least isolation of any of the antenna/port pairs.

(35) FIG. 8 is a plot of the simulated efficiency from 4 GHz to 8 GHz for a 2×1 antenna array according to the disclosure. Traces on the plot represent results for antenna 1 port 1 efficiency 810, antenna 1 port 2 efficiency 820, antenna 2 port 1 efficiency 830, and antenna 2 port 2 efficiency 840. Note that the results for antenna 1 port 1 efficiency 810 and antenna 2 port 1 efficiency 830 are so close as to be indistinguishable on the plot, as are the results for antenna 1 port 2 efficiency 820 and antenna 2 port 2 efficiency 840. In the 5 GHz-6 GHz frequency domain, antenna 1 port 1 efficiency 810 and antenna 2 port 1 efficiency 830, range from a maximum value of approximately 84% at 5.2 GHz to a minimum value of approximately 75% at 6.0 GHz. Similarly, antenna 2 port 1 efficiency 830 and antenna 2 port 2 efficiency 840, range from a maximum value of approximately 85% at 5 GHz to a minimum value of approximately 80% at 6.0 GHz.

(36) FIG. 9 is a plot of the simulated peak gain from 4 GHz to 8 GHz for a 2×1 antenna array according to the disclosure. Traces on the plot represent results for antenna 1 port 1 peak gain 910, antenna 1 port 2 peak gain 920, antenna 2 port 1 peak gain 930, and antenna 2 port 2 peak gain 940. Antenna 1 port 1 peak gain 910 reaches a maximum value of approximately 7.9 dB at approximately 5.6 GHz. Antenna 1 port 2 peak gain 920 reaches a maximum value of approximately 8.4 dB at approximately 5.75 GHz. Antenna 2 port 1 peak gain 930 reaches a maximum value of approximately 8.0 dB at approximately 5.75 GHz. Antenna 2 port 1 peak gain 940 reaches a maximum value of approximately 8.6 dB at approximately 5.75 GHz.

(37) FIG. 10 is a plot of the simulated average gain from 4 GHz to 8 GHz for a 2×1 antenna array according to the disclosure. Traces on the plot represent results for antenna 1 port 1 average gain 1010, antenna 1 port 2 average gain 1020, antenna 2 port 1 average gain 1030, and antenna 2 port 2 average gain 1040. Note that the results for antenna 1 port 1 average gain 1010 and antenna 2 port 1 average gain 1030 are almost identical, deviating from one another only slightly. In addition, the results for antenna 1 port 2 average gain 1020 and antenna 2 port 2 average gain 1040 are so close as to be indistinguishable on the plot. Antenna 1 port 1 average gain 1010 and antenna 2 port 1 average gain 1030, range from a maximum value of approximately −0.75 dB at approximately 5.2 GHz to a minimum value of approximately −1.3 dB at 6.0 GHz. Similarly, antenna 2 port 1 average gain 1030 and antenna 2 port 2 average gain 1040, range from a maximum value of approximately −0.7 dB at 5.0 GHz to a minimum value of approximately −1.0 dB at 6.0 GHz.

(38) In operation, the antenna array is dual linear polarized to transmit on one polarization and receive on an opposite polarization. This results in zero interference between the transmitting signals and the received signals. The microstrip patches act as the radiating elements. The microstrip patches are coupled with the apertures in the ground plane to excite radiation in a desired frequency, this allows the antenna array to provide phase shift needed for beam steering. The metal backplate mechanically holds the weight of 128 low loss RF cables and acts as a reflector to the existing radiation to improve directionality and gain of each individual antenna element. The stacked substrate design allows for an ultra-wide band coverage allowing >7 dBi peak gain per antenna. An 8×8 element panel, as illustrated has >28 dBi effective peak gain. This gain can be increased with the use of a conductive plate reflector mounted behind the PCB panels.

(39) FIGS. 11A-B illustrate a mounted antenna. In this configuration, the antenna array is secured to a U-shaped frame 1170. A plurality of SMA connectors 1140 are positioned along the bottom of the U-shaped frame 1170. A cable holder 1110 is positioned towards the open end of the U-shaped frame 1170. The first substrate 1150 and the second substrate 1160 are positioned below the bottom of the U-shaped frame 1170. The first substrate 1150 and the second substrate 1160 correspond to the substrates shown in FIG. 3. As will be appreciated by those skilled in the art, the upper layer shown in FIG. 3B is not readily visible this view because the thickness of the layer compared to the substrate is very thin.

(40) The cable holder 1110 can be a plastic support for the cables that connect to each SMA connector 1140. As shown above, the system can have, for example, 128 cables. Each cable would lead to a separate radio for each antenna and the cable holder 1110 is configured to support cable ties for the cables, thus allowing the cables to be secured and neatly positioned. As will be appreciated by those skilled in the art, there is no shape limitation to the cable holder 1110. Other shapes can be employed if the size and/or volume of the shape will serve the desired function. For example, where the size and shape can be used to secure a conductive back panel and hold the weight of each cable. A metal flap can optionally be provided which is used to mount the entire holder to a pole mount.

(41) While preferred embodiments of the present invention have been shown and described herein, it will be obvious to those skilled in the art that such embodiments are provided by way of example only. Numerous variations, changes, and substitutions will now occur to those skilled in the art without departing from the invention. It should be understood that various alternatives to the embodiments of the invention described herein may be employed in practicing the invention. It is intended that the following claims define the scope of the invention and that methods and structures within the scope of these claims and their equivalents be covered thereby.