Abstract
A CCD photodetector and an associated method for operation. A CCD photodetector for LIDAR systems is described, including a shift register including a plurality of consecutively situated register cells, including a first register cell and a last register cell, a loading line for loading the shift register, and a read-out amplifier for unloading the shift register, the loading line and the read-out amplifier each being connected to the first register cell. A corresponding method for operating a CCD photodetector is also described.
Claims
1-9. (canceled)
10. A CCD photodetector, comprising: a shift register including a plurality of consecutively situated register cells, the consecutively situated register cells including a first register cell and a last register cell; a loading line for loading the shift register; and a read-out amplifier for unloading the shift register, the loading line and the read-out amplifier each being connected to the first register cell.
11. The CCD photodetector as recited in claim 10, wherein adjoining read-out amplifiers are alternately connected to different ends of respectively assigned shift registers from shift registers situated next to one another.
12. The CCD photodetector as recited in claim 10, wherein a read-out amplifier is connected to at least two shift registers situated next to one another.
13. A method for operating a CCD photodetector, wherein a shift register assigned to a read-out amplifier includes a plurality of consecutively situated register cells, the consecutively situated register cells including a first register cell and a last register cell, the method comprising: loading the shift register from a loading line via the first register cell during an illumination phase; and unloading the shift register into a read-out amplifier via the first register cell during a read-out phase.
14. The method as recited in claim 13, wherein adjoining read-out amplifiers are alternately connected to different ends of respectively assigned shift registers from shift registers situated next to one another.
15. The method as recited in claim 13, wherein a first read-out amplifier is connected to at least two shift registers situated next to one another, and, during the read-out phase, the shift registers are alternately unloaded per register cell, or alternately in respective groups made up of multiple register cells, into the first read-out amplifier.
16. The method as recited in claim 13, wherein, during the read-out phase, an A/D converter connected to the read-out amplifier digitizes, alternately to a rising edge and to a falling edge, charge packets contained in the register cells.
17. The method as recited in claim 16, wherein a reduction of bit depth of the A/D converter occurs at low signal levels of the read-out amplifier.
18. A LIDAR system, comprising: a CCD photodetector, wherein a shift register assigned to a read-out amplifier includes a plurality of consecutively situated register cells, the consecutively situated register cells including a first register cell and a last register cell, the CCD photodetector configured to: load the shift register from a loading line via the first register cell during an illumination phase; and unload the shift register into a read-out amplifier via the first register cell during a read-out phase.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Exemplary embodiments of the present invention are described in greater detail based on the figures and the description below.
[0025] FIG. 1 shows a schematic representation of a method for operating a CCD according to the related art.
[0026] FIG. 2 shows a schematic representation of a first specific embodiment of a method according to the present invention for operating a CCD.
[0027] FIG. 3 shows a schematic representation of a second specific embodiment of a method according to the present invention for operating a CCD.
[0028] FIG. 4 shows a schematic representation of a third specific embodiment of a method according to the present invention for operating a CCD.
[0029] FIG. 5 shows a schematic representation of a fourth specific embodiment of a method according to the present invention for operating a CCD.
DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS
[0030] FIG. 1 shows a schematic representation of a method for operating a CCD according to the related art. A shift register 100 includes a plurality of consecutively situated register cells, including a first register cell 10 and a last register cell 20. In the related art, the loading of shift register 100 takes place from a loading line via last register cell 20 during an illumination phase A. In contrast, during a read-out phase B, the unloading of shift register 100 into read-out amplifier SF takes place via first register cell 10. The loading and read-out directions thus do not differ, i.e., the running direction of the respective “bucket brigade” remains the same in both phases. The individual charge packets are thus “pushed through” the shift register in one direction. Adjoining read-out amplifier SF, a noise suppressor CDS and an analog-to-digital converter A/D are additionally indicated. Together, they form a read-out electronic system 200.
[0031] FIG. 2 shows a schematic representation of a first specific embodiment of a method according to the present invention for operating a CCD. In contrast to the representation in FIG. 1, the loading of shift register 100 from a loading line takes place via first register cell 10 during an illumination phase A. The unloading of shift register 100 into read-out amplifier SF during a read-out phase B also takes place via first register cell 10. Adjoining read-out amplifier SF, a noise suppressor CDS and an analog-to-digital converter A/D are also additionally plotted as components of a read-out electronic system 200.
[0032] FIG. 3 shows a schematic representation of a second specific embodiment of a method according to the present invention for operating a CCD. Again, the loading of shift register 100 from a loading line, and the unloading of shift register 100 into read-out amplifier SF, take place via the same end of shift register 100. Adjoining read-out amplifiers SF are alternately connected to different ends of respectively assigned shift registers 100 from shift registers 100 situated next to one another. A corresponding CCD thus includes multiple read-out amplifiers SF including assigned shift registers 100, in the representation exactly one shift register 100 being assigned to a respective read-out amplifier SF. Such an offset arrangement of read-out amplifiers SF enables a higher integration density, and thus smaller, less noise-sensitive shift registers 100.
[0033] FIG. 4 shows a schematic representation of a third specific embodiment of a method according to the present invention for operating a CCD. The loading of shift register 100 from a loading line, and the unloading of shift register 100 into read-out amplifier SF again take place via the same end of the shift register. In this specific embodiment, a read-out amplifier SF is connected to at least two shift registers 100 situated next to one another. During read-out phase B, shift registers 100 are alternately unloaded in respective groups made up of multiple register cells aa, a′a′, bb, b′b′, . . . into read-out amplifier SF. In the representation, initially the first two register cells a of upper shift register 100 are unloaded in a first step, by way of example, into read-out amplifier SF, and thereafter the first two register cells a′ of lower shift register 100 are unloaded into read-out amplifier SF. This unloading is then continued accordingly with the next group of register cells b in upper shift register 100. As an alternative, shift registers 100 may also be alternately unloaded per register cell into read-out amplifier SF.
[0034] FIG. 5 shows a schematic representation of a fifth specific embodiment of a method according to the present invention for operating a CCD. This is a combination of the two above-described specific embodiments. In the representation, two adjoining read-out amplifiers SF are in each case connected to two assigned shift registers 100, read-out amplifiers SF alternately being connected to different ends of the respectively assigned two-of-four shift registers 100. During read-out phase B, shift registers 100 belonging to a read-out amplifier SF are alternately unloaded in respective groups made up of multiple register cells a, b, c; a′, b′, c′ into the associated read-out amplifier SF. As an alternative, in the process shift registers 100 may also be alternately unloaded per register cell into read-out amplifier SF.
