METHOD FOR LAYERED ENCODING UNDER HIGH DIMENSIONAL MODULATION

20210384920 · 2021-12-09

    Inventors

    Cpc classification

    International classification

    Abstract

    A layered coding method based on high order modulation comprising: S1: inputting serial data flow from a serial data input end into a serial-to-parallel converter; S2: inputting the data flow treated by the serial-to-parallel converter into the a multi-layer coder; S3: correlating the coders at individual layers with each other and transmitting information based on high order modulation; S4: inputting the data flow treated by the coders at individual layers into a modulator for modulation mapping processing; S5: outputting the data flow from the output end of the modulator. By means of correlating coders at layers with each other, the coder at each layer can code the data of its own layer while transmitting the data to the coder at a higher layer for protection, until reaching the coder at the highest layer, improving the coding rate, error correcting ability and data processing performance in a multi-layer coder

    Claims

    1. A layered coding method based on high order modulation, characterized in comprising the following steps: Step S1: inputting serial data flow from a serial data input end into a serial-to-parallel converter; Step S2: inputting the data flow treated by the serial-to-parallel converter into a multi-layer coder; Step S3: correlating the coders at individual layers with each other and transmitting information based on high order modulation; Step S4: inputting the data flow treated by the coders at individual layers into a modulator for modulation mapping processing; Step S5: finally outputting the data flow from the output end of the modulator.

    2. The layered coding method based on high order modulation according to claim 1, characterized in that, in Step S1, the serial data input end is used for supplying serial data flow of data bit sequence; and the serial-to-parallel converter is used for converting the serial data flow of data bit sequence into a parallel data flow.

    3. The layered coding method based on high order modulation according to claim 1, characterized in that, in Step S2, the multi-layer coder comprises a base layer processor and at least one enhancement layer processor; and the enhancement layer processor comprises an enhancement layer coder and at least two reference processing units.

    4. The layered coding method based on high order modulation according to claim 1, characterized in that, in Step S3, in the multi-layer coder, a coder at a lower layer needs to code the data of its own layer; and sends the information of the coder to a coder at a higher layer; and the coder at a higher layer needs to code both the data of its own layer and the coding information of the lower layer and sends the information of the coder of its own layer to the coder at a further higher layer, until reaching the coder at the highest layer.

    5. The layered coding method based on high order modulation according to claim 1, characterized in that, the number of the layers of the multi-layer coder is no less than 3.

    6. The layered coding method based on high order modulation according to claim 1, characterized in that, the coder comprises a non-systematic convolutional coder and a systematic convolutional coder; and both the non-systematic convolutional coder and the systematic convolutional coder are expressed by an octal number.

    7. The layered coding method based on high order modulation according to claim 1, characterized in that, in Step 4, the modulation mapping processing is used for processing the data flow into a high frequency signal to perform signal transmission.

    Description

    BRIEF DESCRIPTION OF THE DRAWINGS

    [0024] For the purpose of more dearly explaining the technical solutions according to the embodiments of the present application, the attached drawings required for describing the embodiments will be briefly described. It is apparent that, the drawings as described below show only some of the embodiments of the present application, and other drawings based on these can be obtained by those skilled in the art without paying any inventive labor.

    [0025] FIG. 1 shows the basic coding structure of layered coding based on high order modulation;

    [0026] FIG. 2 shows a non-systematic convolutional coder with rate ½ (15,13) according to embodiment 1 of the present application;

    [0027] FIG. 3 shows a systematic convolutional coder with rate ½ (15,13) according to embodiment 2 of the present application;

    [0028] FIG. 4 shows a ((15, 13), 12, (15, 13)) non-systematic code according to embodiment 3 of the present application;

    [0029] FIG. 5 shows a ((15, 13), 12, (15, 13)) systematic two-layer coder according to embodiment 3 of the present application;

    [0030] FIG. 6 is a diagram showing the result of computer simulation of a two-layer coding scheme taking quaternary continuous phase 4CPFSK modulation as an example.

    DETAILED DESCRIPTION

    [0031] The technical solutions according to the embodiments of the present application will be clearly and completely described below in connection with the drawings of the embodiments. It is apparent that, the embodiments as described are only part, but not all, of the embodiments of the present application. Based on the embodiments of the present application, all the other embodiments made by those skilled in the art without paying any creative labor shall fall within the scope of protection of the present application.

    [0032] Referring to FIG. 1, the present application provides a layered coding method based on high order modulation, which comprises the following steps:

    [0033] Step S1: inputting serial data flow from a serial data input end into a serial-to-parallel converter;

    [0034] Step S2: inputting the data flow treated by the serial-to-parallel converter into a multi-layer coder;

    [0035] Step S3: correlating the coders at individual layers with each other and transmitting information based on high order modulation;

    [0036] Step S4: inputting the data flow treated by the coders at individual layers into a modulator for modulation mapping processing;

    [0037] Step S5: finally outputting the data flow from the output end of the modulator.

    [0038] In particular, in Step S1, the serial data input end is used for supplying serial data flow of data bit sequence; and the serial-to-parallel converter is used for converting the serial data flow of data bit sequence into a parallel data flow.

    [0039] In particular, in Step S2, the multi-layer coder comprises a base layer processor and at least one enhancement layer processor; the enhancement layer processor comprises an enhancement layer coder and at least two reference processing units.

    [0040] In particular, in Step S3, in the multi-layer coder, a coder at a lower layer needs to code the data of its own layer, and sends the information of the coder to a coder at a higher layer; and the coder at a higher layer needs to code both the data of its own layer and the coding information of the lower layer and sends the information of the coder of its own layer to the coder at a further higher layer, until reaching the coder at the highest layer.

    [0041] In particular, the number of the layers of the multi-layer coder is no less than 3.

    [0042] In particular, the coder comprises a non-systematic convolutional coder and a systematic convolutional coder; and both the non-systematic convolutional coder and the systematic convolutional coder are expressed by an octal number.

    [0043] In particular, in Step 4, the modulation mapping processing is used for processing the data flow into a high frequency signal to perform signal transmission.

    [0044] One particular application of the embodiments is as follows:

    [0045] Embodiment 1

    [0046] Referring to FIG. 2, 2 bits of output c1 and c0 are generated per 1 bit of input data b. Since the data input sequence is not originally reappeared in the output sequence of the coder, this code is called as non-systematic convolutional code. When the coding rate is increased, c1 and c0 will be canceled by following a certain rule. In FIG. 2. D2-D0 are 3-stage shift register, representing the adder of modulo 2 addition. Regarding a convolutional code, the error correction ability of the codes is decided by the number of stages of the register and the coding rate.

    [0047] Generally, a convolutional coder can be expressed by octal numbers. Firstly, the connection relationship between the output end and input end of D2-D0 is observed, by which a point where there is a connection is marked as 1, and a point where there is no connection is marked as 0. Then, three points from right to left are grouped together, so that the connection relationship between xor0 and D2-D0 can be expressed by octal number 15. Similarly, the connection relationship between xor1 and D2-D0 can be expressed by octal number 13, and thus this coder can be expressed by (15, 13).

    [0048] Embodiment 2

    [0049] Referring to FIG. 3, a systematic convolutional coder with rate ½ is shown, in which the information bit after coding remains unchanged. Since the connection relationship between xor0 or xor1 and D2-D0 is the same as that in FIG. 2, the octal expression of the coder is the same as that of the coder in FIG. 2. When a higher coding rate is adopted, a certain number of check bit c can be canceled proportionally.

    [0050] Embodiment 3

    [0051] Referring to FIGS. 4-5, when a two-layer coding transmit information between coders, the two-layer coder is expressed by format (C0, I0; C1) in which C0 is the octal expression of the coder 0; I0 is the octal expression of the information transmitted by the coder 0; and C1 is the octal expression of the coder 1. The octal expression of I0 is made based on the same rule as that of the octal expression of the coder.

    [0052] Embodiment 4

    [0053] Referring to FIG. 6, a computer simulation was made to a two-layer coding scheme by taking quaternary continuous phase 4CPFSK modulation as an example. One 4CPFSK modulation symbol carrying two bits of digital information (m1m0) was given 4 values; the modulation mapping adopted {00, 01, 10, 11}.fwdarw.{−3, −1, +3, +1}. The modulation index was ¼. Firstly, a layered coder having appropriate Euclidean distance was selected. Non-systematic (31, 35) convolutional codes of a 4-stage register was used in the simulation, in which the coding rate of the two layers was ⅘. The two layers of convolutional codes having information transmission were ((3:1, 35), 25; (31, 35)). The 4CPFSK diagram in FIG. 6 is uncoded system. For the purpose of comparison, a coding scheme ((31, 35), 0; (31, 35)) having no information transmission was also simulated. Actually, the two-layer coding can adopt different coder;

    [0054] It can be seen from the comparison in FIG. 6 that, when the signal/noise ratio is low, there is no significant effect in the information transmission between two-layer codes. The reason lies in that the ⅘ rate coding has no sufficient ability to the channel noise, and the upper layer code has no surplus ability that can be shared with the lower layer code. With the increase of the signal/noise ratio, the error code performance of the system having no information transmission is mainly decided by the bottom layer code. In this case, giving the surplus ability of the coder at a higher layer to a lower layer code can provide a good balance between the abilities of the two layer codes.

    [0055] The simulation result shows that, the information transmission between multiple layers of codes has significant effect in improving the error code performance. When the modulation order is increased, this effect will be more significant. After a plurality of repeated experiments, in the case of quaternary continuous phase modulation, the non-systematic convolutional codes (13, 11), (31, 35), and (35, 35) and systematic convolutional codes (15, 6), (35, 15), and (21, 13) had the best Euclidean distance characteristics.

    [0056] It is to be noted that, in the above system embodiments, individual units as included are only divided according to their logical functions, but they are not limited to the above way of dividing, as long as corresponding functions can be achieved; in addition, the particular names of individual function units are merely used for being distinguished from each other, but not intended for limiting the protection scope of the present application.

    [0057] Additionally, those skilled in the art will understand that, part or all steps in the above embodiments can be completed by relevant hardware instructed by a program which can be stored in a computer readable storage medium.

    [0058] The above preferred embodiments of the present application are disclosed merely for the purpose of helping understand the present application. The preferred embodiments do not fully describe all the details, and should not limit the present application to those particular implements. It is apparent that, a lot of modifications and changes can be made based on the present disclosure. These embodiments are selected and described for the purpose of better explaining the principle and actual use of the present application, so that those skilled in the art can thoroughly understand and make use of the present application. The present application is only limited by the claims and the full scope of protection and equivalents thereof.