HYSTERESIS VOLTAGE DETECTION CIRCUIT

20210384822 · 2021-12-09

    Inventors

    Cpc classification

    International classification

    Abstract

    A hysteresis voltage detection circuit includes a voltage stabilizing unit, a first power switch, a first voltage dividing resister, a second voltage dividing resister, a third voltage dividing resistor and a second power switch. The voltage stabilizing unit is coupled to an adjustable voltage source. When both the first power switch and the second power switch are turned on, the first voltage dividing resistor, the second voltage dividing resistor, and the third voltage dividing resistor divide the adjustable voltage source. When both the first power switch and the second power switch are turned off, the first voltage dividing resistor and the second voltage dividing resistor divide the adjustable voltage source.

    Claims

    1. A hysteresis voltage detection circuit comprising: a voltage stabilizing unit having an anode, a cathode and a reference terminal, wherein the anode is grounded and the cathode is coupled to an adjustable voltage source, a first power switch circuit comprising a first power switch, wherein the first power switch is coupled to the cathode of the voltage stabilizing unit and the adjustable voltage source, and a second power switch circuit comprising a first voltage dividing resistor, a second voltage dividing resistor, a third voltage dividing resistor, and a second power switch, wherein the second power switch is a field effect transistor, and the reference terminal of the voltage stabilizing unit is coupled to the adjustable voltage source through the first voltage dividing resistor, the second voltage dividing resistor and the third voltage dividing resistor are coupled to the second power switch, the second voltage dividing resistor is grounded, the second power switch is coupled to the first power switch, and the second power switch is coupled to the first voltage dividing resistor and the reference terminal of the voltage stabilizing unit through the second voltage dividing resistor and the third voltage dividing resistor, wherein, when both the first power switch and the second power switch are turned on, the first voltage dividing resistor, the second voltage dividing resistor, and the third voltage dividing resistor divide the adjustable voltage source, and a first voltage is generated to the reference terminal of the voltage stabilizing unit to turn on the voltage stabilizing unit, wherein, when both the first power switch and the second power switch are turned off, the first voltage dividing resistor and the second voltage dividing resistor divide the adjustable voltage source, and a second voltage is generated to the reference terminal of the voltage stabilizing unit to turn off the voltage stabilizing unit.

    2. The hysteresis voltage detection circuit in claim 1, wherein the cathode of the voltage stabilizing unit is coupled to the adjustable voltage source through a first current limiting resistor.

    3. The hysteresis voltage detection circuit in claim 2, wherein the first power switch circuit further comprises: a diode, and a second current limiting resistor coupled to the diode, wherein, the first power switch is coupled to the first current limiting resistor and the voltage stabilizing unit through the second current limiting resistor and the diode.

    4. The hysteresis voltage detection circuit in claim 1, wherein the first power switch is grounded through a third current limiting resistor.

    5. The hysteresis voltage detection circuit in claim 4, wherein the third current limiting resistor is grounded through a Zener diode.

    6. The hysteresis voltage detection circuit in claim 1, wherein the first voltage is less than the second voltage.

    7. The hysteresis voltage detection circuit in claim 1, wherein the adjustable voltage source comprises a mains or a sine wave generator.

    8. The hysteresis voltage detection circuit in claim 1, wherein the adjustable voltage source comprises a thermistor.

    Description

    BRIEF DESCRIPTION OF DRAWINGS

    [0017] FIG. 1 is a circuit architecture diagram of a hysteresis voltage detection circuit of the present disclosure.

    [0018] FIG. 2 and FIG. 3 are waveform diagrams of hysteresis phenomena of the hysteresis voltage detection circuit of the present disclosure.

    DETAILED DESCRIPTION

    [0019] The embodiments of the present disclosure are described by way of specific examples, and those skilled in the art can readily appreciate the other advantages and functions of the present disclosure. The present disclosure may be embodied or applied in various other specific embodiments, and various modifications and changes can be made without departing from the spirit and scope of the present disclosure.

    [0020] It should be understood that the structures, the proportions, the sizes, the number of components, and the like in the drawings are only used to cope with the contents disclosed in the specification for understanding and reading by those skilled in the art, and it is not intended to limit the conditions that can be implemented in the present disclosure, and thus is not technically significant. Any modification of the structure, the change of the proportional relationship, or the adjustment of the size, should be within the scope of the technical contents disclosed by the present disclosure without affecting the effects and the achievable effects of the present disclosure.

    [0021] The technical content and detailed description of the present disclosure will be described below in conjunction with the drawings.

    [0022] Please refer to FIG. 1 to FIG. 3. FIG. 1 is a circuit architecture diagram of a hysteresis voltage detection circuit of the present disclosure. FIG. 2 and FIG. 3 are waveform diagrams of hysteresis phenomena of the hysteresis voltage detection circuit of the present disclosure.

    [0023] In one embodiment of the present disclosure, the hysteresis voltage detection circuit includes a voltage stabilizing unit U1, a first power switch circuit 10, and a second power switch circuit 20. The voltage stabilizing unit U1 includes an anode, a cathode, and a reference terminal V.sub.ref. The anode of the voltage stabilizing unit U1 is grounded. The cathode of the voltage stabilizing unit U1 is coupled to an adjustable voltage source V through a first current limiting resistor R.sub.11. Further, the voltage stabilizing unit U1 may be an adjustable shunt regulator TL431 made by Texas Instruments (TI), but the present disclosure not limited thereto. A voltage measurement point V.sub.in is provided between the first current limiting resistor R.sub.11 and the adjustable voltage source V. Further, the adjustable voltage source V may be a mains or a sine wave generator that can generate a variable voltage level, or may be a detection circuit including an NTC (negative temperature coefficient) component such as a thermistor.

    [0024] The first power switch circuit 10 includes a first power switch Q1, a diode D1, and a second current limiting resistor R.sub.12. In the embodiment of the present disclosure, two ends of the second current limiting resistor R.sub.12 are respectively coupled to the diode D1 and the first power switch Q1. The diode D1 is coupled to the first current limiting resistor R.sub.11 and the voltage stabilizing unit U1. The present disclosure is not limited thereto, however, as long as the diode D1 and the second current limiting resistor R.sub.12 are coupled in series. In different embodiments of the present disclosure, two ends of the diode D1 are respectively coupled to the second current limiting resistor R.sub.12 and the first power switch Q1. The second current limiting resistor R.sub.12 is coupled to the first current limiting resistor R.sub.11 and the voltage stabilizing unit U1. The first power switch Q1 may be an N—P—N type BJT (bipolar junction transistor), and a collector of the first power switch Q1 is coupled to the adjustable voltage source V and the first current limiting resistor R.sub.11. A base of the first power switch Q1 is coupled to the first current limiting resistor R.sub.11 and the voltage stabilizing unit U1 through the second current limiting resistor R.sub.12 and the diode D1 sequentially. An emitter of the first power switch Q1 is coupled to the third current limiting resistor R.sub.13, and is grounded through the third current limiting resistor R.sub.13 and the Zener diode D3 sequentially. There is a voltage measurement point V.sub.o1 between the third current limiting resistor R.sub.13 and the Zener diode D3. In another embodiment (not shown) of the present disclosure, the Zener diode D3 may not be required. That is, the emitter of the first power switch Q1 is grounded only through the third current limiting resistor R.sub.13. However, this disclosure is not limited thereto.

    [0025] The second power switch circuit 20 includes a first voltage dividing resistor R1, a second voltage dividing resistor R2, a third voltage dividing resistor R3, and a second power switch Q2. The second power switch Q2 may be an N-type MOSFET (metal-oxide-semiconductor field effect transistor), but the present disclosure is not limited thereto. The reference terminal V.sub.ref of the voltage stabilizing unit U1 is coupled to the adjustable voltage source V through the first voltage dividing resistor R1. One end of the second voltage dividing resistor R2 is coupled to a source of the second power switch Q2, and the other end of the second voltage dividing resistor R2 is grounded. One end of the third voltage dividing resistor R3 is coupled to the second voltage dividing resistor R2, and the other end of the third voltage dividing resistor R3 is coupled to a drain of the second power switch Q2. A gate of the second power switch Q2 is coupled to the emitter of the first power switch Q1, and the second power switch Q2 is coupled to the first voltage dividing resistor R1 and the reference terminal V.sub.ref of the voltage stabilizing unit U1 through the second voltage dividing resistor R2 and the third voltage dividing resistor R3.

    [0026] When using the hysteresis voltage detection circuit of the present disclosure, since voltage level of the adjustable voltage source V is variable (or adjustable), a hysteresis entry point and a hysteresis exit point can be controlled according to the first voltage dividing resistor R1, the second voltage dividing resistor R2 and the third voltage dividing resistor R3. When the voltage level of the adjustable voltage source V is adjusted so that both the first power switch Q1 and the second power switch Q2 are turned on, the first voltage dividing resistor R1, the second voltage dividing resistor R2, and the third voltage dividing resistor R3 divide the adjustable voltage source V. In this condition, the second voltage dividing resistor R2 and the third voltage dividing resistor R3 are connected in parallel, and then connected in series with the first voltage dividing resistor R1, to generate a first voltage V.sub.ref-1 to the reference terminal V.sub.ref of the voltage stabilizing unit U1 to turn on the voltage stabilizing unit U1 (assuming that a turn-on threshold voltage of TL431 is 2.5V). At this time, the hysteresis voltage detection circuit operates in a state of the hysteresis entry point. Further, when the hysteresis voltage detection circuit operates in the state of the hysteresis entry point, the voltage measured by the voltage measurement point V.sub.in is V1 (in the embodiment of the present disclosure, the voltage V1 may be 14V). The voltage waveform at the voltage measurement point V.sub.o1 also changes accordingly with a time axis T (unit is microsecond, μs), as shown in FIG. 2. Because the first power switch Q1 is tuned on when the voltage measured at the voltage measurement point V.sub.in is V1, the voltage measured at the voltage measurement point V.sub.o1 is same as the voltage V.sub.D3 of the Zener diode D3, as shown in FIG. 3.

    [0027] Further, the value of the voltage V1 can be calculated by the following equation:

    [00001] V 1 = R 1 + ( R 2 × R 3 R 2 + R 3 ) ( R 2 × R 3 R 2 + R 3 ) × 2 . 5 = R 1 ( R 2 + R 3 ) + ( R 2 × R 3 ) ( R 2 × R 3 ) × 2 . 5

    [0028] And, the value of the first voltage V.sub.ref-1 can be calculated by the following equation:

    [00002] V ref - 1 = ( R 2 × R 3 R 2 + R 3 ) R 1 + ( R 2 × R 3 R 2 + R 3 ) × V 1 = ( R 2 × R 3 ) R 1 ( R 2 + R 3 ) + ( R 2 × R 3 ) × V 1

    [0029] When the voltage level of the adjustable voltage source V is adjusted to turn off both the first power switch Q1 and the second power switch Q2, the first voltage dividing resistor R1 and the second voltage dividing resistor R2 divide the adjustable voltage source V. In this condition, the first voltage dividing resistor R1 and the second voltage dividing resistor R2 are connected in series, to generate a second voltage V.sub.ref-2 to the reference terminal V.sub.ref of the voltage stabilizing unit U1 to turn off the voltage stabilizing unit U1. At this time, the hysteresis voltage detection circuit operates in a state of the hysteresis exit point. In the embodiment of the present disclosure, the first voltage V.sub.ref-1 is smaller than the second voltage V.sub.ref-2. Further, when the hysteresis voltage detection circuit operates in the state of the hysteresis exit point, the voltage measured by the voltage measurement point V.sub.in is V2 (in the embodiment of the present disclosure, the voltage V2 may be 10V). The voltage waveform at the voltage measurement point V.sub.o1 also changes accordingly with the time axis T (unit is microsecond, μs), as shown in FIG. 2. Further, the second power switch Q2 of the hysteresis voltage detection circuit is an FET (field effect transistor). FETs have better temperature stability than BJTs used in prior art voltage hysteresis circuits, and the on-resistance of FETs is less susceptible to change in environmental temperature and have no serious voltage level drift. Configuring FETs with the first voltage dividing resistor R1, the second voltage dividing resistor R2, and the third voltage dividing resistor R3 reduces the effect of temperature on voltage level drift. Compared with prior art method, the present disclosure also avoids the disadvantages of higher cost, higher power consumption, and complicated circuit design caused by using the comparator.

    [0030] Further, the value of the voltage V2 can be calculated by the following equation:

    [00003] V 2 = R 1 + R 2 R 2 × 2 . 5

    [0031] And, the value of the second voltage V.sub.ref-2 can be calculated by the following equation:

    [00004] V ref - 2 = R 2 R 1 + R 2 × V 2

    [0032] For this reason, the hysteresis voltage detection circuit solves the problem that circuit in prior art is susceptible to the process tolerance or changes in environmental temperature when the transient point detection is used, and solves the problem that serious voltage level drift caused by as mentioned. To achieve the purpose of low cost, low power consumption and accurate control of voltage hysteresis.

    [0033] The above is only a detailed description and drawings of the preferred embodiments of the present disclosure, but the features of the present disclosure are not limited thereto, and are not intended to limit the present disclosure. All the scope of the present disclosure shall be subject to the scope of the following claims. The embodiments of the spirit of the present disclosure and its similar variations are intended to be included in the scope of the present disclosure. Any variation or modification that can be easily conceived by those skilled in the art in the field of the present disclosure can be covered by the following claims.