CALCULATION PROCESSOR AND CALCULATION METHOD
20210373853 · 2021-12-02
Inventors
Cpc classification
International classification
Abstract
A calculation processor for determining a digital output value (OUT) from a digital input value (IN) based on an exponent value a, the processor comprising a first calculation block (CB1), a second calculation block (CB2) and a final calculation block (CBF). The first calculation block (CB1) initializes an intermediate value and an error value depending on a position of a Most Significant Bit of a significant part of the input value. The second calculation block is configured to perform repeatedly, until an exit criterion is fulfilled, the incrementation of a counter value, the determination of a power error value based on the error value and, if the power error value is larger than or equal to an error threshold, adjustment of the intermediate value y by multiplying the intermediate value with an adaptation value and setting the error value to the power error value divided by the base value. If the power error value is smaller than the error threshold, the error value is set to the power error value. The final calculation block is configured to set the output value to the intermediate value.
Claims
1. A calculation processor for determining a digital output value from a digital input value based on an exponent value a, the processor comprising: a first calculation block that is configured to: a) determine a position number n denoting a position of a Most Significant Bit, MSB, of a significant part of the input value IN; b) set an intermediate value y=b.sup.a.Math.n with b being a base value; c) set an error value err=IN/b.sup.n; and d) initialize a counter value k; a second calculation block that is configured to perform repeatedly each of the following e), f), g1), g2), g3) until an exit criterion is fulfilled: e) increment the counter value k by 1; f) determine a power error value perr with perr=err.sup.b; g1) if the power error value perr is larger than or equal to an error threshold, adjust the intermediate value y by multiplying the intermediate value y with an adaptation value being dependent on the counter value k; g2) if the power error value perr is larger than or equal to the error threshold, set the error value err to the power error value perr divided by the base value b; g3) if the power error value perr is smaller than the error threshold, set the error value err to the power error value perr; and a final calculation block that is configured to set the output value to the intermediate value y.
2. The processor according to claim 1, wherein the second calculation block is configured to determine the adaptation value as b.sup.a/b{circumflex over ( )}k.
3. The processor according to claim 2, wherein the second calculation block comprises an adaptation look-up table and/or a fixed adaptation circuit resulting from a programming in a hardware description language for determining the adaptation value.
4. The processor according to claim 1, wherein the first calculation block comprises an intermediate look-up table and/or a fixed intermediate circuit resulting from a programming in a hardware description language for setting the intermediate value y.
5. The processor according to claim 1, wherein the first calculation block is configured to initialize the counter value to k=0.
6. The processor according to claim 1, wherein the base value is 2.
7. The processor according to claim 6, wherein the first calculation block comprises a barrel shifter for setting the error value err from the input value IN.
8. The processor according to claim 6, wherein the second calculation block comprises a 1-bit shifter for setting the error value err to the power error value perr divided by two.
9. The processor according to claim 6, wherein the second calculation block comprises a multiplier, in particular a square multiplier or a squaring device, for determining the power error value perr.
10. The processor according to claim 1, wherein the error threshold equals the base value.
11. The processor according to claim 1, wherein the second calculation block comprises a comparator for comparing the power error value perr to the error threshold.
12. The processor according to claim 1, wherein the exit criterion is fulfilled if the counter value k is equal to or greater than a predefined repetition value L, and wherein the second calculation block comprises L−1 instances of respective circuitry, in particular similar circuitry, for each repetition of steps e), f), g1), g2) and g3) and a further instance of the respective circuitry for a final repetition of steps e), f), and g1).
13. The processor according to claim 1, which is implemented as an integrated circuit, in particular as an application-specific integrated circuit, ASIC, and which is free from a microprocessor.
14. An image sensor arrangement, comprising an image sensor for providing sensor values from a plurality of image pixels, and a processor according to claim 1 for processing the sensor values as respective digital input values, in particular in a serial fashion.
15. An electronic device with a camera system comprising an image sensor arrangement according to claim 14.
16. A calculation method for determining a digital output value from a digital input value based on an exponent value a, the method comprising: a) determining a position number n denoting a position of a Most Significant Bit, MSB, of a significant part of the input value IN; b) setting an intermediate value y=b.sup.a.Math.n with b being a base value; c) setting an error value err=IN/b.sup.n; d) initializing a counter value k; the method further comprising performing repeatedly each of the steps e), f), g1), g2), g3) until an exit criterion is fulfilled: e) incrementing the counter value k by 1; f) determining a power error value perr with perr=err.sup.b; g1) if the power error value perr is larger than or equal to an error threshold, adjusting the intermediate value y by multiplying the intermediate value y with an adaptation value being dependent on the counter value k; g2) if the power error value perr is larger than or equal to the error threshold, setting the error value err to the power error value perr divided by the base value b; g3) if the power error value perr is smaller than the error threshold, setting the error value err to the power error value perr; h) setting the output value to the intermediate value y.
17. The method according to claim 16, wherein the adaptation value is determined as b.sup.a/b{circumflex over ( )}k.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0042] The improved concept will be described in more detail in the following with the aid of drawings. Elements having the same or similar function bear the same reference numerals throughout the drawings. Hence their description is not necessarily repeated in subsequent drawings.
[0043] In the drawings:
[0044]
[0045]
[0046]
[0047]
[0048]
DETAILED DESCRIPTION
[0049] In various applications calculation of an exponential function is necessary. In the following, a calculation processor will be described that allows the calculation of such exponential values, in particular without the use of a microprocessor. One possible but not limiting application for such calculation processor is the gamma calculation with signals in opto-electronic circuits.
[0050] For example, the calculation processor is used as a or in a circuit that can calculate the opto-electronic transfer characteristics of image pixels, according to recommendations ITU-R BT.709-6, ITU-R BT.2020-2 and ITU-R BT.2100-0, and all associated types of calculations. These specifications do require the calculation of:
OUT=1.099.Math.IN.sup.0.45−0.099 (2)
[0051] This disclosure is mainly about the pipelined way of calculating the “IN.sup.0.45” part of this formula. The calculation is also known as a “gamma calculation”. The pipelined architecture enables a calculation on all the pixels in a serial and/or streamed way, where all calculations will have exactly the same latency.
[0052] Hence, the value to be calculated in particular is:
y=x.sup.a (3)
where a is an exponent value. The value a may be set to a=0.45 for ITU-R applications, as mentioned above. However, the improved calculation concept is not limited to a specific exponent value.
[0053] Equation (3) can also be written as:
y=x.sup.a=b.sup.log.sup.
with b being a base value. Generally, b may be chosen as an arbitrary value. However, in the following b is chosen as 2, which may be advantageous in view of e.g. binary operations. Hence equation (4) may be rewritten as:
y=x.sup.a=2.sup.log.sup.
[0054] An “error” factor err can be introduced in the formulas (4) or (5) from above. The formula is still correct when we write the following:
y.Math.2.sup.log.sup.
where err=1.
[0055] In practice this form of the formula leaves the possibility to start with a value for y of which we know that it is wrong (in practice it may be put to “1”), but which is gradually adapted in an iterative way. So step by step, y will evolve into x.sup.a, while err will go from x.sup.a to 1, using e.g. ASIC friendly calculation techniques. These steps can be implemented in the hardware. So:
[0056]
[0057] The individual calculation blocks CB1, CB2 and CBF will be described in more detail in the following in conjunction with
[0058]
[0059] The first step uses the position of the Most Significant Bit, MSB, (“1”) of the significant part of the input value IN. It will result in a value for “1≤err<2”. Let us call the position of this MSB “n”.
[0060] With the starting positions of “err” and “y”,
the following calculations are leading to the new values of “err” and “y”, called “err′” and “y′”.
[0061] It should be noted that for an arbitrarily chosen base value b, equation (14) reads:
[0062] Referring to equation (8) and with x=IN, the error value err and the intermediate value y after the first step or the first calculation block CB1 hence can be generally determined as:
[0063] Then:
y′.Math.2.sup.a.Math.log.sup.
[0064] So the new formula to work with becomes:
y.Math.2.sup.a.Math.log.sup.
[0065] Referring to
TABLE-US-00001 TABLE 1 IN n err 00000001 0 1.0000000 0000001x 1 1.x000000 000001xy 2 1.xy00000 00001xyz 3 1.xyz0000 0001xyzk 4 1.xyzk000 001xyzkm 5 1.xyzkm00 01xyzkmn 6 1.xyzkmn0 1xyzkmnp 7 1.xyzkmnp
[0066] The values for the intermediate value y according to equation (14) or (15) or (16) may be performed using some kind of memory IMEM that stores the binary value for the respective calculation term.
[0067] As an example, this is shown in table 2 below. The column on the far right shows the initial intermediate values with 4 bits before and 2 bits behind the digital point, as an example. Other number formats still may be used, which should be apparent to the skilled reader.
[0068] The position of the digital point in
TABLE-US-00002 TABLE 2 n a a .Math. n 2{circumflex over ( )} (a .Math. n) binary (4 + 2) 0 0.45 0 1 0001.00 1 0.45 0.45 1.366040257 0001.01 2 0.45 0.9 1.866065983 0001.11 3 0.45 1.35 2.549121255 0010.10 4 0.45 1.8 3.482202253 0011.01 5 0.45 2.25 4.75682846 0100.11 6 0.45 2.7 6.498019171 0110.01 7 0.45 3.15 8.876555777 1000.11
[0069] From now on a sequence of identical or quasi-identical steps has to be performed until “err=1” or until “err” is small enough. The exact number can be subject of a case-specific simulation. The steps are numbered by “k”, starting from 0.
[0070] Referring now to
[0071] The distinguishing is made based on a power error value perr that generally is determined as perr=err.sup.b, which is perr=err.sup.2 for the specific implementation with the base value being 2. Referring to
[0072] The input from the previous step k is of the form:
which can also be written as
[0073] For the actual step, k is incremented by 1. Now, for the approximation, two cases have to be distinguished.
Case 1: Err.SUP.2.<2:
[0074] So, when “err.sup.2<2”, after “k” iterations, then:
[0075] New values for the following step:
Or:
[0076]
Case 2: Err.SUP.2.>2:
[0077] So, in this case, after “k” iterations:
Or:
[0078]
[0079] The adaptation of the intermediate value y or y′ and the error value err or err′ are made with respective multiplexers MP1, MP2 providing the respective selected output based on the comparison result.
[0080] The division by two of the power error value or the square error value in equation (29) may for example be performed by a 1-bit shifter when implemented in hardware.
[0081] The multiplication of the previous intermediate value y with an adaptation value by the second multiplier MULT2 can be performed with the adaptation value being retrieved from an adaptation memory AMEM. The adaptation memory AMEM may be a look-up table that may be common to different instances CB2_k of the second calculation block CB2, wherein an actual value is retrieved based on the counter value k. In an alternative implementation, the adaptation value, which is fixed for each iteration stage, may be stored in a fixed adaptation circuit resulting from a programming in a hardware description language like VHDL. The intermediate value y′ at the output of the calculation instance CB2_k represents the actual approximation of the output value to be calculated according to equation (3).
[0082] In a hardware implementation, the same block could be used physically several times, until a desired number of iterations is performed or until the error value is small enough. However, in some implementations, several instances of the instance CB2_k as shown in
[0083] For example,
[0084] Accordingly, the calculation processor comprises the first calculation block CB1 that may be implemented as shown in
[0085] The second calculation block CB2 may be implemented with a predefined number L instances of calculation instances CB2_1, CB2_2 to CB2_L as described in conjunction with
[0086] Moreover, the last instance can directly be used also as the final calculation block CBF for generating the output value OUT.
[0087] Referring to
[0088] It should be noted that the implementation according to
[0089] As mentioned above, if the calculation processor is used for a gamma calculation according to equation (2), an additional multiplier and an additional subtractor could also be easily added to the implementation of
[0090] Moreover, such a calculation processor can be directly implemented e.g. on an image sensor providing thousands or millions of sensor values within a limited time frame, i.e. a frame rate of the image sensor. Generally speaking, such a calculation processor can be implemented in the digital data path of image sensors that can be used in film cameras or image cameras (e.g. 4K-HD and others).
[0091] Accordingly, the calculation processor according to the improved calculation concept allows processing of a large amount of data, i.e. pixels of an image processor that are provided as a serial readout such that the calculations can be performed very fast in order not to reduce the output speed, and as such not reduce the frame rate of the sensor on which the calculation processor is implemented.
[0092] The serial treatment of the pixels takes benefit of such a calculation processor with a predefined latency, in order to make serial calculations possible, at a speed which can be the transmission speed of the samples. Hence, the calculations that may be necessary according to the ITU recommendations can be performed directly on the sensor chip and do not need to be performed outside the sensor chip, e.g. on a dedicated image processor.
[0093] The various implementations may be implemented as integrated circuits, in particular as application-specific integrated circuits, ASICs, such that no microprocessor is needed for performing the respective calculations.
[0094] The respective binary representations of the adaption values and the initial intermediate values can be determined in advance and provided hardcoded, i.e. as hardware into the circuit.
[0095] Referring now to
[0096] In step b) an initial value for the intermediate value y is determined in accordance with the calculation in equation (16). With the base value b chosen as 2, also equation (14) applies.
[0097] In step c) the initial error value is set in accordance with equation (16) or (14), if the base value is 2.
[0098] In step d) a counter value k is initialized, for example to 0.
[0099] The following steps e), f), g1), g2), g3), g4) are performed iteratively and/or repeatedly.
[0100] For example, in step e), the counter value k is incremented by 1. In step f), a power error value is determined. If the base value is 2, the power error value is a square error value. If the power error value or square value is larger than an error threshold, in particular the base value b, the intermediate value yl is set to the previous intermediate value y multiplied with an adaptation value ADPT being dependent on the counter value k. This is for example described in conjunction with equation (29). Furthermore, in step g2), the new error value err′ is set to the power error value divided by the base value b.
[0101] If the power error value perr is smaller than the error threshold or the base value, the new error value err′ is set to the power error value perr in step g3). In optional step g4), the new intermediate value y′ is set to the old intermediate value y. Step g4) is optional as in fact no change to the value y is made.
[0102] If an exit criterion is fulfilled, the last intermediate value y′ is set as the output value OUT in step h). If not, the previous steps are repeated with the error value err being err′ and the intermediate value y being y′.
[0103] It should be noted that with the description of the method of