TRANSMITTER AND RECEIVER CIRCUITRY FOR POWER CONVERTER SYSTEMS

Abstract

Embodiments described herein relate to a driving circuit, comprising: a rectification stage configured to convert an AC input to a rectified AC output; a transmitter coil; and an inverter directly coupled to the rectification stage. The rectified AC output from the rectification stage is fed directly to the inverter and the inverter is configured to convert the rectified AC output from the rectifier to an AC output for the transmitter coil.

Claims

1. A driving circuit, comprising: a rectification stage configured to convert an AC input to a rectified AC output; a transmitter coil; and an inverter directly coupled to the rectification stage, wherein the rectified AC output from the rectification stage is fed directly to the inverter and the inverter is configured to convert the rectified AC output from the rectification stage to an AC output for the transmitter coil.

2. The driving circuit according to claim 1, wherein no active power factor correction is applied to the rectified AC output from the rectification stage before the rectified AC output is fed to the inverter.

3. The driving circuit according to claim 1, wherein the inverter has an inductor in series with the rectified AC output from the rectification stage.

4. The driving circuit according to claim 1, wherein the inverter is a Class E inverter, a Class EF inverter, or a push-pull variation of a Class E or Class EF inverter.

5. The driving circuit according to claim 1, wherein the inverter operates in open loop.

6. The driving circuit according to claim 1, wherein the AC input is a mains AC input and wherein the rectification stage is configured to convert the mains AC input to a mains-rectified AC output.

7. The driving circuit according to claim 1, wherein the driving circuit is for an inductive power transfer system.

8. The driving circuit according to claim 7, wherein the inductive power transfer system is a multi-MHz inductive power transfer system.

9. A receiving circuit, comprising: a receiver coil, wherein an electromotive force is induced in the receiver coil when the receiver coil is positioned in proximity to a transmitter coil of a driving circuit; a rectifier configured to convert the induced electromotive force from the receiver coil to a rectified output; and an active power factor correction stage configured to convert the rectified output from the rectifier to a regulated DC output and apply a power factor correction to an AC input to the driving circuit.

10. The receiving circuit according to claim 9, wherein the active power factor correction stage is configured to regulate the rectified output from the rectifier to provide the regulated DC output.

11. The receiving circuit according to claim 9, wherein the active power factor correction stage is configured to emulate a resistive load.

12. The receiving circuit according to claim 9, wherein the active power factor correction stage comprises a switched-mode power supply.

13. The receiving circuit according to claim 12, wherein the switched-mode power supply is a boost converter.

14. The receiving circuit according to claim 9, wherein the receiving circuit is for an inductive power transfer system.

15. The receiving circuit according to claim 14, wherein the inductive power transfer system is a multi-MHz inductive power transfer system.

16. An inductive power transfer system, comprising: a driving circuit comprising: a rectification stage configured to convert an AC input to a rectified AC output; a transmitter coil; and an inverter directly coupled to the rectification stage, wherein the rectified AC output from the rectification stage is fed directly to the inverter and the inverter is configured to convert the rectified AC output from the rectification stage to an AC output for the transmitter coil; and a receiving circuit comprising: a receiver coil, wherein an electromotive force is induced in the receiver coil when the receiver coil is positioned in proximity to the transmitter coil of the driving circuit; a rectifier configured to convert the induced electromotive force from the receiver coil to a rectified output; and an active power factor correction stage configured to convert the rectified output from the rectifier to a regulated DC output and apply a power factor correction to an AC input to the driving circuit.

17. The inductive power transfer system of claim 16, wherein no active power factor correction is applied to the rectified AC output from the rectification stage before the rectified AC output is fed to the inverter.

18. The inductive power transfer system of claim 16, wherein the inverter has an inductor in series with the rectified AC output from the rectification stage.

19. The inductive power transfer system of claim 16, wherein the active power factor correction stage is configured to emulate a resistive load.

20. The inductive power transfer system of claim 16, wherein the active power factor correction stage comprises a switched-mode power supply.

Description

BRIEF DESCRIPTION OF FIGURES

[0035] Specific embodiments are described below by way of example only and with reference to the accompanying drawings, in which:

[0036] FIG. 1 is a block diagram of an existing inductive power transfer system.

[0037] FIG. 2 is a block diagram of an inductive power transfer system having an active PFC stage at the receiver side.

[0038] FIG. 3 is a circuit diagram of an inductive power transfer system having an active PFC stage at the receiver side and including a Class EF inverter.

[0039] FIG. 4 shows experimental waveforms of a first experimental setup having a power factor correction stage at the receiving end.

[0040] FIG. 5 shows experimental waveforms of a second experimental setup having a capacitive filter at the receiving end instead of the power factor correction stage included at the receiving end of the first experimental setup.

DETAILED DESCRIPTION

[0041] FIG. 1 is a block diagram of an existing IPT system 100. In the IPT system 100 of FIG. 1, a voltage source 110, such as a single-phase mains AC voltage source, V.sub.ac_mains, is rectified using a rectification stage 120, such as a diode bridge. The output voltage from the rectification stage 120, V.sub.rect has a waveform that is the absolute value of V.sub.ac_mains (disregarding the voltage drop across the diodes in the rectification stage).

[0042] The rectified AC output from the rectification stage 120, V.sub.rect, is fed to an active PFC stage 130, which consists of a switched-mode power supply (SMPS), which is often a boost converter. The active PFC stage 130 ensures that the power is extracted from the mains with a unitary power factor. The output from the active PFC stage 130 is a regulated DC voltage, V.sub.dc_reg, which feeds the inverter 140 (i.e. a Class E or Class EF inverter).

[0043] The inverter 140 converts the regulated DC output of the active PFC stage 130 into a high-frequency alternating current. The AC output from the inverter 140 is fed to a transmitter coil of an IPT link 150. The IPT link 150 comprises the transmitter coil and a receiver coil, separated by a gap. The alternating current through the transmitter coil, i.sub.p, creates an oscillating magnetic field which passes through the receiver coil, resulting in an induced EMF, ε.sub.p-s, creating an alternating current in the receiver coil. The efficiency of the power transfer between the transmitter coil and the receiver coil is influenced by the mutual inductance between the transmitter coil and the receiver coil (represented by the term k in FIG. 1). The mutual inductance is dependent on the geometry of the transmitter coil and the receiver coil, and the distance between the coils.

[0044] The induced EMF, ε.sub.p-s, is rectified using an IPT rectifier 160, resulting in a rectified output. The rectified output is then regulated using a DC-DC converter 170 to control the power throughput so that the output power is regulated for the intended application.

[0045] In the examples described herein, an inductive power transfer (IPT) system uses an inverter (such as a Class E or Class EF inverter) fed directly from a rectified AC input (such as a single-phase mains-rectified alternating current (AC) source), in which the power throughput control and the power factor correction (PFC) stages are implemented as a single stage at the receiving end of the IPT system. Accordingly, the examples described below reduce the number of power conversion stages required in an IPT system powered from the mains when unity power factor is required.

[0046] Therefore, in the IPT system 200 in FIG. 2, the Class E or Class EF inverter is not fed by a regulated DC voltage. Accordingly, there is no active PFC control stage between the rectifier and the inverter; that is, the output from the rectification stage 220 is fed directly to the inverter 230.

[0047] As with the IPT system 100 of FIG. 1, in the IPT system 200 of FIG. 2, a voltage source 210, such as a single-phase mains AC voltage source, V.sub.ac_mains is rectified using a rectification stage 220, such as a diode bridge. The output voltage from the rectification stage 220, V.sub.rect has a waveform that is the absolute value of V.sub.ac_mains (disregarding the voltage drop across the diodes in the rectification stage).

[0048] In contrast to the IPT system of FIG. 1, in the IPT system of FIG. 2, an inverter 230 (which may be a Class E or a Class EF inverter) is then fed with V.sub.rect directly (i.e. without a PFC control stage at the transmitting end). The inverter 230 may optionally operate in open loop (i.e. with a constant frequency of operation and constant duty cycle). The inverter 230 has an inductor (i.e. a choke) in series with the rectified AC input, V.sub.rect, which serves as an input filter. The amplitude of the output current of the inverter 230 depends on V.sub.rect. Therefore, the transmitting coil is driven by a high frequency output current (i.e. the frequency of operation of the inverter). The output current, i.sub.p, from the inverter 230 has a modulated amplitude that depends on V.sub.rect.

[0049] Power is then transferred inductively between the transmitter coil and the receiver coil of the IPT link 240, as described above for the IPT system 100 of FIG. 1.

[0050] The induced EMF, ε.sub.p-s, is fed to an IPT rectifier 250, such as a Class D or Class E rectifier. The IPT rectifier 250 may contain a resonating capacitance in series or in parallel with the receiver coil. The IPT rectifier 250 rectifies the high frequency AC current induced in the receiver coil. The IPT rectifier 250 also filters the high frequencies resulting from the inverter's frequency of operation and its harmonics, but not the lower (i.e. twice mains) frequencies. The output voltage from the IPT rectifier 250, V.sub.0, is a rectified AC voltage with a modulated amplitude that depends on the value of V.sub.rect.

[0051] The next power conversion stage in the IPT system is an active PFC control stage 260. The active PFC stage 260 is used to minimise the effects produced by nonlinear loads (i.e. inductive and capacitive loads) on the mains power supply by emulating a resistive load. This is done by shaping the current provided to the nonlinear load using an SMPS, such as a boost converter.

[0052] Accordingly, the active PFC stage 260 shapes the input current to emulate a resistive load to the IPT system 200 such that the power factor at the input of the IPT system 200 is unitary. In addition, the active PFC stage 260, by virtue of its connection to the load being powered, regulates the output voltage for the intended application to control the power throughput of the IPT system 200.

[0053] In practice, the power factor may not be completely unitary; references to a unitary power factor herein should be interpreted as encompassing a substantially unitary power factor where the power factor is close to unitary.

[0054] Example components of the block diagram of the IPT system of FIG. 2 are shown in the circuit diagram of FIG. 3, in which the inverter 320 is a Class EF inverter. A diode bridge 310 rectifies the mains voltage input V.sub.ac_mains from the mains voltage source 300, resulting in a rectified AC input voltage V.sub.rect. The rectified mains voltage V.sub.rect is fed to the inverter 320 (which comprises an inductor 322 having a large inductance L.sub.1).

[0055] The inverter 320 provides a high frequency AC output (i.e. in the multi-MHz range), which is fed to a transmitter coil 332 of an IPT link 330. The alternating current through the transmitter coil 332, i.sub.p, induces an EMF, ε.sub.p-s, in the receiver coil 334 of the IPT link 330, which is then fed to a Class D rectifier 340 (having a series resonant capacitance), which provides an output voltage, V.sub.0.

[0056] Finally, the output voltage V.sub.0 is fed to a boost converter 350 which both regulates the power throughput of the system in accordance with the intended application, and emulates a resistive load to shape the input current such that power extracted from the mains has a unitary power factor.

[0057] Other embodiments are envisioned that are substantially the same as those described above, but in which the following variations are envisaged.

[0058] In particular, with reference to the circuit diagram in FIG. 3, a Class E inverter may be used in place of a Class EF inverter. In this alternative, the circuit would not include inductor L.sub.2 or capacitor C.sub.2. Alternatively, a push-pull variation of a Class E or Class EF inverter may be used in place of the Class EF inverter.

[0059] In another alternative, a different SMPS may be used instead of the boost converter 350 of FIG. 3.

[0060] In a further alternative, a different rectifier (such as a Class E or Class EF rectifier) may be used instead of the Class D rectifier 340 of FIG. 3.

[0061] The application of the above examples is not limited to multi-MHz IPT systems. Thus, the examples described above may also be applied to other IPT systems or to any power converter with magnetic isolation.

Examples

[0062] Two experiments have been performed to show that the power factor controller corrects the power factor at the AC source when implemented in the receiving end of an IPT system. Both experiments power a DC load of 130 W and the wireless link (i.e. the gap between the transmitter and receiver coils) was set at 8 cm.

Experiment 1:

[0063] AC source: 60Vac [0064] Inverter: push-pull load independent Class EF [0065] Transmitter coil: 20 cm, 2 turn PCB coil [0066] Receiver coil: 20 cm, 2 turn PCB coil [0067] Rectifier: full bridge Class D rectifier [0068] PFC stage using LT8312 from Linear Technologies

Experiment 2:

[0069] AC source: 60Vac [0070] Inverter: push-pull load independent Class EF [0071] Transmitter coil: 20 cm, 2 turn PCB coil [0072] Receiver coil: 20 cm, 2 turn PCB coil [0073] Rectifier: full bridge Class D rectifier [0074] No PFC stage; instead, an output capacitance of 100 pF after the IPT rectifier

[0075] Accordingly, Experiment 1 gave results for an IPT system with an active PFC stage at the receiving end. The drain voltage waveforms (i.e. the voltage measured between the drain and the source of the transistor, with one waveform for each transistor of the push-pull inverter) and the inverter input current waveforms for Experiment 1 are shown in FIG. 4. The power factor in Experiment 1 was 0.9989.

[0076] In contrast, Experiment 2 gave results for an IPT system without a PFC stage at the receiving end. The drain voltage waveforms and the inverter input current waveforms for Experiment 2 are shown in FIG. 5. The power factor in Experiment 2 was 0.8519.

[0077] It can be seen that the inverter input current waveform in FIG. 4 is the absolute value of a sinusoidal wave in phase with the input-rectified AC voltage, meaning that the power factor in Experiment 1 is close to 1. In contrast, the inverter input current waveform in FIG. 5 is distorted and is phase shifted with respect to the rectified input voltage, meaning that the power factor is reduced.

[0078] The drain voltage waveforms in FIG. 4 have lower maximum values than the drain voltage waveforms in FIG. 5, showing that the system performs better when the active PFC stage is implemented at the receiving end (i.e. the experimental setup of Experiment 1 performs better than the experimental setup of Experiment 2).