High Density Corrosion Resistant Layer Arrangement For Electrostatic Chucks
20220199451 · 2022-06-23
Assignee
Inventors
Cpc classification
C04B2235/96
CHEMISTRY; METALLURGY
C04B2235/3251
CHEMISTRY; METALLURGY
C04B2235/3225
CHEMISTRY; METALLURGY
C04B2235/72
CHEMISTRY; METALLURGY
C04B2235/3232
CHEMISTRY; METALLURGY
C04B2235/5445
CHEMISTRY; METALLURGY
C04B2237/68
CHEMISTRY; METALLURGY
International classification
Abstract
A layer arrangement for an electrostatic chuck comprises a first ceramic layer; a second ceramic layer; a metallised layered disposed between the first and second ceramic layers. The first ceramic layer comprises at least 90.0 wt % 5 alumina, titania, ZrO.sub.2, Y2O.sub.3, AlN, Si.sub.3N.sub.4, SiC, transition metal oxides or combinations thereof; and in the range of 0.1 to 10.0 wt % tantalum oxide (Ta.sub.2O.sub.5).
Claims
1. A layer arrangement for an electrostatic chuck comprising: (A) a first ceramic layer; (B) a second ceramic layer; (C) a metallised layer disposed between the first and second ceramic layers, wherein the first ceramic layer comprises: at least 90.0 wt % alumina, titania, ZrO.sub.2, Y.sub.2O.sub.3, AlN, Si.sub.3N.sub.4, SiC, transition metal oxides or combinations thereof; and in the range of 0.1 to 10.0 wt % tantalum oxide (Ta.sub.2O.sub.5); wherein a Ta.sub.2O.sub.5 concentration at or proximal to a top surface of the first ceramic layer is lower than a Ta.sub.2O.sub.5 concentration at or proximal to an interface of the first ceramic layer and the metallised layer.
2. The layer arrangement according to claim 1, wherein the first ceramic layer is a top dielectric layer.
3. The layer arrangement according to claim 2, wherein the top dielectric layer has a thickness in the range of 20 μm to 200 μm.
4. The layer arrangement according to claim 1, wherein the first ceramic layer comprises at least 98 wt % alumina.
5. The layer arrangement according to claim 1, wherein the first ceramic layer comprises at least 99.0 wt % of a total of the tantalum oxide, alumina, titania, ZrO.sub.2, Y.sub.2O.sub.3, AlN, Si.sub.3N.sub.4, SiC, and transition metal oxides.
6. The layer arrangement according to claim 1, wherein the metallisation layer comprises a metal selected from the group consisting of: platinum, palladium, tungsten, molybdenum, niobium, tantalum and alloys thereof.
7. The layer arrangement according to claim 1, wherein the second ceramic layer comprises alumina, titania, ZrO.sub.2, Y.sub.2O.sub.3, AlN, Si.sub.3N.sub.4, SiC, or combinations thereof.
8. The layer arrangement according to claim 1, further comprising a Ta.sub.2O.sub.5 phase at an interface of the first ceramic layer and the metallised layer.
9. (canceled)
10. The layer arrangement according to claim 1, wherein a cross sectional area of a Ta.sub.2O.sub.5 phase in the first ceramic layer proximal the metallisation layer is more than 20% greater than a cross sectional area of a Ta.sub.2O.sub.5 phases in the first ceramic layer proximal a top surface of the first ceramic layer.
11. The layer arrangement according to claim 1, wherein density of the first ceramic layer is greater than 97% of a theoretical maximum density thereof.
12. The layer arrangement according to claim 1, wherein a density of the second ceramic layer is lower than a density of the first ceramic layer.
13. The layer arrangement according to claim 1, wherein the first ceramic layer comprises an electrostatic charge dissipative material comprising alumina doped with a transition metal oxide and between 0.5 wt % and 10.0 wt % Ta.sub.2O.sub.5, wherein the transition metal oxide is present in an amount ranging from 1.0 wt % and 8.0 wt % based upon a total weight of ceramic material in the first ceramic layer.
14. The layer arrangement according to claim 13, wherein the transition metal oxide comprises titania (TiO.sub.2).
15. The layer arrangement according to claim 13, wherein the first ceramic layer comprises between 2.0 wt % and 6.0 wt % Ta.sub.2O.sub.5.
16. The layer arrangement according to claim 1, wherein the layered arrangement is a co-fired layered arrangement.
17. An electrostatic chuck comprising the layer arrangement according to claim 1.
18. An electrostatic chuck according to claim 17, wherein the first ceramic layer has a breakdown voltage of at least 60 V/μm.
19. A method of manufacturing a layer arrangement for an electrostatic chuck comprising: (A) forming a base layer comprising a first material in a green state; (B) applying a refractory metallisation-forming material to the base layer to form a metallisation layer; (C) disposing a top layer comprising a second material in a green state over the metallisation layer; (D) co-firing the base, metallisation, and top layers at sufficient temperature and time to form a liquid Ta.sub.2O.sub.5 phase, wherein the liquid Ta.sub.2O.sub.5 phase migrates towards interfaces between the top layer, the metallisation layer, and the base layer; and in the co-fired state, the top layer comprises a first ceramic material comprising: at least 90.0 wt % alumina, titania, ZrO.sub.2, Y.sub.2O.sub.3, AlN, Si.sub.3N.sub.4, SiC, or combinations thereof; and in the range of 0.1 to 10.0 wt % tantalum oxide (Ta.sub.2O.sub.5) and a Ta.sub.2O.sub.5 concentration at or proximal to a top surface of the top layer is lower than a Ta.sub.2O.sub.5 concentration at or proximal to an interface of the top layer and the metallisation layer.
20. The method according to claim 19, wherein the first ceramic material comprises greater than 99.0 wt % alumina and less than 1.0 wt % Ta.sub.2O.sub.5.
21. A product comprising the layer arrangement formed by the method according to claim 19.
22. A process of manufacturing a silicon wafer in a halogen gas environment, wherein the silicon wafer is electrostatically held by an electrostatic chuck formed by the method according to claim 19.
23. The process according to claim 22, wherein the halogen gas environment comprises chlorine or boron trichloride gas.
24. The process according to claim 22, wherein the process comprises ion implantation.
25. A layer arrangement for an electrostatic chuck comprising: (A) a first ceramic layer; (B) a second ceramic layer; (C) a metallised layer disposed between the first and second ceramic layers, wherein the first ceramic layer comprises an electrostatic charge dissipative material comprising alumina doped with a transition metal oxide and between 2.0 wt % and 10.0 wt % Ta.sub.2O.sub.5, wherein the transition metal oxide is present in an amount ranging from 1.0 wt % and 8.0 wt % based upon the total weight of the ceramic material in the first ceramic layer, and a Ta.sub.2O.sub.5 concentration at or proximal to a top surface of the first ceramic layer is lower than a Ta.sub.2O.sub.5 concentration at or proximal to an interface of the first ceramic layer and the metallised layer.
26. The layer arrangement according to claim 25, wherein the alumina doped with a transition metal oxide accounts for at least 90 wt % of the first ceramic layer.
Description
BRIEF DESCRIPTION OF THE FIGURES
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DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT
[0098] With reference to
[0099] Each of the dielectric layer 20, insulating layer 40 and base layer 60 comprised high purity alumina. The dielectric layer 20 comprised 99.5 wt % Al.sub.2O.sub.3, 0.5 wt % Ta.sub.2O.sub.5 and trace level of impurities. Both the thin insulating layer 40 and base layer 60 were formed from alumina powder having a nominal purity of 99.8 wt % Al.sub.2O.sub.3 (Al-998™). Other suitable alumina powders include Al-995™. A high purity alumina forms the basis for alumina formulations (Al-998™, AL-995™ and the E-1 formation), with the alumina particles having a mean particle size ˜1.2 μm; surface area ˜3.5 m.sup.2/g).
[0100] The ceramic layers were dry pressed using sprayed dried alumina; binders, dispersant and other additives as described in US20170057880, paragraphs 57 to 62.
[0101] With reference to
[0102] A magnified image of the interfacial region 80 illustrates the greater proportion of voids in this region compared to the bulk of the dielectric layer 20.
Examples
[0103] Samples
[0104] Sample E-1 has a composition of 99.5 wt % Al.sub.2O.sub.3 and 0.5 wt % Ta.sub.2O.sub.5. Other impurities are less than 0.1 wt %. Ta.sub.2O.sub.5 has a mean particle size of less than 1.0 μm, with a smaller particle size distribution (compared to Al.sub.2O.sub.3) assisting in the uniform dispersal of Ta.sub.2O.sub.5 in the Al.sub.2O.sub.3. E-1 has a density of 3.96 g/cm.sup.3.
[0105] Sample CE-1 is Al-995™ available from Morgan Advanced Ceramics (Hayward, Calif.), which has a composition of 99.5 wt % Al.sub.2O.sub.3 and 0.5 wt % of other materials (excluding Ta.sub.2O.sub.5) including, glass forming materials. CE-1 has a density of 3.91 g/cm.sup.3. The samples (E-1 and CE-1) were laminated at room temperature under 15 Kpsi pressure and then co-fired at 1575° C. for 2 hours in H.sub.2.
[0106] Sample E-2 has a composition of 2.0 wt % TiO.sub.2; 4.0 wt % Ta.sub.2O.sub.5; other impurities are less than 0.1 wt % and the remainder Al.sub.2O.sub.3. E-2 has a density of 3.96 g/cm.sup.3.
[0107] Sample CE-2 is a commercial composition, with Energy-dispersive X-ray Spectroscopy (EDS) analysis confirming the presence of a major Al.sub.2O.sub.3 component with minor components of TiO.sub.2; MgO, CaO and SiO.sub.2. CE-2 has a density of 3.85 g/cm.sup.3.
[0108] The samples (E-2 and CE-2) were laminated at room temperature under 15 Kpsi pressure and then co-fired at 1600° C. for 2 hours in H.sub.2.
[0109] Corrosive Resistance and Flexural Strength
[0110] Samples of CE1 and E1 of known weight and flexural strength and each with an average sample surface area of 15.5 cm.sup.2 were placed in a Teflon™ test vessels with 150 ml of aqueous hydrochloric acid, sulphuric acid, nitric acid or potassium hydroxide solutions each at a concentration of 20% v/v at 90° C. for 11 weeks. The samples were then reweighed and retested for flexural strength with the average results provided in
[0111] The results demonstrate the improved corrosion resistance and flexural strength of sample E-1 (Alumina-Ta.sub.2O.sub.5) compared to the sample CE-1 (Alumina-MgO-Silica).
[0112] Dielectric Properties
[0113] Sample E-1
[0114] The breakdown voltage was determined at room temperature in accordance with ASTM D149. The results (Table 1) indicate that the Al.sub.2O.sub.3—Ta.sub.2O.sub.5 dielectric layer has well over twice the breakdown voltage compared to conventional high purity alumina dielectric layers, thereby enabling thinner dielectric layers to be used.
TABLE-US-00001 TABLE 1 Thickness Breakdown Breakdown voltage (V/mil) (Mil) voltage (V) [V/μm] 5.5 9759 1774 [69.8] 5.5 9959 1774 [69.8] 5.5 11002 2000 [78.7] 5.5 >11000 2000 [78.7] 5.5 >11000 2000 [78.7] Average 10543 1910 [75.2]
[0115] Sample CE-1 has a reported dielectric breakdown voltage of 800 V/mil at room temperature.
[0116] The breakdown voltage was also determined in an ESC comprising a top dielectric layer comprising 99.8 wt % alumina (Al998™ from Morgan Advanced Ceramics) processed under the same conditions as E-1 and CE-1. The density was 3.92 g/cm.sup.3 and breakdown voltage varied between 569 and 943 V/mil with an average of 741 V/mil.
TABLE-US-00002 TABLE 2 Thickness Breakdown Breakdown voltage (V/mil) (Mil) voltage (V) [V/μm] 7.0 6659 951 [37.5] 7.0 6582 940 [37.0] 7.0 6418 917 [36.1] 7.0 8044 1149 [45.2] Average 6926 989 [38.9]
[0117] CE-2 had a breakdown voltage of 11V/μm.
[0118] The volume resistivity of E-2 was 2×10.sup.−11 ohm cm compared to 1×10.sup.−11 ohm cm of CE-2.
[0119] The layer arrangement herein is able to provide greater breakdown voltage (Table 2), corrosion resistance; and density compared to conventional electrostatic charge dissipative material of the prior art (e.g. U.S. Pat. No. 6,641,939).
[0120] Densification of the First Ceramic Layer
[0121] The samples were process as previously described, except that the sintering temperature and time was adjusted. The density of the first ceramic layer was affected by the temperature and the duration of time maintained at the sintering temperature. As indicated in Table 3, a combination of sintering temperature and time effect the densification process. If the sintering temperature is sufficiently high, then time may be the limiting factor for the liquid phase to penetrate the void spaces and increase densification.
TABLE-US-00003 TABLE 3 Sintering Temperature Time Density (g/cm.sup.3) (° C.) (hr) [% theoretical*] 1600 2 3.96 [99.25%] 1530 2 3.95 [99.00%] 1530 0.5 3.89 [97.49%] *the density of Al.sub.2O.sub.3 is taken to be 3.99 g/cm.sup.3
[0122] Distribution of Tantalum in the First Ceramic Layer
[0123] With reference to
[0124] The cross-sectional surface areas of the components of the dielectric layer were determined using ImageJ™, an image processing software tool. The void space and artefacts in the images (identified as black) were excluded from the total cross-sectional area. The graphical data was then converted to a binary format (white—tantalum portion; black—other) using a threshold based on the tone of the tantalum portion, with the composition verified from corresponding EDS spectrum, as indicated in the verification of a tantalum phase in Sample B (
[0125] The image analysis process of Sample (C) is illustrated in
[0126] A sample cross sectional area of approximately 312 μm.sup.2 (26 μm×12 μm) at a maximum point of no more than 30 μm from the metallisation layer for (C) and a maximum point of no more than 30 μm from the dielectric layer surface for (A)) was used to analyse the top (A), middle (B) and bottom (C) sections of the dielectric layers, with the results illustrated in Table 4 using EDS analysis. As illustrated in Table 4, the proportion of tantalum (relative to the total effective area of the sample, i.e. the total sample area minus the sample area taken up by voids and artefacts) was highest at the bottom (C) of the dielectric layer and the proportion of tantalum gradually decreased towards the top of the dielectric layer (A). This is referenced in the SEM images of sample area A (
TABLE-US-00004 TABLE 4 Dielectric Cross-sectional % change layer position area of Ta Phase from (A) Top (A) 0.29% — Middle (B) 0.50% 172% Bottom (C) 0.73% 252%
[0127] Reference throughout this specification to “one embodiment,” “certain embodiments,” “various embodiments,” “one or more embodiments” or “an embodiment” means that a particular feature, structure, material, or characteristic described in connection with the embodiment is included in at least one embodiment of the disclosure. Thus, the appearances of the phrases such as “in one or more embodiments,” “in certain embodiments,” “in various embodiments,” “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily referring to the same embodiment of the disclosure. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments.
[0128] Although the disclosure herein provided a description with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the present disclosure without departing from the spirit and scope thereof. Thus, it is intended that the present disclosure include modifications and variations that are within the scope of the appended claims and their equivalents.