Method for Producing a Semiconductor Body, A Semiconductor Body and an Optoelectronic Device
20220199405 · 2022-06-23
Inventors
Cpc classification
H01L31/032
ELECTRICITY
H01L21/02631
ELECTRICITY
C30B29/46
CHEMISTRY; METALLURGY
C30B23/06
CHEMISTRY; METALLURGY
H01L21/02485
ELECTRICITY
H01L21/02568
ELECTRICITY
International classification
H01L21/02
ELECTRICITY
H01L31/032
ELECTRICITY
Abstract
In an embodiment, a method includes providing a substrate and epitaxially growing a semiconductor layer of a semiconductor material on the substrate using physical vapor deposition, wherein the semiconductor material has a tetragonal phase, wherein the semiconductor material has the general formula: (In.sub.1-xM.sub.x)(Te.sub.1-yZ.sub.y), and wherein M=Ga, Zn, Cd, Hg, Tl, Sn, Pb, Ge, or combinations thereof, Z═As, S, Se, Sb, or combinations thereof, x=0-0.1, and y=0-0.1, or wherein the semiconductor material has the general formula: (In.sub.1-xTl.sub.x)(Te.sub.1-ySe.sub.y) with x=0-1 and y=0-1.
Claims
1. A method for producing a semiconductor body, the method comprising: providing a substrate; and epitaxially growing a semiconductor layer of a semiconductor material on the substrate using physical vapor deposition, wherein the semiconductor material has a tetragonal phase, wherein the semiconductor material has the general formula: (In.sub.1-xM.sub.x)(Te.sub.1-yZ.sub.y), and wherein M=Ga, Zn, Cd, Hg, Tl, Sn, Pb, Ge, or combinations thereof, Z═As, S, Se, Sb, or combinations thereof, x=0-0.1, and y=0-0.1, or wherein the semiconductor material has the general formula: (In.sub.1-xTl.sub.x)(Te.sub.1-ySe.sub.y) with x=0-1 and y=0-1.
2. The method according to claim 1, wherein the semiconductor layer is a stoichiometric InTe layer.
3. The method according to claim 1, wherein the substrate is transparent for infrared and/or visible radiation.
4. The method according to claim 1, wherein the substrate is a r-Al.sub.2O.sub.3 substrate or a yttria-stabilized zirconia (YSZ) substrate.
5. The method according to claim 1, wherein the semiconductor layer has a thickness between 5 nm to 5000 nm inclusive.
6. The method according to claim 1, wherein the physical vapor deposition is performed by a pulsed laser deposition, a vapor-phase epitaxy, a metal organic vapor-phase epitaxy, a molecular-beam epitaxy, a magnetron sputtering, an electron-beam epitaxy, a thermal evaporation epitaxy, or a pulsed electron epitaxy.
7. The method according to claim 1, wherein the physical vapor deposition is performed at a temperature between room temperature and 900° C. inclusive.
8. The method according to claim 1, wherein the physical vapor deposition is performed at a pressure between 1×10.sup.−6 Torr and 750 Torr inclusive.
9. The method according to claim 1, wherein a surface of the semiconductor layer is structurally engineered after epitaxially growing the semiconductor layer.
10. The method according to claim 9, wherein, during the structurally engineering, micron- and/or nano-sized structures are formed on the surface of the semiconductor layer by etching.
11. The method according to claim 1, wherein a further semiconductor layer of a further semiconductor material is epitaxially grown on the semiconductor layer.
12. The method according to claim 11, wherein the further semiconductor material has a tetragonal phase, wherein the further semiconductor material has the general formula: (In.sub.1-xM.sub.x)(Te.sub.1-yZ.sub.y), and wherein M=Ga, Zn, Cd, Hg, Tl, Sn, Pb, Ge, or combinations thereof, Z═As, S, Se, Sb, or combinations thereof, x=0-0.1, and y=0-0.1, or wherein the further semiconductor material has the general formula (In.sub.1-xTl.sub.x)(Te.sub.1-ySe.sub.y), wherein x=0-1 and y=0-1.
13. A semiconductor body comprising: a semiconductor layer of a semiconductor material, wherein the semiconductor layer is epitaxially grown, wherein the semiconductor layer has a bandgap between 0.1 eV and 1.0 eV inclusive, wherein the semiconductor material has a tetragonal phase, and wherein the semiconductor material has the general formula: (In.sub.1-xM.sub.x)(Te.sub.1-yZ.sub.y), and wherein M=Ga, Zn, Cd, Hg, Tl, Sn, Pb, Ge, or combinations thereof, Z═As, S, Se, Sb, or combinations thereof, x=0-0.1, and y=0-0.1, or wherein the semiconductor material has the general formula (In.sub.1-xTl.sub.x)(Te.sub.1-ySe.sub.y), wherein x=0-1 and y=0-1.
14. The semiconductor body according to claim 13, wherein the semiconductor layer is a stoichiometric InTe layer.
15. The semiconductor body according to claim 13, wherein a surface of the semiconductor layer comprises micron- and/or nano-sized structures.
16. The semiconductor body according to claim 13, further comprising a further semiconductor layer of a further semiconductor material arranged on the semiconductor layer.
17. An optoelectronic device comprising: the semiconductor body according to claim 13, wherein the optoelectronic device forms at least one of the following elements: a detector, a sensor, an emitter, a switching device, or a photo responsive device.
18. The optoelectronic device according to claim 17, wherein the semiconductor body comprises a semiconductor layer and a further semiconductor layer, and wherein the semiconductor layer and the further semiconductor layer are doped differently.
19. The optoelectronic device according to claim 17, further comprising an infrared light or a visible light emitting material, wherein the emitting material is arranged on the semiconductor body or on a surface of a substrate facing away from the semiconductor body.
20. The optoelectronic device according to claim 17, further comprising an infrared light or a visible light detecting material, wherein the detecting material is arranged on the semiconductor body or on a surface of a substrate facing away from the semiconductor body.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0066] Advantageous embodiments and developments of the method for producing a semiconductor body, a semiconductor body, and an optoelectronic device will become apparent from the exemplary embodiments described below in conjunction with the figures.
[0067] In the figures:
[0068]
[0069]
[0070]
[0071] In the exemplary embodiments and figures, similar or similarly acting constituent parts are provided with the same reference symbols. The elements illustrated in the figures and their size relationships among one another should not be regarded as true to scale. Rather, individual elements may be represented with an exaggerated size for the sake of better representability and/or for the sake of better understanding.
DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
[0072]
[0073] Each semiconductor body 1 in
[0074] There is an exception to above statements for the case of Tl and Se as dopant elements. These dopant elements can replace In and Te completely to form a TlSe material without affecting the crystal structure.
[0075] The semiconductor body 1 in
[0076] Alternatively, as shown in
[0077] A semiconductor body comprising an epitaxially grown semiconductor layer of stoichiometric InTe was produced as follows:
[0078] A thin film of stoichiometric InTe was grown on a r-sapphire (r-Al.sub.2O.sub.3) substrate using pulsed laser deposition (PLD). An InTe target with a purity of 99.99% was used for vaporizing the InTe. The deposition of the vaporized InTe onto the substrate was carried out in an argon environment with a deposition pressure of 10 mTorr, a substrate temperature of 650° C., a deposition time of 20 min, a laser energy density of approximately 2 J/cm.sup.2, and a laser repetition rate of 5 Hz. The InTe film grew epitaxially due to the close lattice matching between the substrate and InTe. The InTe film exhibited epitaxial quality (
[0079] The semiconductor body 1 in
[0080] The structures 5 are produced by etching, for example chemical etching or laser etching. The structures 5 are micron- and/or nano-sized structures that are arranged ordered or randomized. The structures 5 can have a form of a pyramid, a truncated pyramid, an inverted pyramid, a cone, a truncated cone, an inverted cone, and/or a cylinder. The structures 5 can have a diameter and/or a height between and including 1 nm and 50 μm. The structures 5 can form a periodic or an aperiodic pattern. For example, the structures 5 form a periodic optical nanostructure such as a photonic crystal.
[0081] The semiconductor body 1 in
[0082] The further semiconductor material of the further semiconductor layer 6 is, in particular, a semiconductor material as disclosed as the semiconductor material of the semiconductor layer 3.
[0083] The semiconductor material of the semiconductor layer 3 and the further semiconductor material of the further semiconductor layer 6 can be doped differently. For example, the semiconductor material can be p-type doped and the further semiconductor material can be n-type doped. Alternatively, the semiconductor material can be n-type doped and the further semiconductor material can be p-type doped.
[0084] The surface 7 of the further semiconductor layer 6 can comprise structures 5 (
[0085]
[0086] The semiconductor material 3 and the material of the further semiconductor layer 6 are doped differently to create a junction in a semiconductor body 1 while using only one semiconductor material, for example, stoichiometric InTe. For example, the material of semiconductor layer can be p-type doped and the material of the further semiconductor layer can be n-type doped. Alternatively, the semiconductor material can be n-type doped and the material of the further semiconductor layer can be p-type doped. The n-type doping and the p-type doping are achieved by ion implantation or lattice site substitution. For example, In.sup.3+ ions can be replaced by Si.sup.4+ or Sn.sup.4+ ions in order to form a n-type doped semiconductor layer.
[0087]
[0088] For example, the semiconductor body 1 is configured as an infrared emitter and arranged on the substrate 2. A GaN blue LED is arranged on the opposite side of the substrate 2 as a visible emitting material 12. The optoelectronic component 10 is thus a hybrid emitter emitting visible and infrared radiation using a single substrate 2.
[0089] Alternatively, the material 12, 13 can be deposited or bonded or epitaxially grown on the semiconductor body 1 (not shown).
[0090]
[0091] The features and exemplary embodiments described in connection with the figures can be combined with each other according to further exemplary embodiments, even if not all combinations are explicitly described. Furthermore, the exemplary embodiments described in connection with the figures may have alternative or additional features as described in the general part.
[0092] The invention is not restricted to the exemplary embodiments by the description on the basis of said exemplary embodiments. Rather, the invention encompasses any new feature and also any combination of features, which in particular comprises any combination of features in the patent claims and any combination of features in the exemplary embodiments, even if this feature or this combination itself is not explicitly specified in the patent claims or exemplary embodiments.