ANALYSIS CHANNELIZERS WITH EVEN AND ODD INDEXED BIN CENTERS
20220200635 · 2022-06-23
Inventors
Cpc classification
H04B1/18
ELECTRICITY
H04L27/345
ELECTRICITY
H04B1/001
ELECTRICITY
International classification
H04B1/00
ELECTRICITY
H04B1/18
ELECTRICITY
Abstract
Analysis channelizers are provided. In one embodiment, the channelizer includes an M-path filter receiving an input signal; a circular buffer in communication with the M-path filter; and an M-point inverse fast Fourier transform (IFFT) circuit in communication with the circular buffer, such that the channelizer aligns spectra of the input signal with spectral responses an odd length, non-maximally decimated filter bank by alternating sign heterodyne of the input signal. The channelizer applies an equivalency theorem to the non-maximally decimated filter bank formed by an odd length polyphaser filter. Advantageously, the M-path filter does not require on-line signal processing to obtain odd-indexed filter centers. In another embodiment, the channelizer alternates a sign heterodyne of a filter coefficient weight.
Claims
1. An analysis channelizer, comprising: an M-path filter receiving an input signal; a circular buffer in communication with the M-path filter; and an M-point inverse fast Fourier transform (IFFT) circuit in communication with the circular buffer, wherein the channelizer aligns spectra of the input signal with spectral responses an odd length, non-maximally decimated filter bank by alternating sign heterodyne of the input signal.
2. The channelizer of claim 1, wherein the channelizer applies an equivalency theorem to the non-maximally decimated filter bank formed by an odd length polyphaser filter.
3. The channelizer of claim 1, wherein the M-path filter does not require on-line signal processing to obtain odd-indexed filter centers.
4. The channelizer of claim 1, wherein the channelizer is implemented using one or more of an application-specific integrated circuit (ASIC), a digital signal processor (DSP), a field-programmable gate array (ASIC), a microprocessor, or software executed by a general-purpose processor.
5. The channelizer of claim 1, wherein the channelizer is implemented in a radiofrequency transceiver including one or more of a cellular transceiver, a satellite transceiver, a wireless networking transceiver, or a short-range transceiver.
6. An analysis channelizer, comprising: an M-path filter receiving an input signal; a circular buffer in communication with the M-path filter; and an M-point inverse fast Fourier transform (IFFT) circuit in communication with the circular buffer, wherein the channelizer alternates a sign heterodyne of a filter coefficient weight.
7. The channelizer of claim 6, wherein the channelizer applies an equivalency theorem to a non-maximally decimated filter bank formed by an odd length polyphaser filter.
8. The channelizer of claim 6, wherein the M-path filter does not require on-line signal processing to obtain odd-indexed filter centers.
9. The channelizer of claim 6, wherein the channelizer is implemented using one or more of an application-specific integrated circuit (ASIC), a digital signal processor (DSP), a field-programmable gate array (ASIC), a microprocessor, or software executed by a general-purpose processor.
10. The channelizer of claim 6, wherein the channelizer is implemented in a radiofrequency transceiver including one or more of a cellular transceiver, a satellite transceiver, a wireless networking transceiver, or a short-range transceiver.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0007] The foregoing features of the invention will be apparent from the following Detailed Description of the Invention, taken in connection with the accompanying drawings, in which:
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DETAILED DESCRIPTION
[0016] The present disclosure relates to analysis channelizers with even and odd indexed bin centers, as described in detail below in connection with
[0017]
[0018] The standard response to the problem that a signal and a filter do not reside at the same center frequency is to move one of them: the signal to the filter (by the Armstrong heterodyne) or the filter to the signal (using the Equivalency theorem). These two options are shown in
[0019]
[0020] The benefits of selecting an M-path channelizer with M selected to be odd integer were explored. We used the fact that while DC resided on an FFT index, the half sample rate resided midway between a pair of FFT indices. The input heterodyne of DC to the half sample rate placed bin centers offset from DC by half the channel spacing. We still have to access alternate input samples to perform sign reversals. While we have avoided the complex rotation we are still accessing input samples at the high input sample rate. We wonder if we can use the odd length FFT with the embedded offset at the half sample rate but avoid the heterodyne of the signal to the half sample rate. We now examine how the alternating sign input data interacts with the filter coefficients.
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[0024] It is noted that the channelizer 30 (whether implemented as the first processing circuit 32 or the second processing circuit 34) could be implemented using any suitable processor such as an application-specific integrated circuit (ASIC), a digital signal processor (DSP), a field-programmable gate array (ASIC), a microprocessor, or as software executed by a general-purpose processor. It is additionally noted that the channelizer 30 could be implemented in a radiofrequency transceiver, which could include, but is not limited to, a cellular transceiver (e.g., base station or mobile device supporting one or more communications protocols such as 3GPP, 4G, 5G, etc.), a satellite transceiver (e.g., an earth station or a satellite in space), a wireless networking transceiver (e.g., a WiFi base station or WiFi-enabled device), a short-range (e.g., Bluetooth) transceiver, or any other radiofrequency transceiver.
[0025]
[0026] If there is a need for an even length transform, one would lose the half sample rate being located midway between DFT frequency indices. We can still use the spectral location between DFT indices at the quarter sample rate. As an example,
[0027] Disclosed herein is an M-channel analysis channelizer with frequency bin centers offset from DC by half their channel spacing. This bin location variation is traditionally referred to as odd indexed bin centers. The reason designs use the odd indexed bin centers is that one can form a symmetric allocation of channels with an even number of bin centers. When we have the even indexed bin centers, the symmetric channel assignment have an odd number of channels with one channel centered at DC which may or may not be occupied. Many OFDM based systems avoid centering a channel at DC due to the DC bin corruption by various DC intrusion sources. These sources include analog mixers self-mixing components, analog-to-digital converter (ADC) truncation quantization of input samples, and 2's complement bias due to truncation arithmetic. The traditional response to aligning the bin centers of an analysis channelizer with the offset bin centers of a multichannel odd indexed bin centered received signal is a complex heterodyne applied to the received signal. Another option embeds the heterodyne in the filter weights of the channelizer. As disclosed herein, a channelizer with an odd number of paths and an odd number center frequencies in its IFFT algorithm had an interesting symmetry anomaly. The IFFT bin centers symmetric about DC include the DC bin but the bin centers symmetric about the half sample rate bracketed the half sample rate. The half sample rate resided midway between IFFT bins, the property we desired in the odd indexed channelizer. By translating DC to the half sample rate of a channelizer with an odd number of paths, we had the odd indexed channelizer without the complex heterodyne of data or filter weights. We then showed that under simple conditions, the sign reversals of the signal samples could be embedded in the polyphase filter weights so no operation was applied to input samples at the high input sample rate.
[0028] Having thus described the system and method in detail, it is to be understood that the foregoing description is not intended to limit the spirit or scope thereof. It will be understood that the embodiments of the present disclosure described herein are merely exemplary and that a person skilled in the art can make any variations and modification without departing from the spirit and scope of the disclosure. All such variations and modifications, including those discussed above, are intended to be included within the scope of the disclosure. What is desired to be protected by Letters Patent is set forth in the following claims.