SEAMLESS AUDIO TRANSFER IN A MULTI-PROCESSOR AUDIO SYSTEM
20220191616 · 2022-06-16
Assignee
Inventors
- Gerhard Dochow (Wetzlar, DE)
- Thomas Göhring (Wetzlar, DE)
- Meinrad Niemöller (Hüttenberg-Rechtenbach, DE)
Cpc classification
H04R5/04
ELECTRICITY
H04R2420/01
ELECTRICITY
International classification
Abstract
A processing unit for an audio system of a vehicle comprises a first processing node, a second processing node and a program memory. The program memory may be overwritten by the first processing node and by the second processing node. After the processing unit has started up the first processing node may compute and write to the program memory an audio output. The processing unit may also perform a handover of the computing of the audio output from the first processing node to the second processing node when the first processing node has overwritten the program memory up to a predefined point and when the second processing node is operational. The second processing node is designed to compute the audio output after the handover, and to write this audio output to the program memory.
Claims
1-11. (canceled)
12. A processing unit for an audio system of a vehicle comprising: a first processing node; a second processing node; a program memory designed to be overwritten by the first processing node and by the second processing node, wherein after the processing unit has started up, the first processing node computes and writes to the program memory an audio output; wherein the processing unit performs a handover of the computing of the audio output from the first processing node to the second processing node when the first processing node has overwritten the program memory up to a predefined point and the second processing node is operational; and wherein the second processing node computes the audio output after the handover and writes this audio output to the program memory.
13. The processing unit as claimed in claim 12, further comprising an audio output system, which outputs the audio output saved in the program memory.
14. The processing unit as claimed in claim 13, wherein the program memory comprises a first memory area and a second memory area, wherein the processing unit first overwrites the first memory area with the audio output, and switches to the second memory area when the first memory area is overwritten up to the predefined point; wherein the audio output system outputs the audio output saved in the first memory area, and then switches to the audio output saved in the second memory area; and wherein the processing unit overwrites the first memory area again with the audio output when the audio output saved in the first memory area has been output and when the second memory area is overwritten up to a predefined point, in order that the first memory area and the second memory area are each alternately overwritten with the audio output.
15. The processing unit as claimed in claim 14, wherein the processing unit performs the handover of the computing of the audio output from the first processing node to the second processing node when one of: the first processing node has overwritten the first memory area; and the first processing node has overwritten the second memory area up to the predefined point and when the second processing node is operational.
16. The processing unit as claimed in claim 14, wherein the program memory comprises a third memory area, wherein the first processing node stores in the third memory area the exact playback position of an audio file accessible to the first processing node and the second processing node for a seamless handover of the audio output when one of the first memory area and the second memory area have been overwritten up to the predefined point.
17. The processing unit as claimed in claim 16, wherein the first processing node triggers an interrupt signal which signals that one of the first memory area and the second memory area are overwritten up to the predefined point; and wherein the second processing node takes over the audio output in response to the interrupt signal by said second processing node by reading the exact playback position from the third memory area, computing the audio output, and saving the audio output in the first memory area or in the second memory area.
18. The processing unit as claimed in claim 14, wherein the first memory area and the second memory area are each of a size that corresponds to an output time of the audio output t, and wherein the output time of the audio output t is longer than the time needed for the handover.
19. The processing unit as claimed in claim 12, wherein the processing unit is in a vehicle.
20. A method for seamless handover of an audio output comprising: computing an audio output with a first processing node; overwriting a program memory with the computed audio output with the first processing node; handing over the computed audio output from the first processing node to a second processing node when the first processing node has overwritten the program memory up to a predefined point and when the second processing node is operational; computing the audio output with the second processing node; and overwriting the program memory with the computed audio output with the second processing unit.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0043] The figures are schematic and not to scale. Where the same reference signs are stated in the following description of the figures, they denote identical or similar elements.
[0044]
[0045]
[0046]
[0047]
[0048]
DETAILED DESCRIPTION
[0049]
[0050] The first or second memory area 31, 32 respectively is overwritten up to a predefined point, for example in full. After each overwriting of the first or second memory area 31, 32, the first processing node 10 generates an interrupt signal that signals to the second processing node 20 that a handover can take place. It should be noted that this interrupt signal only results in a handover of the computation when the second processing node 20 is operational and initiates the handover within a predefined time interval in response to the interrupt signal. In addition, after each overwriting of the first or second memory area 31, 32, the first processing node writes to the third memory area 33 the current playback position of an audio file accessible to both processing nodes 10, 20. On a handover taking place, the second processing node 20 can thereby continue with the computation of the forthcoming audio output at the correct position. It should be noted that the first or second processing node can compute the audio output, for instance on the basis of a sinusoidal signal, or the processing node can determine from a predefined number of audio files the appropriate audio file and playback position, and store, write or save these in the shared program memory 30. Once the handover has taken place, the second processing node 20 computes the audio output, and can also include in the computation further audio functions such as multimedia applications and navigation instructions, whereby a full audio output is possible. This computed audio output is then in turn stored or saved in the shared program memory so that it can be output by the audio output system 40.
[0051]
[0052]
[0053]
[0054] Meanwhile, the second processing node is initialized in the intermediate step S21. This initialization may take significantly longer than the execution of the first follow-on steps S12, S13, S14, S15 and S16 by the first processing node. Once the second processing node has completed its initialization in step S21, it makes a request to the first processing node for audio handover, for instance by writing an agreed value “REQUEST” to a memory address HANDOVER, which address can be read by the first processing node. This memory address may be initialized earlier with a different value.
[0055] When the Direct Memory Controller has output its data from the first memory area starting from address A, and has signaled this to the first processing node, for instance using an interrupt signal, the first processing node continues with step S12 and refills the memory area starting from address A, i.e. computes the relevant audio output and stores the audio data starting from address A.
[0056] Meanwhile, the Direct Memory Controller continues to read the audio data starting from address B and to output this audio data to the audio peripherals.
[0057] After step S12, the first processing node inquires in step S13 whether the second processing node is requesting an audio handover, and does this by checking the value in the memory address HANDOVER to determine whether this address contains the value “REQUEST”. If this is not the case, in step S14 the next audio segment is computed while waiting for the Direct Memory Controller to signal that the DMA controller has read the data in full from the memory area starting from address B. Then the newly computed audio segment is written to the program memory starting from address B.
[0058] Meanwhile, the Direct Memory Controller continues to read the audio data starting from address A and to output this audio data to the audio peripherals. After step S14, the first processing node again inquires, in step S15, whether the second processing node is requesting an audio handover, and does this by again checking the value of HANDOVER to determine whether this contains the value “REQUEST”. If this is not the case, once again there is a wait for the Direct Memory Controller to signal that the DMA controller has read the data in full from the memory area starting from address A, and has output this data to the audio peripherals. The process then continues with step S12.
[0059] This cycle repeats until, in steps S13 or S15, the first processing node ascertains, immediately after the signaling by the audio output system, that the address HANDOVER contains the value “REQUEST” and thus the second processing node has requested the audio handover from the first processing node, and both possible flow paths come together in step S16.
[0060] The first and second memory areas can hence be overwritten alternately with the computed audio output. The audio output system, however, reads and outputs the audio output stored in the first memory area. As soon as the audio output has been output from the first memory area, the audio output system switches to the second memory area and outputs the audio output saved there. Once this has also been output, the audio output system switches back again to the first memory area, resulting in an alternating output of the audio output. In order to ensure seamless output of the audio output the handover is performed between the two processing nodes when the audio output system is currently playing out the one memory area and the other memory area can be overwritten.
[0061] In step S16, the first processing node copies the audio management status (which audio sources are currently active), which address area A or B has most recently been overwritten with audio data, and the exact playback position(s) into a third memory area, and signals this to the second processing node, for instance using an interrupt signal and by means of the jointly read/writeable memory address HANDOVER using the value “NOW”, which address the second node polls after step S21.
[0062] On the basis thereof, in step S17, the second processing node now computes the audio output and writes this audio output into the first or second memory area starting from address A or B, whichever is not currently being used for the output of the audio output. In addition, the interrupt requests for the audio output are diverted to the second processing node, so that future interrupts by the audio output unit (of the Direct Memory Access Controller) after the output in full of an audio segment starting from read address A or B cause refilling of audio data by the second processing node. The computation of the audio output is thereby handed over from the first processing node to the second processing node without the user being able to perceive any interruption in the audio output.
[0063]
[0078] The foregoing preferred embodiments have been shown and described for the purposes of illustrating the structural and functional principles of the present invention, as well as illustrating the methods of employing the preferred embodiments and are subject to change without departing from such principles. Therefore, this invention includes all modifications encompassed within the scope of the following claims.