Measurement device and material, tester

Abstract

In an FPGA, waveform data to be sent from the FPGA to a DAC is stored, and a logical circuit is configured from a detection circuit for extracting test force value and elongation value signal components from a signal input from an ADC, an offset subtractor, and a gain multiplier. The detection circuit extracts a resistance component proportional to the test force and displacement. In the detection circuit, an expression that includes a harmonic component of an odd multiple of the carrier frequency is used as a correlation function for extracting the resistance component. As a result, it is possible to obtain calculation results at a sampling frequency that is higher than the carrier frequency.

Claims

1. A measurement device for measuring a change in physical quantity generated in an object to be measured, the measurement device comprising: a detector that converts the change in physical quantity generated in the object to be measured into an electric signal and outputs the converted electric signal; and a sensor amplifier that applies a sinusoidal wave having a predetermined period for driving the detector to the detector and receives a signal output from the detector, wherein the sensor amplifier has a receiving circuit that extracts a component of a physical quantity measured by the detector from a received signal input from the detector to the sensor amplifier, and the receiving circuit uses, as a correlation function for extracting a resistance component converted from the physical quantity from the received signal, a function including: a component in synchronization with the sinusoidal wave having the predetermined period; and an odd harmonic component of the component in synchronization with the sinusoidal wave having the predetermined period.

2. The measurement device according to claim 1, wherein the receiving circuit extracts a resistance component As by an expression below using a function including a component in synchronization with the sinusoidal wave having the predetermined period and an odd harmonic component thereof when g(t) is set to a received signal, and G.sub.s(ω) is set to a Fourier transform of one period in a period of a carrier wave of g(t): $\left[\mathrm{Formula}1\right]$ $A_s=-\frac{\omega }{\pi }\mathrm{Im}\left[G_s\left(\omega \right)\right]=-\frac{\omega }{\pi }\underset{k=0}{\overset{n-1}{.Math.}}{\int }_0^{\frac{2\pi }{\omega }}g\left(t\right)\sin \left(2k+1\right)\omega t\mathrm{dt}.$

3. A material tester for executing material testing, the material tester comprising a load mechanism that applies a test force to a test piece, wherein the material tester includes the measurement device according to claim 1.

4. The material tester according to claim 3, wherein the measurement device is a measurement device including a load cell as a detector that detects a test force applied to the test piece or a measurement device including a displacement meter as a detector that detects a displacement generated in the test piece.

5. A material tester for executing material testing, the material tester comprising a load mechanism that applies a test force to a test piece, wherein the material tester includes the measurement device according to claim 2.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a schematic diagram of a material tester.

(2) FIG. 2 is a schematic diagram for description of a structure of each detector.

(3) FIG. 3 is a schematic configuration diagram illustrating a configuration of a measuring circuit.

(4) FIG. 4 is a block diagram for description of a functional configuration of a field programmable gate array (FPGA) 60.

(5) FIG. 5 is a graph showing a received signal.

(6) FIG. 6 is a graph showing a calculation result obtained by signal processing using conventional Expression (5).

(7) FIG. 7 is a graph showing a calculation result of Expression (8).

(8) FIG. 8 is a graph showing a received signal.

(9) FIG. 9 is a graph showing a calculation result obtained by signal processing using conventional Expression (5).

(10) FIG. 10 is a graph showing a calculation result of Expression (8).

(11) FIG. 11 is a graph showing a capacitive component.

(12) FIG. 12 is a graph showing a calculation result of Expression (8).

(13) FIG. 13 is a graph showing a correlation function used for Expression (8).

DETAILED DESCRIPTION OF THE DRAWINGS

(14) Hereinafter, an embodiment of the invention will be described based on drawings. FIG. 1 is a schematic diagram of a material tester.

(15) This material tester includes a tester body 1 and a control device 2. The tester body 1 includes a table 16, a pair of screw rods 11 and 12 rotatably and vertically arranged on the table 16 in a vertically oriented state, a crosshead 13 movable along these screw rods 11 and 12, a load mechanism 30 for moving the crosshead 13 to apply a load to a test piece 10, a load cell 14 serving as a detector that converts a change in physical quantity in the test piece 10 corresponding to an object to be measured into an electric signal, and a displacement meter 15.

(16) The crosshead 13 is connected to the pair of screw rods 11 and 12 through a nut (ball nut) (not illustrated). Worm reducers 32 and 33 in the load mechanism 30 are connected to lower end portions of the respective screw rods 11 and 12. The worm reducers 32 and 33 are connected to a servomotor 31 which is a drive source of the load mechanism 30, and rotation of the servomotor 31 is transmitted to the pair of screw rods 11 and 12 via the worm reducers 32 and 33. When the pair of screw rods 11 and 12 synchronously rotates due to rotation of the servomotor 31, the crosshead 13 is lifted and lowered along these screw rods 11 and 12.

(17) An upper gripper 21 for gripping an upper end portion of the test piece 10 is attached to the crosshead 13. Meanwhile, a lower gripper 22 for gripping a lower end portion of the test piece 10 is attached to the table 16. In the case of performing a tensile test, a test force (tensile test force) is applied to the test piece 10 by lifting the crosshead 13 while both end portions of the test piece 10 are gripped by the upper gripper 21 and the lower gripper 22.

(18) The control device 2 includes a computer, a sequencer, and peripheral devices thereof, has a central processing unit (CPU) that executes a logical operation, a read only memory (ROM) that stores an operation program necessary for control of the device, a random access memory (RAM) in which data, etc. is temporarily stored during controlling, etc., and includes a control panel 40 for controlling the entire device. Further, the control device 2 includes a load amplifier 41a serving as a sensor amplifier for the load cell, a strain amplifier 41b serving as a sensor amplifier for the displacement meter 15, and a display unit 48 for displaying a displacement amount or a test force detected by the load cell 14 and the displacement meter 15.

(19) When the load mechanism 30 is operated, a test force acting on the test piece 10 gripped at both ends by the upper gripper 21 and the lower gripper 22 is detected by the load cell 14 and input to the control panel 40 through the load amplifier 41a. In addition, a displacement amount generated in the test piece 10 is measured by the displacement meter 15 and input to the control panel 40 through the strain amplifier 41b.

(20) In the control panel 40, test force data and displacement amount data are fetched from the load cell 14 and displacement meter 15, and data processing is executed by the CPU. Further, in the control panel 40, rotational driving of the servomotor 31 is feedback-controlled using a variation of the test force and the displacement amount input as digital data by an operation of a control program stored in a digital circuit or the ROM.

(21) FIG. 2 is a schematic diagram for description of a structure of each detector. FIG. 3 is a schematic configuration diagram of a measuring circuit. FIG. 4 is a block diagram for description of a functional configuration of an FPGA 60. The measuring circuit illustrated in FIG. 3 is the same for all the detectors illustrated in FIG. 2, and thus is described as a configuration of a measuring circuit of a measurement device. Further, the load amplifier 41a and the strain amplifier 41b are referred to as a sensor amplifier 41 below.

(22) The material tester illustrated in FIG. 1 includes the load cell 14 and the displacement meter 15. The load cell 14 is a strain gauge type detector that measures a test force using a change in electrical resistance of a strain gauge, and includes abridge circuit in which strain gauges R1 to R4 having the same resistance value are connected as illustrated in FIG. 2(a).

(23) The displacement meter 15 includes a strain gauge type displacement meter, a differential transformer type displacement meter, and a potentiometer type displacement meter depending on the difference in measurement method, and the displacement meters are selected according to content of the test. Similarly to the load cell 14, the strain gauge type displacement meter includes the bridge circuit illustrated in FIG. 2(a). As illustrated in FIG. 2(b), the differential transformer type displacement meter is a detector that includes a primary coil T1, secondary coils T2A and T2B, and an iron core MC moving in conjunction with elongation of the test piece 10 and obtains a voltage output corresponding to a displacement using the fact that a difference depending on the position of the iron core MC is generated between induced voltages of the secondary coil T2A and the secondary coil T2B generated when the primary coil T1 is excited. In addition, as illustrated in FIG. 2(c), the potentiometer type displacement meter is a detector that includes a resistor TR and a wiper WP and converts a relative displacement amount of the resistor TR and the wiper WP into a voltage output. Sig− of the potentiometer type displacement meter is connected to a signal ground. Each of input terminals EX+ and EX− and output terminals Sig+ and Sig− of each detector illustrated in FIG. 2 is connected to a corresponding connection end of a cable unit 24.

(24) The sensor amplifier 41 includes an analog circuit having an instrumentation amplifier 56, a low pass filter (LPF) 57, an analog-digital converter (ADC) 58, a digital-analog converter (DAC) 51, operational amplifiers 52 and 54, and power amplifiers 53 and 55 and a digital circuit having the FPGA 60. A detector circuit 61 that stores waveform data sent from the FPGA 60 to the DAC 51 and extracts a signal component of a test force value or an elongation value from a signal input from the ADC 58, an offset subtracter 68, and a gain multiplier 69 are constructed as a logic circuit in the FPGA 60. The detector circuit 61 extracts a resistance component proportional to the test force and the displacement using Expression (8) described below. The offset subtracter 68 subtracts an offset value indicating a steady state at the time of starting of the test of the test force value or the elongation value from digital data passing through the detector circuit 61. The gain multiplier 69 adjusts a gain difference according to the detector. In this embodiment, the FPGA is used as an element for realizing a logic circuit for processing a digital signal. However, it is possible to use a programmable logic device (PLD) capable of rewriting an internal circuit or a microcomputer that performs a digital signal by software. In addition, in this embodiment, the receiving circuit includes an analog circuit up to the instrumentation amplifier 56, the LPF 57, and the ADC 58 and a digital circuit of the detector circuit 61, the offset subtracter 68, and the gain multiplier 69 of the FPGA 60.

(25) The detector and the sensor amplifier 41 are connected by the cable unit 24. The cable unit 24 includes a nonvolatile memory 25 that stores information about a type of each detector and information related thereto (type, full scale, etc.).

(26) A waveform signal of a drive voltage input to the input terminals EX+ and EX− of each detector is transmitted from the FPGA 60 to the DAC 51. A waveform generated from the DAC 51 is input to the operational amplifiers 52 and 54, regarded as a drive waveform of plus or minus with zero volt as a center, and then amplified by the power amplifiers 53 and 55, and supplied as an excitation signal to the detector. Signals output from the output terminals Sig+ and Sig− of the detector are input to the instrumentation amplifier 56, and a difference is extracted. Then, a component exceeding the Nyquist frequency of the ADC 58 is removed by the LPF 57, and then converted into a digital signal by the ADC 58, and input to the FPGA 60. Then, after signal processing in the FPGA 60, the test force value or the elongation value (displacement amount) of the test piece 10 is displayed on the display unit 48 through the control panel 40.

(27) A further description will be given of signal processing in the detector circuit 61 of the FPGA 60 in the measurement device having the above configuration. Fourier transform is used to drive the detector using a sinusoidal wave having a predetermined period and extract a component of a force or a displacement from a received signal. In the invention, unlike the past, a received signal g(t) is expressed by Expression (6) below, and Fourier transform G.sub.s(ω) thereof is defined as Expression (7). Further, a resistance component A.sub.s proportional to the magnitude of the test force applied to the test piece 10 or the displacement generated in the test piece 10 is extracted using Expression (8) derived by the convolution integral with the correlation function.

(28) A signal for driving the detector is a sinusoidal wave of a single frequency. However, a signal output from the detector is a signal obtained by amplitude-modulating a drive signal according to a state change (here, regarded as a displacement) of the detector. Therefore, the signal output from the detector includes a frequency of a displacement other than a frequency of the drive signal.

(29) $\begin{array}{cc}\left[\mathrm{Formula}8\right]& \\ g\left(t\right)=A\left(t\right)\sin \omega t+B\cos \omega t& \left(6\right)\\ \left[\mathrm{Formula}9\right]& \\ G_s\left(\omega \right)=\underset{k=0}{\overset{n-1}{.Math.}}{\int }_0^{\frac{2\pi }{\omega }}g\left(t\right)e^{-j\left(2k+1\right)\omega t}\mathrm{dt}& \left(7\right)\\ \left[\mathrm{Formula}10\right]& \\ A_s=-\frac{\omega }{\pi }\mathrm{Im}\left[G_s\left(\omega \right)\right]=-\frac{\omega }{\pi }\underset{k=0}{\overset{n-1}{.Math.}}{\int }_0^{\frac{2\pi }{\omega }}g\left(t\right)\sin \left(2k+1\right)\omega t\mathrm{dt}& \left(8\right)\end{array}$

(30) In addition, in the above Expressions, the resistance component A is set to A(t) which is written as a function of time for the following reason. The resistance component A refers to a component whose phase difference with respect to the drive signal to the detector is zero, and the magnitude at which this value varies with time may not be ignored. However, in calculation means of the invention, A.sub.s may not fully reproduce g(t), and thus A.sub.s is not a function of g(t) or t.

(31) In Expression (6), A(t) is a resistance component and B is a capacitance component. In addition, 2k+1 in Expression (7) and Expression (8) is a degree of a harmonic.

(32) A case in which the differential transformer type displacement meter as a detector is driven at a carrier frequency of 2 kHz will be described by comparing results of simulation of a conventional signal processing scheme and a signal processing scheme of the invention based on the above Expression (8). FIGS. 5 to 7 illustrate waveforms when amplitude modulation is performed with triangular waves. FIG. 5 is a graph showing a received signal, and FIG. 6 is a graph showing a calculation result obtained by signal processing using the conventional Expression (5). In addition, FIG. 7 is a graph showing a calculation result of Expression (8). In these figures, a vertical axis of the graph indicates a displacement (mm: millimeter), a horizontal axis of the graph indicates time (ms: millisecond), and measurement points are indicated by white circles.

(33) The received signal of FIG. 5 assumes a waveform when the iron core MC of the differential transformer displacement meter moves from 0 to 1 mm (millimeter) within a certain time (10 msec) and returns to a position of 0 again. When an assumed waveform of FIG. 6 is set to the received signal f(t) in the conventional Expression (1), calculation of the resistance component A obtained by the conventional Expression (5) uses the conventional Expression (3), and thus is performed only once for each cycle of the carrier frequency. For this reason, when the carrier frequency is 2 kHz, calculation is performed only every 500 microseconds even when a sampling frequency is 100 kHz. Therefore, according to the conventional signal processing scheme, as shown in FIG. 6, the measurement points of the displacement become sparse.

(34) Meanwhile, in a case in which the assumed waveform of FIG. 5 is set to the received signal g(t) in Expression (6), the carrier frequency is 2 kHz, and the sampling frequency is 100 kHz, when calculations according to Expression (7) and Expression (8) are performed, a calculation result is obtained every sampling period (10 microseconds). That is, 50 times the measurement point can be obtained when compared to the past. Therefore, as shown in FIG. 7, a graph showing a change in displacement at a certain time is a smooth graph in which the measurement points are continuous. In the graph of FIG. 7, n=5 in Expression (8), and harmonics up to nine times the carrier frequency are calculated.

(35) Each of FIG. 8 to FIG. 10 shows a waveform when amplitude is modulated by a rectangular wave. FIG. 8 is a graph showing a received signal, and FIG. 9 is a graph showing a calculation result obtained by signal processing using the conventional Expression (5). In addition, FIG. 10 is a graph showing a calculation result of Expression (8). In these figures, a vertical axis of the graph indicates a displacement (mm), a horizontal axis of the graph indicates time (ms), and measurement points are indicated by white circles.

(36) As in the case in which amplitude modulation is performed with triangular waves, when the assumed waveform of FIG. 8 is calculated using the conventional signal processing scheme, the resistance component A is calculated once for each cycle of the carrier frequency, and thus the measurement points of the displacement become sparse as shown in FIG. 9.

(37) Meanwhile, when calculations of Expression (7) and Expression (8) are performed with regard to the assumed waveform of FIG. 8, the resistance component As is calculated for each sampling period. Therefore, as shown in FIG. 10, it is possible to obtain a large number of measurement points of the displacement, which results in a smooth measurement result.

(38) A measurement result shown in the graphs of FIG. 7 and FIG. 10 becomes smoother as the number of n is increased (a degree is increased) in Expression (8). The number (or degree) of n is appropriately selected according to a relationship between the sampling frequency and the carrier frequency and a range in which a correlation function used for numerical integration can reproduce a harmonic component. For example, when the sampling frequency is 100 kHz, and the carrier frequency is 2 kHz, both frequencies have a 50-fold difference in frequency. In this case, a harmonic with which the correlation function used for numerical integration can be reproduced is a 9-fold odd harmonic, and n=5 is the number of n preferred in Expression (8).

(39) Next, the capacitive component will be considered. FIG. 11 is a graph showing a capacitive component. FIG. 12 is a calculation result of Expression (8). In these figures, a vertical axis of the graph indicates a displacement (mm), a horizontal axis of the graph indicates time (ms), and measurement points are indicated by white circles.

(40) Since the capacitive component is a component parasitic in the circuit without being proportional to the displacement, the received signal has a waveform shown in FIG. 11. When the received signal A(t)=0 and the capacitive component B=1 in Expression (6), a calculation result of Expression (8) for the capacitance component B becomes As=0. For this reason, as shown in FIG. 12, the capacitive component B which does not change with time is deleted during calculation.

(41) FIG. 13 is a graph showing a correlation function used in Expression (8). In this figure, a vertical axis of the graph corresponds to a correlation function, and a horizontal axis of the graph corresponds to time (ms). In FIG. 13, for convenience of description, correlation functions in the case in which n in Expression (8) is 1, 3, and 5 are indicated by different line types. In this figure, a broken line indicates a case in which n=1, 2, a dotted chain line indicates a case in which n=3, and an alternated long and short dash line indicates a case in which n=5. In addition, in the case of n=1, the same function as the correlation function used in the conventional Expression (5) is obtained, and thus the function is shown in the graph as an example of a conventional correlation function.

(42) A frequency (carrier frequency) of a fundamental wave exciting the detector may have a roughly determined frequency recommended by a type of the detector. Therefore, in the material tester, n in Expression (8) is preferably selected from 2 to 5 (odd harmonics from 3 to 9th order) from a range of a sampling frequency required for the type of the detector and material testing.

(43) The correlation function used in the conventional signal processing scheme only corresponds to a single sinusoidal wave (refer to n=1 of FIG. 13). However, in signal processing of the invention, odd harmonics (refer to n=3 and n=5 of FIG. 13) are included in the correlation function. In this way, when a function including not only a component synchronous with a sinusoidal wave (carrier frequency) of a predetermined cycle but also an odd harmonic component is used as the correlation function of Expression (8), it is possible to obtain a calculation result of the resistance component A.sub.s at a short time interval than before.

(44) In addition, according to processing of the received signal from the detector in the measurement device of the invention, it is possible to acquire a measurement result every sampling period of the sampling frequency required for material testing, and thus it is unnecessary to raise the carrier frequency in order to capture a fast change of the test piece 10 as in the past. Since the carrier frequency can be set to an appropriate frequency according to the type of the detector, even in a material tester including the displacement meter 15 having a different measuring scheme as illustrated in FIGS. 2(a) to 2(c), it is possible to acquire test data at a sampling frequency required for material testing.

REFERENCE SIGNS LIST

(45) 1 Tester body 2 Control device 10 Test piece 11 Screw rod 12 Screw rod 13 Crosshead 14 Load cell 15 Displacement meter 16 Table 21 Upper gripper 22 Lower gripper 24 Cable unit 25 Nonvolatile memory 30 Load mechanism 31 Servomotor 32 Worm reducer 33 Worm reducer 40 Control panel 41 Sensor amplifier 48 Display unit 51 DAC 52 Operational amplifier 53 Power amplifier 54 Operational amplifier 55 Power amplifier 56 Instrumentation amplifier 57 LPF 58 ADC 60 FPGA 61 Detector circuit 68 Offset subtracter 69 Gain modulator