Deep ultraviolet light emitting device

Abstract

A deep ultraviolet light emitting device includes: a light extraction surface; an n-type semiconductor layer provided on the light extraction surface; an active layer having a band gap of 3.4 eV or larger; and a p-type semiconductor layer provided on the active layer. Deep ultraviolet light emitted by the active layer is output outside from the light extraction surface. A side surface of the active layer is inclined with respect to an interface between the n-type semiconductor layer and the active layer, and an angle of inclination of the side surface is not less than 15° and not more than 50°.

Claims

1. A deep ultraviolet light emitting device comprising: a sapphire substrate having a light extraction surface; an n-type semiconductor layer provided on the sapphire substrate; an n-side electrode provided in a partial region on the n-type semiconductor layer; an active layer provided in a region on the n-type semiconductor layer different from the partial region and having a band gap of 3.4 eV or larger; a p-type semiconductor layer provided on the active layer; a p-side electrode provided on a top surface of the p-type semiconductor layer; and a protective layer covering plural side surfaces of each of the active layer and the p-type semiconductor layer, the protective layer being transparent to deep ultraviolet light emitted by the active layer, wherein the top surface of the p-type semiconductor layer has a first portion with which the p-side electrode is in physical contact and a second portion with which the p-side electrode is not in physical contact, the protective layer is in physical contact with the plural side surfaces of each of the active layer and the p-type semiconductor, the protective layer is in physical contact with a top surface of the n-type semiconductor layer, the protective layer is not in physical contact with the top surface of the p-type semiconductor layer, the deep ultraviolet light emitted by the active layer is output outside from the light extraction surface, and the plural side surfaces of each of the active layer and the p-type semiconductor layer are inclined with respect to an interface between the n-type semiconductor layer and the active layer, and an angle of inclination of the plural side surfaces are not less than 15° and not more than 50°; wherein the n-type semiconductor layer has a side surface perpendicular to the interface and the side surface of the n-type semiconductor layer is not coated with the protective layer.

2. The deep ultraviolet light emitting device according to claim 1, wherein the n-type semiconductor layer, the active layer, and the p-type semiconductor layer are AlGaN-based semiconductor layers.

3. The deep ultraviolet light emitting device according to claim 1, wherein the protective layer comprises silicon oxide (SiO.sub.2), silicon oxynitride (SiON), silicon nitride (SiN), aluminum oxide (Al.sub.2O.sub.3), or aluminum nitride (AlN).

4. The deep ultraviolet light emitting device according to claim 1, wherein the angle of inclination of the plural side surfaces of each of the active layer and the p-type semiconductor layer are not less than 20° and not more than 40°.

5. A deep ultraviolet light emitting device comprising: a sapphire substrate having a light extraction surface; an n-type semiconductor layer provided on the sapphire substrate; an n-side electrode provided in a partial region on the n-type semiconductor layer; an active layer provided in a region on the n-type semiconductor layer different from the partial region and having a band gap of 3.4 eV or larger; a p-type semiconductor layer provided on the active layer; a p-side electrode provided on a top surface of the p-type semiconductor layer; and a protective layer covering plural side surfaces of each of the active layer and the p-type semiconductor layer, the protective layer being transparent to deep ultraviolet light emitted by the active layer, wherein the top surface of the p-type semiconductor layer has a first portion with which the p-side electrode is in physical contact and a second portion with which the p-side electrode is not in physical contact, the protective layer is in physical contact with the plural side surfaces of each of the active layer and the p-type semiconductor, the protective layer is in physical contact with a top surface of the n-type semiconductor layer, the protective layer is not in physical contact with the top surface of the p-type semiconductor layer, the deep ultraviolet light emitted by the active layer is output outside from the light extraction surface, and the plural side surfaces of each of the active layer and the p-type semiconductor layer are inclined with respect to an interface between the n-type semiconductor layer and the active layer, and an angle θa of inclination of the plural side surfaces meet a relationship of the following expression ${\theta }_a<\frac{\pi \text{/}2+{\sin }^{-1}\left(1\text{/}{n}_1\right)}{2}$ wherein n.sub.1 is a refractive index of the active layer; wherein the n-type semiconductor layer has a side surface perpendicular to the interface and the side surface of the n-type semiconductor layer is not coated with the protective layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Embodiments will now be described by way of examples only, with reference to the accompanying drawings which are meant to be exemplary, not limiting and wherein like elements are numbered alike in several Figures in which:

(2) FIG. 1 is a cross sectional view schematically showing a configuration of a deep ultraviolet light emitting device according to the embodiment;

(3) FIG. 2 is a cross sectional view schematically showing a step of manufacturing a deep ultraviolet light emitting device;

(4) FIG. 3 is a cross sectional view schematically showing a step of manufacturing a deep ultraviolet light emitting device;

(5) FIG. 4 is a cross sectional view schematically showing a step of manufacturing a deep ultraviolet light emitting device;

(6) FIG. 5 is a cross sectional view schematically showing a step of manufacturing a deep ultraviolet light emitting device;

(7) FIG. 6 is a graph showing a simulation result of a deep ultraviolet light emitting device according to a comparative example;

(8) FIG. 7 is a graph showing a simulation result of a deep ultraviolet light emitting device according to the embodiment;

(9) FIG. 8 is a graph showing a relationship between the angle of inclination of the side surface and the amount of light output from the light extraction surface; and

(10) FIG. 9 schematically shows the benefit provided by the deep ultraviolet light emitting device according to the embodiment.

DETAILED DESCRIPTION OF THE INVENTION

(11) The invention will now be described by reference to the preferred embodiments. This does not intend to limit the scope of the present invention, but to exemplify the invention.

(12) A description will be given of an embodiment of the present invention with reference to the drawings. Like numerals are used in the description to denote like elements and the description is omitted as appropriate. To facilitate the understanding, the relative dimensions of the constituting elements in the drawings do not necessarily mirror the relative dimensions in the actual apparatus.

(13) FIG. 1 is a cross sectional view schematically showing a configuration of a deep ultraviolet light emitting device 10 according to the embodiment. The deep ultraviolet light emitting device 10 includes a substrate 12, a first base layer 14, a second base layer 16, an n-type clad layer 18, an active layer 20, an electron block layer 22, a p-type clad layer 24, a p-side electrode 26, an n-side electrode 28, and a protective layer 30. The deep ultraviolet light emitting device 10 is a semiconductor light emitting device configured to emit “deep ultraviolet light” having a central wavelength A of about 355 nm or shorter. To output deep ultraviolet light having such a wavelength, the active layer 20 is made of an aluminum gallium nitride (AlGaN)-based semiconductor material having a band gap of about 3.4 eV or larger. In this embodiment, the case of emitting deep ultraviolet light having a central wavelength A of about 310 nm or shorter is specifically discussed.

(14) In this specification, the term “AlGaN-based semiconductor material” mainly refers to a semiconductor material containing aluminum nitride (AlN) and gallium nitride (GaN) and shall encompass a semiconductor material containing other materials such as indium nitride (InN). Therefore, “AlGaN-based semiconductor materials” as recited in this specification can be represented by a composition In.sub.1-x-yAl.sub.xGa.sub.yN (0≤x+y≤1, 0≤x≤1, 0≤y≤1). The AlGaN-based semiconductor material shall contain AlN, GaN, AlGaN, indium aluminum nitride (InAlN), indium gallium nitride (InGaN), and indium aluminum gallium nitride (InAlGaN).

(15) Of “AlGaN-based semiconductor materials”, those materials that do not substantially contain AlN may be distinguished by referring to them as “GaN-based semiconductor materials”. “GaN-based semiconductor materials” mainly contain GaN and InGaN and encompass materials that additionally contain a slight amount of AlN. Similarly, of “AlGaN-based semiconductor materials”, those materials that do not substantially contain GaN may be distinguished by referring to them as “AlN-based semiconductor materials”. “AlN-based semiconductor materials” mainly contain AlN and InAlN and encompass materials that additionally contain a slight amount of GaN.

(16) The substrate 12 is a sapphire (Al.sub.2O.sub.3) substrate. The substrate 12 includes a crystal growth surface 12a and a light extraction surface 12b. For example, the crystal growth surface 12a is the (0001) plane of the sapphire substrate, and the first base layer 14 and the second base layer 16 are stacked on the crystal growth surface 12a. The first base layer 14 is a layer made of an AlN-based semiconductor material and is, for example, an AlN(HT-AlN) layer gown at a high temperature. The second base layer 16 is a layer made of an AlGaN-based semiconductor material and is, for example, an undoped AlGaN(u-AlGaN) layer.

(17) The substrate 12, the first base layer 14, and the second base layer 16 function as a foundation layer (template) to form the n-type clad layer 18 and the layers above. These layers also function as a light extraction substrate for extracting the deep ultraviolet light emitted by the active layer 20 outside and transmit the deep ultraviolet light emitted by the active layer 20. Accordingly, the deep ultraviolet light emitted by the active layer 20 is output outside from the light extraction surface 12b of the substrate 12. The light extraction surface 12b may be a texture surface formed with a micro-asperity structure of a submicron or submillimeter scale instead of a flat surface. By forming a texture structure on the light extraction surface 12b, reflection or total reflection on the light extraction surface 12b is inhibited and the light extraction efficiency is increased.

(18) The n-type clad layer 18 is an n-type semiconductor layer provided on the second base layer 16. The n-type clad layer 18 is made of a n-type AlGaN-based semiconductor material. For example, the n-type clad layer 18 is an AlGaN layer doped with silicon (Si) as an n-type impurity. The composition ratio of the n-type clad layer 18 is selected to transmit the deep ultraviolet light emitted by the active layer 20. For example, the n-type clad layer 18 is formed such that the molar fraction of AlN is 40% or higher, and, preferably, 50% or higher. The n-type clad layer 18 has a band gap larger than the wavelength of the deep ultraviolet light emitted by the active layer 20. For example, the n-type clad layer 18 is formed to have a band gap of 4.3 eV or larger. The n-type clad layer 18 has a thickness of about 100 nm-300 nm. For example, the n-type clad layer 18 has a thickness of about 200 nm.

(19) The n-side electrode 28 is formed on a first region W1 of the n-type clad layer 18. The active layer 20 is provided on a region of the n-type clad layer 18 different from the first region W1 (a second region W2 and a third region W3).

(20) The n-side electrode 28 is provided on the n-type clad layer 18 and is formed in the first region W1. For example, the n-side electrode 28 is formed by a titanium (Ti)/Al/Ti/Au stack structure. For example, the thickness of the first Ti layer is about 20 nm, the thickness of the Al layer is about 100 nm, the thickness of the second Ti layer is about 50 nm, and the thickness of the Au layer is about 100 nm.

(21) An n-type contact layer may be provided between the n-type clad layer 18 and the n-side electrode 28 to lower the contact resistance between the n-type clad layer 18 and the n-side electrode 28. The n-type contact layer may be made of an AlGaN-based semiconductor material or a GaN-based semiconductor material of an n-type having a composition ratio selected such that the Al content percentage thereof is lower than that of the n-type clad layer 18. It is preferable that the molar fraction of AlN in the n-type contact layer is 20% or lower, and it is more preferable that the molar fraction of AlN is 10% or lower.

(22) The active layer 20 is formed on the n-type clad layer 18. The active layer 20 is made of an AlGaN-based semiconductor material and has a double heterojunction structure by being sandwiched by the n-type clad layer 18 and the electron block layer 22. The active layer 20 may form a monolayer or multilayer quantum well structure. The quantum well structure like this can be formed by building a stack of a barrier layer made of an n-type AlGaN-based semiconductor material and a well layer made of an undoped AlGaN-based semiconductor material. To output deep ultraviolet light having a wavelength of 355 nm or shorter, the active layer 20 is formed to have a band gap of 3.4 eV or larger. For example, the composition ratio of the active layer 20 is selected so as to output deep ultraviolet light having a wavelength of 310 nm or shorter.

(23) The electron block layer 22 is a p-type semiconductor layer provided on the active layer 20. The electron block layer 22 is a layer made of a p-type AlGaN-based semiconductor material and is exemplified by a Mg-doped AlGaN layer. The composition ratio of the electron block layer 22 is selected such that the molar fraction of AlN in the electron block layer 22 is higher than that of the active layer 20 or the p-type clad layer 24. For example, the electron block layer 22 is formed such that the molar fraction of AlN is 40% or higher, and, preferably, 50% or higher. The electron block layer 22 may be formed such that the molar fraction of AlN is 80% or higher or may be made of an AlN-based semiconductor material that does not substantially contain GaN. The electron block layer 22 has a thickness of about 1 nm-10 nm. For example, the electron block layer 22 has a thickness of about 2 nm-5 nm.

(24) The p-type clad layer 24 is a p-type semiconductor layer provided on the electron block layer 22. The p-type clad layer 24 is a layer made of a p-type AlGaN-based semiconductor material and is exemplified by a Mg-doped AlGaN layer. The composition ratio of the p-type clad layer 24 is selected such that the molar fraction of AlN in the p-type clad layer 24 is higher than that of the active layer 20 and the molar fraction of AlN in the p-type clad layer 24 is lower than that of the electron block layer 22. The p-type clad layer 24 has a thickness of about 300 nm-700 nm. For example, the p-type clad layer 24 has a thickness of about 400 nm-600 nm.

(25) The p-side electrode 26 is provided on the p-type clad layer 24 and is formed in the second region W2. The p-side electrode 26 is made of a material capable of establishing ohmic contact with the p-type clad layer 24. For example, the p-side electrode 26 is formed by a nickel (Ni)/gold (Au) stack structure. For example, the thickness of the Ni layer is about 60 nm, and the thickness of the Au layer is about 50 nm.

(26) A p-type contact layer may be provided between the p-type clad layer 24 and the p-side electrode 26 to lower the contact resistance between the p-type clad layer 24 and the p-side electrode 26. The p-type contact layer may be made of an AlGaN-based semiconductor material or a GaN-based semiconductor material of a p-type having a composition ratio selected such that the Al content percentage thereof is lower than that of the p-type clad layer 24. It is preferable that the molar fraction of AlN in the p-type contact layer is 20% or lower, and it is more preferable that the molar fraction of AlN is 10% or lower.

(27) The active layer 20, the electron block layer 22, and the p-type clad layer 24 are configured such that a side surface 32 (mesa surface) is inclined. The inclined side surface 32 is located between the first region W1 where the n-side electrode 28 is formed and the second region W2 where the p-side electrode 26 is formed. The side surface 32 is formed to have an angle of inclination θa with respect to an interface 19 between the n-type clad layer 18 and the active layer 20. By inclining the side surface 32, deep ultraviolet light L emitted by the active layer 20 (e.g., a spot S) is caused to be rejected on the side surface 32 and to travel toward light extraction surface 12b of the substrate 12.

(28) The angle of inclination θa of the side surface 32 is configured to be not less than 15° and not more than 50°, and, preferably, not less than 20° and not more than 40°. By configuring the angle of inclination θa of the side surface 32 to be in this angular range, the amount of deep ultraviolet light output from the light extraction surface 12b is increased and the light extraction efficiency is increased. The reason that this angular range is preferable will be discussed later.

(29) The side surface 32 is coated with the protective layer 30. The protective layer 30 is made of an insulating material transparent to the deep ultraviolet light emitted by the active layer 20. For example, silicon oxide (SiO.sub.2), silicon oxynitride (SiON), silicon nitride (SiN), aluminum oxide (Al.sub.2O.sub.3), aluminum nitride (AlN), or the like may be used for the protective layer 30. It is desirable that the protective layer 30 is made of a material having a low reflectivity for deep ultraviolet light. Among the materials listed above, SiO.sub.2 (refractive index is 1.4) is preferable. By lowering the refractive index of the protective layer 30 and increasing the refractive index difference from the active layer 20 accordingly, the angular range in which total reflection on the side surface 32 occurs is enlarged and the deep ultraviolet reflectivity on the side surface 32 is increased. By using a transparent material for the protective layer 30, loss resulting from absorption of deep ultraviolet light by the protective layer 30 is reduced.

(30) A description will now be given of a method of manufacturing the deep ultraviolet light emitting device 10 with reference to FIGS. 2-5. First, as shown in FIG. 2, the first base layer 14, the second base layer 16, the n-type clad layer 18, the active layer 20, the electron block layer 22, and the p-type clad layer 24 are stacked successively on the substrate 12. The second base layer 16, the n-type clad layer 18, the active layer 20, the electron block layer 22, and the p-type clad layer 24 made of an AlGaN-based semiconductor material can be formed by a well-known epitaxial growth method such as the metalorganic chemical vapor deposition (MOVPE) method and the molecular beam epitaxial (MBE) method.

(31) Subsequently, as shown in FIG. 3, a mask layer 40 is formed on the p-type clad layer 24. The mask layer 40 is formed on the second region W2 and the third region W3 of the p-type clad layer 24. The mask layer 40 is formed to have a predetermined angle of inclination θb in the third region W3. The angle of inclination θb of the mask layer is adjusted by controlling the post-baking temperature for the resist used after the resist is exposed to form a mask pattern. For example, by using a lower post-baking temperature for the resist, the angle of inclination θb of the mask layer 40 is increased, and, by using a higher post-baking temperature for the resist, the angle of inclination θb of the mask layer 40 is decreased. While the adjustment is affected by the material of the resist used, the angle of inclination θb of the mask layer 40 can be adjusted between 70°-20° by adjusting the post-baking temperature between 100° C.-200° C.

(32) Subsequently, as shown in FIG. 4, the active layer 20, the electron block layer 22, and the p-type clad layer 24 are etched from above the mask layer 40. FIG. 4 shows the pre-etching structure in a broken line and shows the post-etching structure in a solid line. The mask layer 40 and the semiconductor layers are dry-etched by using reactive ion etching, plasma, etc. to form the side surface 32 having the angle of inclination θa corresponding to the angle of inclination θb of the mask layer 40. The dry-etching step is performed until a top surface 18a of the n-type clad layer 18 is exposed. The top surface 18a of the n-type clad layer 18 may be formed to be at the same height as the interface 19 between the n-type clad layer 18 and the active layer 20 or formed to be positioned lower than the interface 19. In the latter case, a portion of the n-type clad layer 18 may be removed by this etching step.

(33) The angle of inclination θa of the side surface 32 is determined by the angle of inclination θb of the mask layer 40 and the speed of etching the mask layer 40 and the semiconductor layers. For example, if the speed of etching the mask layer 40 is relatively higher than that of the semiconductor layers, the angle of inclination θa of the side surface 32 will be smaller than the angle of inclination θb of the mask layer 40. As a result, the angle of inclination θa of the side surface 32 can be adjusted in a range 15°-50° by adjusting the angle of inclination θb of the mask layer 40 in a range 20°-70°. It is difficult in terms of manufacturing to form the uniform side surface 32 having the angle of inclination less than 15°. In order to form the side surface 32 having the uniform angle of inclination θa, it is necessary to configure the angle of inclination θa to be 15° or larger. It is preferable to configure the angle to be 20° or larger.

(34) Subsequently, after removing the mask layer 40 that remains on the p-type clad layer 24, the protective layer 30 is formed as shown in FIG. 5. The protective layer 30 is provided to cover at least the active layer 20, the electron block layer 22, and the side surface 32 of the p-type clad layer 24. It is preferable that the protective layer 30 is formed to be thick enough to suitably reflect or totally reflect the deep ultraviolet light on the side surface 32. For example, the protective layer 30 may be configured to have a thickness of about 20 nm-300 nm.

(35) The protective layer 30 may be selectively formed on the side surface 32 by forming it from above a mask provided in the first region W1 and the third region W3. Alternatively, the protective layer may be formed to cover the entirety of the top surface 18a of the n-type clad layer 18, the side surface 32, and the top surface 24a of the p-type clad layer 24, whereupon the portions corresponding to the first region W1 and the third region W3 may be removed. In the latter case, the portions of the protective layer may be removed by dry etching using plasma, etc. Alternatively, the portions of the protective layer may be removed by wet etching using hydrofluoric acid (HF), etc.

(36) Subsequently, the n-side electrode 28 is formed on the top surface 18a of the n-type clad layer 18 exposed in the first region W1, and the p-side electrode 26 is formed on the top surface 24a of the p-type clad layer 24 exposed in the second region W2. An n-type contact layer may be formed on the top surface 18a of the n-type clad layer 18, and the n-side electrode 28 may be formed on the n-type contact layer. Similarly, a p-type contact layer may be formed on the top surface 24a of the p-type clad layer 24, and the p-side electrode 26 may be formed on the p-type contact layer. The deep ultraviolet light emitting device 10 shown in FIG. 1 is manufactured through the steps described above.

(37) A description will now be given of the benefit provided by the deep ultraviolet light emitting device 10 according to the embodiment. FIG. 6 is a graph showing a simulation result of a deep ultraviolet light emitting device according to a comparative example and shows a result of ray tracing light rays in the case the angle of inclination θa of the side surface 32 is 70°. As illustrated, it is revealed that much of the light rays traveling toward the side surface 32 leaks outside from an outer surface 30a of the protective layer 30, and the proportion of the light rays traveling toward the n-type clad layer 18 after being reflected by the side surface 32 is extremely small. Thus, in the case the angle of inclination θa of the side surface 32 is large, it is impossible to extract the deep ultraviolet light traveling toward the side surface 32 from the light extraction surface 12b of the substrate 12.

(38) FIG. 7 is a graph showing a simulation result of a deep ultraviolet light emitting device according to the embodiment and shows a result of tracing light rays in the case the angle of inclination θa of the side surface 32 is 30°. As illustrated, a portion of the light rays traveling toward the side surface 32 leaks outside from the outer surface 30a of the protective layer 30, but much of the light rays traveling toward the side surface 32 is reflected by the side surface 32 or the outer surface 30a of the protective layer 30 and travels toward the n-type clad layer 18. Further, since the angle of incidence of the light rays on the interface 19 between the n-type clad layer 18 and the active layer 20 is small, the light rays are extracted outside without being totally reflected by the light extraction surface 12b of the substrate 12. Thus, by configuring the angle of inclination θa of the side surface 32 to be small, a portion of the deep ultraviolet light traveling toward the side surface 32 is extracted from the light extraction surface 12b of the substrate 12.

(39) FIG. 8 is a graph showing a relationship between the angle of inclination θa of the side surface 32 and the amount of light output from the light extraction surface 12b. The graph is generated by executing a simulation by tracing light rays in a model simulating the structure of the deep ultraviolet light emitting device described above and calculating the amount of light output from the light extraction surface 12b. In the calculation model, a sapphire substrate (refractive index is 1.83) of a thickness of 400 μm, an AlN base layer (refractive index is 2.1) of a thickness of 2 μm, an AlGaN layer (refractive index is 2.3) of a thickness of 2 μm, and an active layer (refractive index is 2.56) of a thickness of 500 nm are stacked. A total absorber simulating the p-type semiconductor layer is provided on the active layer as a boundary layer. The side surface of the active layer is inclined, and a silicon oxide layer (refractive index is 1.4) is provided on the inclined surface. The angle of inclination θa of the side surface of the active layer is varied in a range 20°-90°, and the amount of light output from the sapphire substrate is determined. The vertical axis of the graph represents a relative value determined when the amount of light output in the presence of the angle of inclination θa=70° is defined to be 1.

(40) As illustrated, it is revealed that the amount of output light is relatively small in a range 60°-90° of the angle of inclination θa, and the amount of output light is increased by about 5%-8% in a range 20°-50° of the angle of inclination θa. The simulation result reveals that the light extraction efficiency is increased by configuring the angle of inclination θa of the side surface 32 of the active layer 20 to be 50° or smaller.

(41) FIG. 9 schematically shows the benefit provided by the deep ultraviolet light emitting device 10 according to the embodiment and shows how the deep ultraviolet light created in the active layer 20 propagates. A description will be given of the reason that the light extraction efficiency is increased when the angle of inclination θa is 50° or smaller with reference to FIG. 9.

(42) The deep ultraviolet light created at an arbitrary spot S in the active layer 20 mainly travels toward the interface 19 between the n-type clad layer 18 and the active layer 20 or the interface between the active layer 20 and the electron block layer 22. A portion of the deep ultraviolet light incident on the interface 19 between the n-type clad layer 18 and the active layer 20 propagates toward the light extraction surface 12b of the substrate 12 and is output outside from the light extraction surface 12b. Further, a portion of the deep ultraviolet light incident on the interface 19 is reflected by the interface 19, propagates inside the active layer 20, and travels toward the side surface 32.

(43) The direction in which the deep ultraviolet light created in the active layer 20 propagates is determined by the direction of output at the wave source S and the refractive indices of the layers constituting the deep ultraviolet light emitting device 10. Denoting the incidence angle of the deep ultraviolet light incident on the interface 19 between the n-type clad layer 18 and the active layer 20 by θ.sub.1 and denoting the refractive index of the active layer 20 by n.sub.1, the deep ultraviolet light that meets a relationship θ.sub.1<sin.sup.−1 (1/n.sub.1)=θ.sub.C1 is output outside the deep ultraviolet light emitting device 10 from the light extraction surface 12b. Given that the active layer 20 is made of an AlGaN-based semiconductor material, the critical angle θ.sub.C1 to enable the output (hereinafter, also referred to as the first critical angle θ.sub.C1) is such that the first critical angle θ.sub.C1=22-25° approximately, given that the refractive index n.sub.1=2.4-2.6 approximately. When the incidence angle θ.sub.1 is smaller than the first critical angle θ.sub.C1, total reflection does not occur on the light extraction surface 12b and the deep ultraviolet light is output outside from the light extraction surface 12b.

(44) Total reflection occurs on the interface 19 between the n-type clad layer 18 and the active layer 20 so that the deep ultraviolet light having the incidence angle θ.sub.1 in a predetermine range is not output from the interface 19 to the n-type clad layer 18. The higher the AlN composition ratio (i.e., the larger the band gap), the lower the refractive index of an AlGaN-based semiconductor material tends to be. The refractive index n.sub.2 of the n-type clad layer 18 having a relatively high AlN composition ratio is lower than the refractive index n.sub.1 of the active layer 20 having a relatively lower AlN composition ratio. In the case of the n-type clad layer 18 having an AlN composition ratio of 40% or higher, the refractive index n.sub.2 thereof is such that n.sub.2=2.2-2.3 approximately. Using the value, the critical angle θ.sub.C2 at the interface 19 (hereinafter, also referred to as the second critical angle θ.sub.C2) will be such that θ.sub.C2=sin.sup.−1 (n.sub.2/n.sub.1)=58-73 approximately.

(45) Based on the foregoing, it is learned that the deep ultraviolet light is output outside from the light extraction surface 12b as indicated by a light ray L.sub.0 provided that the incidence angle θ.sub.1 of the deep ultraviolet light incident on the interface 19 is smaller than the first critical angle θ.sub.C1. Meanwhile, when the incidence angle θ.sub.1 of the deep ultraviolet light incident on the interface 19 is larger than the second critical angle θ.sub.C2, the deep ultraviolet light is totally reflected by the interface 19 and travels toward the side surface 32 as indicated by a light ray L.sub.1. The incidence angle θ.sub.2 of the deep ultraviolet light incident on the side surface 32 is denoted geometrically by θ.sub.2=|θ.sub.1−θa|, using the incidence angle (or the reflecting angle) θ.sub.1 on the interface 19 and the angle of inclination θa of the side surface 32.

(46) The deep ultraviolet light reflected by the side surface 32 changes its direction in accordance with the angle of inclination θa of the side surface 32 and is incident on the interface 19 again at an incidence angle θ3 as indicated by a light ray L.sub.2. Further, the as indicated by a light ray L.sub.4, the deep ultraviolet light that is not reflected by the side surface 32, transmitted through the protective layer 30, and reflected by the outer surface 30a of the protective layer 30 is incident on the interface 19 again also at the incidence angle θ3. The angle θ3 of the light incident on the interface 19 again is denoted geometrically by θ.sub.3=|θ.sub.1−2θa| using the first incidence angle (or the reflecting angle) θ.sub.1 on the interface 19 and the angle of inclination θa of the side surface 32.

(47) When the angle θ3 of the light incident on the interface 19 again is smaller than the first critical angle θ.sub.C1 described above, the deep ultraviolet light is output from the light extraction surface 12b as indicated by a light ray L.sub.3. In other words, the deep ultraviolet light traveling toward the side surface 32 of the active layer 20 is extracted outside from the light extraction surface 12b provided that the angle of incidence θa is such that the first incidence angle θ.sub.1 that meets a condition θ.sub.1−2θa|<θ.sub.C1 (hereinafter, also referred to as a light extraction condition) is found. The condition of the angle of inclination θa is given by the following expression (1).

(48) $\begin{array}{cc}{\theta }_a<\frac{\pi \text{/}2+{\sin }^{-1}\left(1\text{/}{n}_1\right)}{2}& \left(1\right)\end{array}$

(49) The angle of inclination θa that meets the condition will be about 56-58 when the right side of the above expression (1) is calculated by assuming that the refractive index n.sub.1=2.4-2.6. Therefore, the deep ultraviolet light that meets the aforementioned light extraction condition is produced by configuring the angle of inclination θa to be smaller than this upper limit angle. By configuring the angle of inclination θa to be even smaller, the angular range of the incidence angle θ.sub.1 that meets the light extraction condition is enlarged. Based on the foregoing study, it can be said that the angle of inclination θa of the side surface 32 is preferably 50° or smaller and, more preferably, 40° or smaller. In the case the angle of inclination θa=40°, for example, most of the deep ultraviolet light having the incidence angle θ.sub.1 of 63° or larger, i.e., most of the deep ultraviolet light totally reflected by the interface 19 is caused to be incident on the interface 19 again at the incidence angle θ3 smaller than the first critical angle θ.sub.C1.

(50) The direction of output of the deep ultraviolet light created in the active layer 20 varies depending on the AlN composition ratio of the active layer 20. In particular, when the AlN composition ratio of the active layer 20 is increased in order to output deep ultraviolet light of a short wavelength (310 nm or shorter), the light component in a direction perpendicular to the interface 19 tends to be reduced and the light component in a direction along the interface 19 tends to be increased. According to the embodiment, the direction of the deep ultraviolet light that cannot travel toward the light extraction surface 12b as a result of being reflected or totally reflected by the interface 19 can be changed properly by configuring the angle of inclination θa of the side surface 32 properly. Thus, according to the embodiment, the efficiency of light extraction from the light extraction surface 12b in the deep ultraviolet light emitting device 10 for outputting deep ultraviolet light of a short wavelength is increased.

(51) Described above is an explanation based on an exemplary embodiment. The embodiment is intended to be illustrative only and it will be understood by those skilled in the art that various design changes are possible and various modifications are possible and that such modifications are also within the scope of the present invention.