Wiring of a semiconductor switch

11349473 ยท 2022-05-31

Assignee

Inventors

Cpc classification

International classification

Abstract

A wiring of a semiconductor switch having a gate, a collector or a drain, and an emitter or a source, includes a first arrangement having a first capacitor connected in series with a parallel connection having a first resistor and a first diode. The first arrangement is connected between the gate and the collector or drain, wherein the first diode is connected away from the gate in a flow direction. A second arrangement is connected in parallel with the first arrangement and includes a second capacitor connected in series with a parallel connection having a second resistor and a second diode, wherein the second diode lies toward the gate in the flow direction.

Claims

1. A wiring of a semiconductor switch having a gate, a collector or a drain, and an emitter or a source, the wiring comprising: a first arrangement comprising a first capacitor connected in series with a parallel connection having a first resistor and a first diode, said first arrangement connected between the gate and the collector or drain, wherein the first diode is connected away from the gate in a flow direction, and a second arrangement connected in parallel with the first arrangement and comprising a second capacitor connected in series with a parallel connection having a second resistor and a second diode, wherein the second diode lies toward the gate in the flow direction.

2. The wiring of claim 1, further comprising a gate resistor wiring connected to the gate and comprising a first gate resistor connected in parallel with a series connection having a second gate resistor and a gate diode which is connected toward the gate in the flow direction.

3. The wiring of claim 1, wherein the semiconductor switch is embodied as an IGBT or a MOSFET.

Description

BRIEF DESCRIPTION OF THE DRAWING

(1) The above-described properties, features and advantages of this invention and the manner in which these are achieved will become more clearly and easily intelligible in connection with the following description of exemplary embodiments, which are explained in further detail with reference to the drawings, in which:

(2) FIG. 1 shows a wiring of a semiconductor switch which is known from the prior art,

(3) FIG. 2 shows a first embodiment of a wiring of a semiconductor switch,

(4) FIG. 3 shows a second embodiment of a wiring of a semiconductor switch,

(5) FIG. 4 shows a third embodiment of a wiring of a semiconductor switch,

(6) FIG. 5 shows a fourth embodiment of a wiring of a semiconductor switch,

(7) FIG. 6 shows a fifth embodiment of a wiring of a semiconductor switch,

(8) FIG. 7 shows a sixth embodiment of a wiring of a semiconductor switch,

(9) FIG. 8 shows a seventh embodiment of a wiring of a semiconductor switch.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

(10) Parts which correspond to one another are provided with the same reference characters in all the figures.

(11) FIG. 1 shows a wiring 1 of a semiconductor switch T1 which is known from the prior art. The semiconductor switch T1 is, for example, a field-effect transistor, in particular a MOSFET or an IGBT, and has a gate G, a collector C and an emitter E. A capacitor C1 is arranged between collector C and gate G. A gate wiring consisting of a first gate resistor Rg1, a second gate resistor Rg2 and a gate diode V1 is depicted, which symbolizes the gate resistor as embodied above in the introduction.

(12) FIG. 2 shows a first embodiment of a wiring 1 of a semiconductor switch T1.

(13) The semiconductor switch T1 is, for example, a field-effect transistor, in particular a MOSFET or an IGBT, and has a gate G, a collector C and an emitter E. A capacitor C1 is arranged between collector C and gate G. A gate wiring consisting of a first gate resistor Rg1, a second gate resistor Rg2 and a gate diode V1 is depicted, which symbolizes the gate resistor as embodied above in the introduction. Unlike in FIG. 1, however, a parallel connection consisting of a resistor R3 and a diode V2 is provided between collector C and gate G in series with the capacitor C1, wherein the diode V2 is connected away from the gate G in the flow direction.

(14) By integrating the diode V2, the interventions of the capacitor C1 for switching on and off are decoupled from one another. With the embodiment shown in FIG. 2, only the switching-on behavior is influenced and/or improved.

(15) The resistor R3 is used to discharge the capacitor C1 when this is not possible by way of the diode V2 by operating in its reverse direction.

(16) The orientation of the diode V2 determines whether the wiring 1 acts when switching the semiconductor switch T1 on or off.

(17) FIG. 3 shows a second embodiment of a wiring 1 of a semiconductor switch T1.

(18) The wiring 1 is similar to the wiring 1 shown in FIG. 2. Unlike there, however, the diode V2 is connected toward the gate G in the flow direction.

(19) By integrating the diode V2, the interventions of the capacitor C1 for switching on and off are decoupled from one another. With the embodiment shown in FIG. 3, only the switching-off behavior is influenced and/or improved.

(20) The resistor R3 is used to discharge the capacitor C1 when this is not possible by way of the diode V2 by operating in its reverse direction.

(21) FIG. 4 shows a third embodiment of a wiring 1 of a semiconductor switch T1.

(22) The wiring 1 combines the wirings 1 shown in FIGS. 2 and 3.

(23) A parallel connection consisting of a resistor R3 and a diode V2 is provided between collector C and gate G in series with the capacitor C1, wherein the diode V2 is connected away from the gate G in the flow direction. Connected in parallel with the arrangement consisting of capacitor C1, resistor R3 and diode V2 is a further arrangement consisting of a further capacitor C2, a further resistor R4 and a further diode V3, wherein the further capacitor C2 lies next to the collector C, for example, and a parallel connection consisting of the further resistor R4 and the further diode V3 is provided in series with the further capacitor C2, wherein the further diode V3 lies toward the gate G in the flow direction.

(24) With the embodiment shown in FIG. 4, the switching-on and switching-off behavior are influenced and/or improved separately from one another.

(25) FIG. 5 shows a fourth embodiment of a wiring 1 of a semiconductor switch T1.

(26) The wiring 1 is similar to the wiring 1 shown in FIG. 3. Unlike there, a further capacitor C2 is connected in parallel with the resistor R3 and the diode V2.

(27) FIG. 6 shows a fifth embodiment of a wiring 1 of a semiconductor switch T1.

(28) The wiring 1 is similar to the wiring 1 shown in FIG. 2. Unlike there, a further capacitor C2 is connected in parallel with the resistor R3 and the diode V2.

(29) FIG. 7 shows a sixth embodiment of a wiring 1 of a semiconductor switch T1.

(30) The wiring 1 is similar to the wiring 1 shown in FIG. 1. Unlike there, however, provided in parallel with the capacitor C1 is a circuit, in which a diode V2 is connected in series with a parallel connection consisting of a resistor R3 and a further capacitor C2. In this case, the diode V2 is connected toward the gate G in the flow direction.

(31) FIG. 8 shows a seventh embodiment of a wiring 1 of a semiconductor switch T1.

(32) The wiring 1 is similar to the wiring 1 shown in FIG. 1. Unlike there, however, provided in parallel with the capacitor C1 is a circuit, in which a diode V2 is connected in series with a parallel connection consisting of a resistor R3 and a further capacitor C2. In this case, the diode V2 is connected away from the gate G in the flow direction.

(33) In one embodiment, the resistor R3 is connected in parallel with the further capacitor C2 or in parallel with the diode V2.

(34) Although the invention has been illustrated and described in detail on the basis of preferred exemplary embodiments, the invention is not restricted by the examples given and other variations can be derived therefrom by a person skilled in the art without departing from the protective scope of the invention.