APPARATUS FOR OPTICAL IMAGE RECOGNITION AND CLASSIFICATION

20230274529 · 2023-08-31

    Inventors

    Cpc classification

    International classification

    Abstract

    The invention relates to an apparatus for optical image recognition and classification, comprising an optical setup (10) to split the optical image into n = 1, 2, N local optical power values P.sub.n, a detector array (1) with n = 1, 2,... N photoactive pixels (2, 2′, 2″) to pick up the local optical power values P.sub.n, wherein each pixel (2, 2′, 2″) is segmented into m = 1, 2,... M subpixels (3), and each subpixel (3) comprises a semiconductor photodiode which, under optical illumination, delivers a photocurrent I.sub.mn depending on its photoresponsivity R.sub.mn and the local optical power P.sub.n received at the pixel (2, 2′, 2″), and wherein the photoresponsivity values R.sub.mn are not identical, and the outputs of each subpixel (3) are connected to form M output lines (4), wherein each output line (4) sums the photodetector currents produced by the m-th subpixels (3) in all N pixels

    (2, 2′, 2″) and delivers a detector current of Formel (I), to be used for recognizing and classifying the optical image.

    Claims

    1. Apparatus for optical image recognition and classification, comprising an optical setup (10) to split the optical image into n = 1, 2, ..., N local optical power values P.sub.n, a detector array (1) with n = 1, 2, ... N photoactive pixels (2, 2′, 2″) to pick up the local optical power values P.sub.n, wherein each pixel (2, 2′, 2″) is segmented into subpixels (3), and each subpixel (3) comprises a semiconductor photodiode which, under optical illumination, delivers a photocurrent depending on its photoresponsivity value and the local optical power P.sub.n received at the pixel (2, 2′, 2″), characterized in that the photoresponsivity values of the subpixels (3) within a pixel (2, 2′, 2″) are not identical, and the outputs of the subpixels (3) of each pixel (2, 2′, 2″) are connected to form a number of separate output lines (4), wherein each output line (4) sums the photodetector currents produced by different subpixels (3) within each pixel (2, 2′, 2″) and delivers a number of detector currents to be used for recognizing and classifying the optical image.

    2. Apparatus according to claim 1, characterized in that each pixel (2, 2′, 2″) is segmented into m = 1, 2, ..., M subpixels (3), and the outputs of the subpixels (3) of each pixel (2, 2′, 2″) are connected to form M output lines (4).

    3. Apparatus according to claim 1 or 2, characterized in that the number of subpixels (3) within each pixel (2, 2′, 2″) is not identical.

    4. Apparatus according to claim 1 or 2, characterized in that each pixel (2, 2′, 2″) comprises an identical number of M subpixels (3).

    5. Apparatus according to any of claims 1 to 4, characterized in that the photoresponsivity values R.sub.mn of the subpixels (3) depend on the photoactive areas of the subpixel (3), and the photoactive areas of each subpixel (3) within a pixel (2, 2′, 2″) are not identical.

    6. Apparatus according to any of claims 1 to 4, characterized in that the photoresponsivity values R.sub.mn of the subpixels (3) are adjustable during operation, preferably by electrical means.

    7. Apparatus according to any of claims 1 to 6, characterized in that the subpixels (3) each comprise a semiconductor channel (5), for example of Si, GaAs, or other semiconducting materials, which is contacted by a source contact (6) and a drain contact (7), wherein the source contact (6) is grounded, and the drain contact (7) forms the output of the subpixel (3).

    8. Apparatus according to claim 6, characterized in that a lateral p-n junction is formed in the channel (5) and two gate electrodes (8, 8′) are provided, the first gate electrode (8) located near the source contact (6), and the second gate electrode (8′) located near the drain contact, such that the built-in field over the p-n junction can be adjusted by applying a voltage at the gate electrodes.

    9. Apparatus according to claim 6 or 7, characterized in that the channel (5) comprises a layered two-dimensional semiconductor such as a transition metal dichalcogenide, for example layered tungsten diselenide (WSe.sub.2) or layered molybdenum disulfide (MoS.sub.2) with less than five atomic layers and a total thickness of less than 10 nm, preferably less than 5 nm.

    10. Apparatus according to any of claims 1 to 8, characterized in that the apparatus operates as an image classifier and comprises an electronic classifier circuitry (11) which is adapted to classify the optical image, according to the detector currents I.sub.m, into a number of y.sub.1, y.sub.2, ..., y.sub.M predefined categories.

    11. Apparatus according to any of claims 1 to 9, characterized in that the apparatus operates as an autoencoder, in particular as a binary-hashing autoencoder, to encode/decode P.sub.n into P.sub.n′, wherein the detector array (1) operates as encoder, and an electronic decoder circuitry (12) with weights W.sub.nm is provided to decode the M values of I.sub.m into the N values of P.sub.n′, wherein an electronic comparator unit (17) is provided to adjust the values of R.sub.mn and W.sub.nm to minimize the error between P.sub.n and P.sub.n′.

    12. Apparatus according to any of claims 1 to 10, characterized in that the apparatus comprises an electronic control circuitry (13), in particular an electronic memory, which is adapted to individually provide the photoresponsivity R.sub.mn of each subpixel (3), in particular by setting voltages V.sub.mn and -V.sub.mn at the first gate electrode (8) and the second gate electrode (8′).

    13. Apparatus according to claim 11, characterized in that the control circuitry is adapted to set the voltage at the first gate electrode (8) to +V.sub.G and at the second gate electrode (8′) to -V.sub.G, with V.sub.G at around 1 V to 5 V, resulting in a range of the photoresponsivity R.sub.mn of preferably -1 A/W to + 1 A/W, such as -60 mA/W to +60 mA/W.

    14. Apparatus according to any of claims 7 to 12, characterized in that the subpixels (3) each comprise two electrically isolated, floating gate electrodes (9, 9′), the first floating gate electrode (9) being located near the first gate electrode (8) and the second floating gate electrode (9′) being located near the second gate electrode (8′), wherein the isolation layer between the floating gate electrodes (9, 9′) and the gate electrodes (8, 8′) is sufficiently thin so that they can be charged when a voltage is applied to the gate electrodes (8, 8′).

    15. Apparatus according to claim 13, characterized in that the gate electrodes (8, 8′) are embedded in an isolating layer of Al2O3, and the floating gates (9, 9′) are embedded in an isolating layer of hexagonal boron nitride (hBN).

    16. Apparatus according to claim 13 or 14, characterized in that the floating gate electrodes (9, 9′) are around 2-nm-thick layers of Au.

    17. Apparatus according to any of claims 1 to 16, characterized in that each pixel (2, 2′, 2″) is segmented into a linear array or a rectangular matrix of M subpixels (3).

    18. Artificial neural network for optical image recognition and classification, characterized in that it comprises an apparatus according to any of claims 1 to 17, wherein the subpixels (3) are used as artificial neurons and the photoresponsivity values R.sub.mn of the subpixels (3) are used as weights of the artificial neural network.

    19. Artificial neural network according to claim 18, characterized in that the values R.sub.mn of the subpixels (3) are initially set during fabrication of the detector array (1) by designing the photoactive areas of each subpixel (3) within a pixel (2, 2′, 2″) at a predetermined value, resulting in a predetermined value of R.sub.mn for each subpixel (3).

    20. Artificial neural network according to claim 19, characterized in that the values R.sub.mn of the subpixels (3) are adjustable during operation by electrical means, in particular by applying voltages at gate electrodes (8, 8′).

    21. Artificial neural network according to claim 20, characterized in that the values R.sub.mn of the subpixels (3) are adjustable during a training period by electrical means, in particular by consecutively applying voltages at gate electrodes (8, 8′), whereby electric charge is stored at floating gate electrodes (9, 9′) which are assigned to the gate electrodes (8, 8′).

    Description

    [0024] FIG. 1a shows a schematic illustration of an exemplary embodiment of a detector array according to the invention;

    [0025] FIG. 1b shows a schematic circuit diagram of a single pixel in the detector array;

    [0026] FIG. 1c shows a schematic circuit diagram of a further embodiment of a detector array;

    [0027] FIGS. 2a - 2b show schematic illustrations of different embodiments of single subpixel photodiodes according to the invention;

    [0028] FIGS. 3a - 3b show schematic applications of an apparatus according to the invention as ANNs implementing a classifier and an autoencoder;

    [0029] FIG. 3c shows a simplified flow chart of the training algorithm for an ANN according to the invention;

    [0030] FIG. 4 shows an experimental setup to classify optical images with an apparatus according to the invention;

    [0031] FIGS. 5a and 5b show a further embodiment of a detector array according to the invention.

    [0032] FIG. 1a schematically illustrates the basic layout of a detector array 1 for an embodiment of the apparatus according to the invention. It consists of n = 1, 2, ..., N photoactive pixels 2, 2′, 2″ arranged in a two-dimensional array, with each pixel divided into m = 1, 2, ..., M subpixels 3. In this embodiment, M = 4, and each pixel comprises 4 subpixels. Each subpixel 3 comprises a photodiode, which is operated under short-circuit conditions and under optical illumination delivers a photocurrent of I.sub.mn = R.sub.mn .Math. E.sub.n .Math. A = R.sub.mn .Math. P.sub.n, where R.sub.mn is the photoresponsivity of the subpixel 3, E.sub.n and P.sub.n denote the local irradiance and optical power at the n-th pixel, respectively, and A is the photoactive area of the subpixel. In this embodiment, each subpixel has the same photoactive area. The numbers n = 1, 2, ..., N and m = 1, 2, ..., M denote the pixel and subpixel indices, correspondingly. An integrated neural network and imaging apparatus is formed by interconnecting the subpixels 3 of all pixels 2, 2′, 2″ in parallel.

    [0033] Summing all photocurrents I.sub.mn produced by the m-th subpixel over the N pixels results in a number of M detector currents:

    [00002]Im=.Math.n=1NImn=.Math.n=1NRmnPn

    [0034] This operation is done by hard-wiring the outputs of subpixels 3 of all pixels 2, 2′, 2″ in parallel. This performs the matrix-vector product operation I = RP, with R = (R.sub.mn) being the photoresponsivity matrix, P = (P.sub.1, P.sub.2, ..., P.sub.N).sup.T being a vector that represents the optical image projected onto the chip, and I = (I.sub.1, I.sub.2, ..., I.sub.M).sup.T being the output vector. Provided that R.sub.mn can be set to specific positive or negative values, various types of artificial neural networks (ANNs) for image processing can be implemented, wherein the synaptic weights are encoded in the photoresponsivity matrix R.sub.mn.

    [0035] FIG. 1b shows a schematic circuit diagram of a single pixel 2 in the detector array, comprising a number M of subpixels 3. Each subpixel 3 comprises a semiconductor photodiode which is operated under short-circuited conditions. The source contacts of each photodiode are interconnected and grounded. The photodiodes feature a split gate with two gate electrodes 8, 8′.

    [0036] An external electronic control circuit (not shown) provides voltages V.sub.1n, V.sub.2n, ..., V.sub.Mn, which are led into the pixel 2 to supply the gate electrodes 8, 8′, wherein the two gate electrodes of each subpixel 3 are biased with positive and negative voltages, respectively. A set of inverters is provided to produce the negative voltages -V.sub.1n, -V.sub.2n, ..., -V.sub.Mn. The photoresponsivity of each subpixel 3 can be set independently by supplying a pair of V.sub.G/-V.sub.G voltages to the two gate electrodes 8, 8′. The M drain contacts of each photodiode operate as output lines 4 of the subpixels 3 and carry the resulting photocurrent I.sub.1n, I.sub.2n, ..., I.sub.Mn.

    [0037] FIG. 1c shows a further schematic circuit diagram of an embodiment of a detector array 1 consisting of 27 subpixels 3. The devices are arranged to form a 3 × 3 imaging array (number of pixels N = 9) with a pixel size of about 17 × 17 .Math.m.sup.2 and with three subpixels per pixel (M = 3). The short-circuit photocurrents produced by the individual devices under optical illumination are summed according to Kirchhoff’s law by hard-wiring the subpixels in parallel. Each subpixel 3 is supplied with a pair of gate voltages, V.sub.G and -V.sub.G, to set its responsivity individually. For training and testing of the chip, optical images were projected using an optical setup 10. Light with a wavelength of 650 nm and with a maximum irradiance of about 0.1 W cm.sup.-2 is used.

    [0038] Despite its small size, such a network with 3 × 3 pixels is sufficient for the application of several machine-learning algorithms. In particular, classification, encoding, and denoising of the stylized letters ‘n’, ‘v’ and ‘z’ can be performed.

    [0039] FIG. 2a shows a schematic embodiment of a single subpixel 3, realized by a transistor structure with a few-layer WSe.sub.2 channel 5 with a thickness of about 4 nm to form lateral p-n junction photodiodes, using split-gate electrodes 8, 8′ (with a ~300-nm-wide gap) that couple to two different regions of the 2D semiconductor channel 5.

    [0040] The semiconductor material WSe.sub.2 was chosen because of its ambipolar conduction behavior and excellent optoelectronic properties. Biasing one gate electrode 8 at V.sub.G and the other gate electrode 8′ at -V.sub.G enables adjustable (trainable) responsivities R.sub.mn between -60 mA/W and +60 mA/W.

    [0041] A possible way of device fabrication is shortly described. As a substrate for the subpixel 3, a silicon wafer is used, which is coated with 280-nm-thick SiO.sub.2. First, a bottom metal layer is formed by writing a design with electron-beam lithography (EBL) and evaporating Ti/Au (3 nm/30 nm). Then, a 30-nm-thick Al.sub.2O.sub.3 gate oxide is formed using atomic layer deposition. Via holes through the Al.sub.2O.sub.3 isolator were defined by EBL and etched with a 30% solution of KOH in deionized water. A ~70 × 120 .Math.m2 WSe.sub.2 flake is mechanically exfoliated from a bulk crystal and transferred onto the desired position by an all-dry viscoelastic stamping method. The thickness of the channel 5 is about six monolayers WSe.sub.2, or ~4 nm, and can be estimated under an optical microscope. 27 pixels were separated from the previously transferred WSe2 sheet by defining a mask with EBL and reactive ion etching with Ar/SF.sub.6 plasma. Mild treatment with reactive ion etching oxygen plasma allowed the removal of the crust from the surface of the polymer mask that appeared during the preceding etching step.

    [0042] Then, a top metal layer is added by another EBL process and Ti/Au (3 nm/32 nm) evaporation. Finally, the sample was mounted in a 68-pin chip carrier and wire-bonded.

    [0043] FIG. 2b shows an alternative embodiment of a single subpixel 3, realized by a transistor structure with a few-layer WSe.sub.2 channel 5 with a thickness of about 4 nm to form lateral p-n junction photodiodes, using split-gate electrodes 8, 8′ and floating gate electrodes 9, 9′.

    [0044] The addition of 2-nm-thick Au layers, sandwiched between AI2O3 and hexagonal boron nitride (hBN), enables the storage of electric charge on the floating gates 9, 9′ when a gate voltage is applied to the gate electrodes 8, 8′. The ability of the device to ‘remember’ the previous configuration can be verified from time-resolved photocurrent measurements. The voltages at the gate electrodes 8, 8′ are set to V.sub.G1 = +5 V and V.sub.G2 = -5 V and are then disconnected. The use of photodiodes with floating gate electrodes 9, 9′ allows to set the photoresponsivity values R.sub.mn of the subpixels 3 consecutively, by addressing the gate electrodes 8, 8′ of each subpixel separately, whereby electrical charge is transferred to the floating gate electrodes 9, 9′, where it is stored for operation of the detector. Repeated refreshing cycles might be necessary, but it is not necessary to constantly provide electric energy to the apparatus during operation.

    [0045] FIG. 3a shows a schematic embodiment of an apparatus according to the invention operating as a single-layer perceptron to classify optical images, using non-linear activation functions in an electronic non-linear classifier circuitry 11 that is implemented off-chip. This type of ANN represents a supervised learning algorithm that is capable of classifying images represented by P.sub.n into different categories y.sub.m.

    [0046] For supervised training of the ANN, a set of predefined images, such as letters on an optical matrix, for example the letters “n”, “v”, and “z” on a 3 × 3 matrix, is optically projected, via the optical setup 10, to the detector array 1. Gaussian noise is added to augment the input data. In such a supervised learning example, one-hot encoding can be applied, wherein each of the three letters activates a single output node/neuron. As activation function (the nonlinear functional mapping between the inputs and the output of a node) for the M photocurrents the softmax function

    [00003]ϕmI=eImξ.Math.k=1MeIkξ

    can be chosen, where a scaling factor ξ = 10.sup.10A.sup.-1 is used to ensure that the full value range of the activation function is accessible during training. As a loss/cost function (the function to be minimized during training) the cross-entropy

    [00004]L=1M.Math.m=1MymlogϕmI

    can be used, where y.sub.m is the label and M = 3 is the number of classes. The activations of the output neurons represent the probabilities for each of the letters. The initial values of the responsivities are randomly chosen from a Gaussian distribution, and were different for supervised- and unsupervised learning. The responsivities are updated after every epoch by backpropagation of the gradient of the loss function

    [00005]Rmn.fwdarw.RmnηS.Math.PRmnL

    with learning rate η = 0.1. A detailed flow chart of a possible embodiment of the training algorithm is shown in FIG. 3c.

    [0047] FIG. 3b shows a schematic embodiment of an apparatus according to the invention operating as an autoencoder. Such an ANN can learn, in an unsupervised training process, an efficient representation (encoding) for a set of images P = (P.sub.1, P.sub.2, ..., P.sub.n). Along with the encoder, an electronic non-linear decoder circuitry 12 is trained to reproduce at its output the original image, P′ ≈ P, from the encoded data. Here the encoder is realized by the detector array itself, and the decoder is realized by the external electronic decoder circuitry 12. An electronic comparator unit 17 compares P′ with P and adjusts the photosensitivity values R.sub.mn and the weights W.sub.mn.

    [0048] Logistic (sigmoid) activation functions can be chosen for the code neurons

    [00006]ϕmI=11+eImξ

    again with ξ = 10.sup.10 A.sup.-1 as a scaling factor, as well as for the output neurons

    [00007]Pn=ϕnzn=11+ezn

    where

    [00008]zn=.Math.n=1MWnmϕmIm

    and W.sub.nm denotes the weight matrix of the decoder. The mean-square loss function can be used which depends on the difference between the original and reconstructed images. The responsivities are again trained by backpropagation of the loss, with a noise level of σ = 0.15. Along with the encoder responsivities, the weights of the decoder W.sub.nm can be trained as well. As image sensing and processing are both performed in the analogue domain, the operation speed of the system is limited only by physical processes involved in the photocurrent generation. As a result, image recognition and encoding occur in real time with a rate that is orders of magnitude higher than what can be achieved conventionally.

    [0049] FIG. 3c shows a simplified flow chart of the training algorithm for an ANN using an apparatus according to the invention. This training algorithm can be applied by a setup as shown in FIG. 4.

    [0050] FIG. 4 shows an experimental setup to demonstrate the high-speed capabilities of an apparatus according to the invention. In an optical setup 10, light from a semiconductor laser (650 nm wavelength) was linearly polarized before it illuminated a spatial light modulator (SLM), operated in intensity-modulation mode. On the SLM, optical images in the form of different letters were displayed and the polarization of the light was rotated depending on the pixel value. A linear polarizer with its optical axis oriented normal to the polarization direction of the incident laser light functioned as an analyzer. The generated optical image was then projected by the optical setup 10 onto the detector array 1. Pairs of gate voltages were supplied to each of the subpixels 3 using a total of 54 D/A-converters 14 and the three output currents were measured by A/D-converters 15. The output current signals were amplified and provided to a control unit 16. Correct pattern classification within ~50 ns could be demonstrated. The system is thus capable of processing images with a throughput of 20 million bins per second. This value is limited only by the bandwidth of the used amplifiers, and substantially higher rates are possible.

    [0051] FIGS. 5a - 5b show a further embodiment of a detector array 1 according to the invention in microscopic top view. The detector array 1 comprises a matrix of 28 × 28 pixels 2, 2′, 2″, so that N = 784. Each pixel 2, 2′, 2″ is segmented into a linear arrangement of up to ten subpixels 3, so that M = 10. In this embodiment, some pixels have less than M subpixels. Each subpixel 3 comprises a GaAs-Schottky photodiode with a rectangular photoactive area as shown in the detail FIG. 5b. Each subpixel 3, under optical illumination, delivers a photocurrent I.sub.mn depending on its photoresponsivity R.sub.mn and the local optical power P.sub.n received at the pixel. The outputs of each subpixel 3 over all pixels are connected to form m = 1, 2, ..., M output lines 4, wherein each output line 4 sums the photodetector currents (if any) produced by the m-th subpixels 3 in all 784 pixels 2, 2′, 2″ and delivers, at the ten output terminals, a detector current I.sub.m to be used for recognizing and classifying the optical image.

    [0052] The photoresponsivity values R.sub.mn of the subpixels 3 within a pixel 2, 2′, 2″ are not identical and are determined by the rectangular photoactive area of the subpixel 3. The different photoactive areas of the 10 subpixels within each pixel are shown in FIG. 5b, which shows a detailed view of 3 × 3 pixels from FIG. 5a. The subpixels 3 have nonidentical photoactive areas, which results in a different photoresponsivity values R.sub.mn for each subpixel 3. Some of the pixels 2, 2′, 2″ have less than 10 subpixels 3, so that the respective subpixel 3 has a photoresponsivity value of zero. The necessary areas are determined, preferably by simulation, prior to fabrication of the detector array 1 in order to classify, in this embodiment, the ten handwritten numerals “0” to “9”, corresponding to ten distinct output lines 4. Thus, the responsivity values R.sub.mn are fixed and cannot be changed during operation. The detector array of this embodiment does not need a power supply and immediately delivers currents on the ten output lines 4 upon proper illumination. Projecting the numeral “0” leads to current on the first output terminal, projecting the numeral “1” leads to current on the second output terminal, and so on.

    [0053] An apparatus according to the invention can be used for ultrafast recognition and encoding of optical images, it is easily scalable and provides various possibilities for ultrafast machine vision applications, such as ultrafast spectroscopy. The implementation of an analogue deep-learning network becomes feasible by converting the M photocurrents into voltages that are then fed into a memristor crossbar. Besides on-chip training, the network can also be trained off-line using computer simulations, and the predetermined photoresponsivity matrix is then transferred to the device.

    [0054] Using an apparatus according to the invention in an ANN may provide new opportunities for ultrafast machine vision, for example in the realm of accident prevention or for autonomous driving applications. It may also be employed in ultrafast spectroscopy for the detection and classification of spectral events. In such applications, incoming light can be separated through a grid into a number of discrete wave lengths, which are then detected using an apparatus according to the invention. In this case, a one-dimensional array of pixels might be sufficient. It is further noted that the operation of an apparatus according to the invention can be self-powered, so that electrical energy is consumed only during training.

    [0055] Embodiments of the invention can be implemented in digital electronic circuitry, in tangibly-embodied computer software or firmware, in computer hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Embodiments of the invention can be performed by, and apparatus can also be implemented as, special purpose logic circuitry, such as an FPGA (field programmable gate array), an ASIC (application specific integrated circuit), or a GPU (General purpose graphics processing unit). Computers suitable for the execution of the method according to the invention can be based on either of general or special purpose microprocessors, or any other kind of central processing unit (CPU). Such central processing unit will receive instructions and data from a read only memory or a random access memory or both. The essential elements of a computer are a central processing unit for performing or executing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks. However, a computer need not have such devices. Computer readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto optical disks; and CD ROM and DVD-ROM disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

    [0056] While this specification contains many specific implementation details, these should not be construed as limitations on the scope of any invention or of what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of the invention. Certain features that are described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. Other embodiments are within the scope of the following claims.

    TABLE-US-00001 List of numerals 1 Detector array 2, 2′, 2″ Pixel 3 Subpixel 4 Output line 5 Channel 6 Source Contact 7 Drain Contact 8, 8′ Gate electrode 9, 9′ Floating gate electrode 10 Optical setup 11 Classifier circuitry 12 Decoder circuitry 13 Control circuitry 14 D/A-Converter 15 A/D-Converter 16 Control unit 17 Comparator unit