PROCESS FOR FABRICATING A COMPONENT COMPRISING A LAYER MADE OF SINGLE-CRYSTAL MATERIAL COMPATIBLE WITH HIGH THERMAL BUDGETS

Abstract

A process for fabricating a component includes an operation of transferring at least one layer of one or more piezoelectric or pyroelectric or ferroelectric materials forming part of a donor substrate to a final substrate, the process comprising a prior step of joining the layer to a temporary substrate via production of a fragile separating region between the donor substrate of single-crystal piezoelectric or pyroelectric or ferroelectric material and the temporary substrate, the region comprising at least two layers of different materials in order to ensure two compounds apt to generate an interdiffusion of one or more constituent elements of at least one of the two compounds make contact, the fragile region allowing the temporary substrate to be separated.

Claims

1. A process for fabricating a component comprising transferring an assembly comprising one or more layers of one or more single-crystal piezoelectric or pyroelectric or ferroelectric materials to a final substrate, said process comprising at least: a first set of steps comprising: a step of implanting ions into a donor substrate of single-crystal piezoelectric or pyroelectric or ferroelectric material at an implantation level so as to define a layer region in said single-crystal piezoelectric or pyroelectric or ferroelectric material; a first joining step wherein said donor substrate of single-crystal piezoelectric or pyroelectric or ferroelectric material is joined to a temporary substrate, said first joining step comprising producing a fragile separating interface region between said donor substrate of single-crystal piezoelectric or pyroelectric or ferroelectric material and said temporary substrate, said region comprising at least two layers of different materials in order to ensure two compounds apt to generate an interdiffusion of one or more constituent elements of at least one of the two compounds make contact; a step of thinning said donor substrate of single-crystal piezoelectric or pyroelectric or ferroelectric material to the implantation level so as to define a layer of single-crystal piezoelectric or pyroelectric or ferroelectric material; a step of healing residual defects via thermal annealing of said layer of single-crystal piezoelectric or pyroelectric or ferroelectric material; and a second set of steps subsequent to the first set of steps, comprising at least: a second joining step in which an assembly comprising the one or more layers of one or more single-crystal piezoelectric or pyroelectric or ferroelectric materials and said temporary substrate is joined to a final substrate; a step of separating the temporary substrate from said layer of single-crystal piezoelectric or pyroelectric or ferroelectric material, via said fragile separating interface region.

2. The fabricating process according to claim 1, wherein the second set of steps comprises a step of producing a first functional structure on one of the layers of single-crystal piezoelectric or pyroelectric or ferroelectric material.

3. The fabricating process according to claim 1, wherein the second set of steps comprises a step of producing a second functional structure on one of the layers of single-crystal piezoelectric or pyroelectric or ferroelectric material.

4. The fabricating process according to claim 1, wherein, after the step of thinning said donor substrate, which is made of a first single-crystal piezoelectric or pyroelectric or ferroelectric material, to the implantation level, so as to define a layer of single-crystal piezoelectric or pyroelectric or ferroelectric material, said process comprises producing an additional layer of second single-crystal piezoelectric or pyroelectric or ferroelectric material on the surface of said layer of single-crystal piezoelectric or pyroelectric or ferroelectric material, said first and second materials being identical or different.

5. The fabricating process according to claim 4, wherein the thickness of the layer of first material is smaller than or equal to 1 micron, and the thickness of the additional layer of second material is comprised between 0.1 and 5 microns.

6. The fabricating process according to claim 1, wherein production of said fragile separating interface region between said donor substrate of single-crystal piezoelectric or pyroelectric or ferroelectric material and said temporary substrate comprises at least: producing a layer of oxide or of nitride; depositing a layer of noble metal; carrying out a thermal anneal apt to create said interdiffusion of one or more constituent elements of at least one of the two compounds.

7. The fabricating process according to claim 6, comprising: producing a layer of silicon oxide or of silicon nitride; depositing a layer of noble metal of Pt or of Au or of Rh or of Os or of Pd or of Ru or of Ir.

8. The fabricating process according to claim 6, wherein the step of healing residual defects via thermal annealing is carried out with a thermal budget apt to cause the diffusion of the noble metal into the oxide or into the nitride, said thermal budget being spent at a temperature comprised between 300° C. and 700° C. for a time comprised between 1 hour and 10 hours.

9. The fabricating process according to claim 1, wherein the first joining step, wherein step said substrate of single-crystal piezoelectric or pyroelectric or ferroelectric material is joined to a temporary substrate, is carried out with a first bonding layer made of a constituent material of one of the materials in order to ensure two compounds apt to generate an interdiffusion or one or more constituent elements of at least one of the two compounds make contact.

10. The fabricating process according to claim 1, wherein the first joining step, wherein step said substrate of single-crystal piezoelectric or pyroelectric or ferroelectric material is joined to a temporary substrate, is carried out with a first bonding layer, said first bonding layer being a layer of silicon oxide (SiO.sub.2), a metal layer (Cu, Au, Ti, Ag, etc.) or a layer of a polymer such as benzocyclobutane (BCB).

11. The fabricating process according to claim 1, wherein the second joining step, wherein step an assembly comprising the one or more layers of one or more single-crystal piezoelectric or pyroelectric or ferroelectric materials and said temporary substrate is joined to a final substrate, is carried out with at least one second bonding layer, said second bonding layer being mineral, and for example made of SiO.sub.2 or of silicon oxynitride (SiO.sub.xN.sub.y).

12. The fabricating process according to claim 1, wherein the step of separating the temporary substrate is carried out mechanically, via the fragile interface.

13. The fabricating process according to claim 1, wherein the donor substrate of single-crystal piezoelectric or pyroelectric or ferroelectric material is made of lithium niobate, or lithium tantalate.

14. The fabricating process according to claim 1, wherein the temporary substrate is of the same nature as the donor substrate of single-crystal piezoelectric or pyroelectric or ferroelectric material.

15. The fabricating process according to claim 1, wherein the final substrate is made of a material such as lithium niobate, lithium tantalate or silicon or glass or sapphire.

16. The process for fabricating a component according to claim 2 and comprising: producing a first metal functional structure on a first face of said layer of single-crystal piezoelectric or pyroelectric or ferroelectric material, said structure being configured to be a continuous electrode or a series of discontinuous electrodes; producing a second metal functional structure on the opposite face of said layer of single-crystal piezoelectric or pyroelectric or ferroelectric material or on an opposite face of another layer of single-crystal piezoelectric or pyroelectric or ferroelectric material, said structure being configured to be a continuous electrode or a series of discontinuous electrodes, said first face corresponding to the thinned face of the donor substrate of single-crystal piezoelectric or pyroelectric or ferroelectric material

17. The fabricating process according to claim 1, said component being an acoustic wave resonator, said process comprising: depositing a sacrificial layer on the surface of a layer of single-crystal piezoelectric or pyroelectric or ferroelectric material or on the surface of the additional layer of second single-crystal piezoelectric or pyroelectric or ferroelectric material and/or on the surface of the first metal functional structure, said sacrificial layer for example being made of amorphous silicon; producing at least one well in said sacrificial layer; etching said well so as to produce a suspended membrane of single-crystal piezoelectric or pyroelectric or ferroelectric material.

18. The fabricating process according to claim 1, said component being an acoustic-wave resonator, said process comprising producing cavities in said final substrate before the second joining step.

19. The fabricating process according to claim 1, said component being an acoustic-wave resonator, said process comprising producing a stack with, in alternation, layers having different acoustic impedances, for example, SiO.sub.2/W, or SiO.sub.2/Mo, or SiO.sub.2/AlN or SiOC/SiN, etc., on the surface of the layer of single-crystal piezoelectric or pyroelectric or ferroelectric material or on the surface of the additional layer of second single-crystal piezoelectric or pyroelectric or ferroelectric material, in order to produce a Bragg-mirror structure.

20. The fabricating process according to claim 1, said component comprising a set of at least two stacked bulk-acoustic-wave resonators, said process comprising: fabricating a resonator comprising at least a first layer of single-crystal piezoelectric or pyroelectric or ferroelectric material, a first metal functional structure, and a second metal functional structure, on a final substrate; depositing one or more acoustically coupling or isolating layers on the surface of said first resonator; producing a first metal functional structure apt to form a first electrode of a second resonator on the surface of said one or more acoustically coupling or acoustically isolating layers; transferring a second layer of single-crystal piezoelectric or pyroelectric or ferroelectric material previously transferred, to a temporary substrate, via a fragile separating interface region to the surface of said temporary substrate; removing said temporary substrate so as to leave a second face of said second active layer free; producing a second metal functional structure, so as to define the second resonator.

21. The fabricating process according to claim 1, said component being a pyroelectric sensor comprising, between two continuous electrodes, an active layer, the layer of single-crystal piezoelectric or pyroelectric or ferroelectric material, lithium tantalate for example, said process further comprises partially etching, from the back side, the final substrate, which is for example made of silicon, so as to define a membrane in said final substrate.

22. The fabricating process according to claim 1, wherein the fragile interface region comprises a layer of noble metal and another layer comprising at least one of the following materials: an oxide; a nitride; a silicon oxynitride; a silicon oxycarbide (SiOC); SiOF.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0081] Other features and advantages of the invention will become apparent with the aid of the following description, given with reference to the appended drawings in which:

[0082] FIG. 1A illustrates one step of a process according to the prior art;

[0083] FIG. 1B illustrates one step of a process according to the prior art;

[0084] FIG. 1C illustrates one step of a process according to the prior art;

[0085] FIG. 1D illustrates one step of a process according to the prior art;

[0086] FIG. 1E illustrates one step of a process according to the prior art;

[0087] FIG. 1F illustrates one step of a process according to the prior art;

[0088] FIG. 1G illustrates one step of a process according to the prior art;

[0089] FIG. 1H illustrates one step of a process according to the prior art;

[0090] FIG. 2A illustrates atomic-force-microscopy observations of the surface of a thin aluminium layer deposited on a lithium-niobate substrate after deposition;

[0091] FIG. 2B illustrates atomic-force-microscopy observations of the surface of a thin aluminium layer deposited on a lithium-niobate substrate after annealing at 400° C. for 2 hours;

[0092] FIG. 3A illustrates the impact of an anneal on the electrical response of a bulk-wave resonator made of lithium niobate (modulus of the admittance);

[0093] FIG. 3B illustrates the impact of an anneal on the electrical response of a bulk-wave resonator made of lithium niobate (phase of the impedance). The dashed curve and the thick, solid curve correspond to a resonator produced from a lithium-niobate layer annealed at 350° C. and 400° C., respectively;

[0094] FIG. 4A illustrates a step of a first variant of a process according to the invention.

[0095] FIG. 4B illustrates a step of a first variant of a process according to the invention.

[0096] FIG. 4C illustrates a step of a first variant of a process according to the invention.

[0097] FIG. 4D illustrates a step of a first variant of a process according to the invention.

[0098] FIG. 4E illustrates a step of a first variant of a process according to the invention.

[0099] FIG. 4F illustrates a step of a first variant of a process according to the invention.

[0100] FIG. 4G illustrates a step of a first variant of a process according to the invention.

[0101] FIG. 4H illustrates a step of a first variant of a process according to the invention.

[0102] FIG. 4I illustrates a step of a first variant of a process according to the invention.

[0103] FIG. 4J illustrates a step of a first variant of a process according to the invention.

[0104] FIG. 4K illustrates a step of a first variant of a process according to the invention.

[0105] FIG. 4L illustrates a step of a first variant of a process according to the invention.

[0106] FIG. 4M illustrates a step of a first variant of a process according to the invention.

[0107] FIG. 4N illustrates a step of a first variant of a process according to the invention.

[0108] FIG. 4O illustrates a step of a first variant of a process according to the invention.

[0109] FIG. 4P illustrates a step of a first variant of a process according to the invention.

[0110] FIG. 5A illustrates a step of a second variant of a process according to the invention.

[0111] FIG. 5B illustrates a step of a second variant of a process according to the invention.

[0112] FIG. 5C illustrates a step of a second variant of a process according to the invention.

[0113] FIG. 5D illustrates a step of a second variant of a process according to the invention.

[0114] FIG. 5E illustrates a step of a second variant of a process according to the invention.

[0115] FIG. 5F illustrates a step of a second variant of a process according to the invention.

[0116] FIG. 5G illustrates a step of a second variant of a process according to the invention.

[0117] FIG. 6A illustrates a step of a third variant of a process according to the invention.

[0118] FIG. 6B illustrates a step of a third variant of a process according to the invention.

[0119] FIG. 6C illustrates a step of a third variant of a process according to the invention.

[0120] FIG. 6D illustrates a step of a third variant of a process according to the invention.

[0121] FIG. 7A illustrates a step of a sixth variant of a process according to the invention.

[0122] FIG. 7B illustrates a step of a sixth variant of a process according to the invention.

[0123] FIG. 7C illustrates a step of a sixth variant of a process according to the invention.

[0124] FIG. 7D illustrates a step of a sixth variant of a process according to the invention.

[0125] FIG. 7E illustrates a step of a sixth variant of a process according to the invention.

[0126] FIG. 7F illustrates a step of a sixth variant of a process according to the invention.

[0127] FIG. 7G illustrates a step of a sixth variant of a process according to the invention.

[0128] FIG. 7H illustrates a step of a sixth variant of a process according to the invention.

[0129] FIG. 7I illustrates a step of a sixth variant of a process according to the invention.

[0130] FIG. 7J illustrates a step of a sixth variant of a process according to the invention.

[0131] FIG. 7K illustrates a step of a sixth variant of a process according to the invention.

[0132] FIG. 7L illustrates a step of a sixth variant of a process according to the invention.

[0133] FIG. 7M illustrates a step of a sixth variant of a process according to the invention.

[0134] FIG. 7N illustrates a step of a sixth variant of a process according to the invention.

[0135] FIG. 8A illustrates a step of a seventh variant of a process according to the invention.

[0136] FIG. 8B illustrates a step of a seventh variant of a process according to the invention.

[0137] FIG. 8C illustrates a step of a seventh variant of a process according to the invention.

[0138] FIG. 8D illustrates a step of a seventh variant of a process according to the invention.

[0139] FIG. 8E illustrates a step of a seventh variant of a process according to the invention.

[0140] FIG. 8F illustrates a step of a seventh variant of a process according to the invention.

[0141] FIG. 8G illustrates a step of a seventh variant of a process according to the invention.

[0142] FIG. 8H illustrates a step of a seventh variant of a process according to the invention.

[0143] FIG. 8I illustrates a step of a seventh variant of a process according to the invention.

[0144] FIG. 8J illustrates a step of a seventh variant of a process according to the invention.

[0145] FIG. 8K illustrates a step of a seventh variant of a process according to the invention.

[0146] FIG. 8L illustrates a step of a seventh variant of a process according to the invention.

[0147] FIG. 8M illustrates a step of a seventh variant of a process according to the invention.

[0148] FIG. 8N illustrates a step of a seventh variant of a process according to the invention.

[0149] FIG. 8O illustrates a step of a seventh variant of a process according to the invention.

[0150] FIG. 8P illustrates a step of a seventh variant of a process according to the invention.

[0151] FIG. 8Q illustrates a step of a seventh variant of a process according to the invention.

[0152] FIG. 8R illustrates a step of a seventh variant of a process according to the invention.

[0153] FIG. 8S illustrates a step of a seventh variant of a process according to the invention.

[0154] FIG. 9A illustrates a step of an eighth variant of a process according to the invention.

[0155] FIG. 9B illustrates a step of an eighth variant of a process according to the invention.

[0156] FIG. 9C illustrates a step of an eighth variant of a process according to the invention.

[0157] FIG. 9D illustrates a step of an eighth variant of a process according to the invention.

[0158] FIG. 9E illustrates a step of an eighth variant of a process according to the invention.

[0159] FIG. 9F illustrates a step of an eighth variant of a process according to the invention.

[0160] FIG. 9G illustrates a step of an eighth variant of a process according to the invention.

[0161] FIG. 9H illustrates a step of an eighth variant of a process according to the invention.

[0162] FIG. 9I illustrates a step of an eighth variant of a process according to the invention.

[0163] FIG. 9J illustrates a step of an eighth variant of a process according to the invention.

[0164] FIG. 9K illustrates a step of an eighth variant of a process according to the invention.

DETAILED DESCRIPTION

[0165] Generally, to overcome the issues presented in the preamble, the Applicant proposes to separate the issues and to construct the final component sequentially using an original transferring process. Thus, the process for fabricating the component may in particular comprise all of the following steps:

[0166] Step 1: creating a weakened region by implanting ions into a piezoelectric or pyroelectric or ferroelectric material that it is desired to transfer, depositing a bonding layer, which may be a layer of silicon oxide (SiO.sub.2), and activating the bonding layer via a treatment consisting of a chemical-mechanical polishing (CMP) treatment and/or a plasma activation. A root-mean-square (RMS) roughness lower than 5 Å is preferred. This bonding layer may also be deposited and planarized before the ion implantation.

[0167] Step 2: transferring the piezoelectric or pyroelectric or ferroelectric layer to a temporary substrate, this comprising producing a fragile separating interface region that allows this piezoelectric or pyroelectric or ferroelectric layer to be subsequently detached from the temporary substrate. This fragile separating interface region may advantageously consist of a stack of at least two materials that, placed in contact, naturally have a low force of adhesion at this interface.

[0168] Step 3: healing defects caused by the splitting and ion implantation. This is achieved via a polishing step and an anneal (or an anneal followed by a polishing step). At this stage, the means for detaching the transferred film must be capable of withstanding the applied thermal budget.

[0169] Step 4: producing low levels (lower electrode; sacrificial-layer wells; where appropriate, temperature-compensating layer and passivating layer; or even addition of lower over-metallizations; etc.).

[0170] Step 5: depositing a bonding layer, and planarizing the latter.

[0171] Step 6: bonding this stack to the ultimate host substrate.

[0172] Step 7: separating the temporary substrate via the fragile separating interface region.

[0173] Step 8: removing any layers incorporated into the temporary substrate.

[0174] Step 9: continuing the production process by adding upper levels (etching apertures in the transferred film, upper electrodes, temperature-compensating layer, passivating layer, over-metallizations, etc.).

[0175] Proceeding in this way allows a high thermal budget to be applied to the temporary substrate without degrading the functional layers present and thus an integral stack to be achieved. Moreover, the following steps may be carried out up to temperatures equal to those of the healing anneal. The limitation as regards thermal budget, which limitation is related to the presence of implantation defects that are liable to cause premature exfoliations, is removed, this allowing thin layers that are much denser and of much better acoustic quality to be achieved.

[0176] The present invention is based on techniques that are known in the art: for example all of the techniques presented in patent FR 2 816 445, which has already disclosed techniques for transferring single-crystal layers by splitting to a temporary substrate, then transferring the transferred layer to an ultimate host substrate. Nevertheless, the present invention differs therefrom in that the Applicant proposes to include, in these techniques, a fragile separating interface region.

[0177] Patent US 2011/0278993A1 also discloses a process that is quite similar to the process that is the subject of the present invention: it describes producing surface- or bulk-acoustic-wave components composed of a single-crystal piezoelectric film transferred beforehand using the sequence of steps, steps 1-9, described above. In step 2 described above, this patent proposes to insert a dielectric layer between the transferred layer and a substrate made of a material that induces, at the interface between the temporary substrate and the piezoelectric substrate, a thermal stress that is lower than the stress between the carrier substrate and the thin piezoelectric film. After the various lithography and integration levels of the thin piezoelectric layer (steps 3-6 described above) have been carried out, the temporary substrate is removed via a selective (physical or chemical) etch of the layer (e.g.: ZnO, SiO.sub.2, AlN, Cu, Al, Ti or polyimide) located between the thin piezoelectric film and the temporary substrate. Although the thickness of this sacrificial layer is not mentioned, it is thinkable that the latter is removed by chemical infiltration and/or mechanical lapping of the temporary substrate. These two techniques may rapidly prove to be prohibitive in terms of treatment duration and/or fabrication cost.

[0178] The process that is the subject of the present invention differs from the teaching of patent US 2011/0278993A1 in that provision is advantageously made to form, in the stack, a fragile separating interface region located between the piezoelectric or pyroelectric or ferroelectric film and the temporary substrate, or the initial carrier substrate.

[0179] It thus becomes possible to undo this interface via mechanical means (insertion of a blade for example) without consuming the initial substrate.

[0180] One major advantage of the present invention resides in the fact that it is possible to recover the initial substrate (the latter not being consumed, contrary to the chemical/physical/mechanical etching methods commonly used).

[0181] Generally, the advantages of the present invention reside in: the transfer of a piezoelectric or pyroelectric or ferroelectric layer (severed from the bulk single-crystal substrate) to a temporary substrate; in the ability to provide a fragile separating interface region that is able to withstand the thermal budget and the associated thermomechanical stresses; in the ability to provide a second bond, this one being the ultimate one, of the piezoelectric or pyroelectric or ferroelectric layer to an ultimate substrate; and lastly in the ability to detach the piezoelectric or pyroelectric or ferroelectric layer from the temporary substrate without detaching it from the ultimate substrate.

[0182] Generally, a fragile interface may be produced when two compounds placed in contact exhibit an interdiffusion that leads to the generation of structural defects and/or stresses. Among reactions known to generate fragility, mention may be made of the silicidation of metals (W, Ti, Co, Ni, Mo, Ta, Ru, etc.) that occurs at high temperature when these metals are brought into contact with silicon. Compounds (WSi.sub.2, TiSi.sub.2, CoSi.sub.2, NiSi, MoSi.sub.2, TaSi.sub.2, Ru.sub.2Si.sub.3, etc.) are then produced that have a volume larger than that of the original metal, leading to the appearance of high stresses that may lead to delamination of the interface as described in the article by O. Thomas, Les siliciures de métaux de transition en microélectronique: propriétés mécaniques et contraintes induites au cours de la formation en phase solide [which may be translated as “The silicides of transition metals in microelectronics: mechanical properties and stresses induced during solid-phase formation”], PlastOx 2007, 277-286 (2009) or in the article by C. S. Petersson, J. E. E. Baglin, J. J. Dempsey, F. M. d′Heurle, S. J. La Placa, “Silicides of ruthenium and osmium: thin film reactions, diffusion, nucleation and stability”, Journal of Applied Physics 53, 4866 (1982).

[0183] A fragile interface may also form when one of the layers making contact at the separating interface comprises at least SiO.sub.2 and/or silicon nitride (such as SiN and/or Si.sub.3N.sub.4), and the other comprises at least one noble metal (platinum Pt, gold Au, silver Ag, rhodium Rh, osmium Os, palladium Pd, ruthenium Ru, iridium Ir) [G. Le Rhun, C. Dieppedale and S. Fanget, Procédé transfert de couche(s) de matériau depuis un premier substrat sur un deuxièrne substrat [which may be translated as “Process for transferring one or more layers of material from a first substrate to a second substrate”], patent No. FR 3082997]. The application of an anneal at a temperature above a certain threshold depending on the pair of materials chosen in step 3 of the process described above causes the noble metal to migrate into the layer of silicon oxide or nitride and the interface to become fragile, and this fragile interface will subsequently be able to be opened in step 7 such as described above through mechanical means.

[0184] After the thin piezoelectric layer has been transferred, in step 2 of the process described above, since the thermal budget remains moderate, the interdiffusion effects are still not activated. By spending, on the stack, in step 3 of the process described above, a high thermal budget, the anneal used to heal the piezoelectric layer (temperature typically comprised between 300 and 700° C., applied for a time from 1 to 10 h) also leads to the formation of a fragile interface by causing metal to diffuse into the silicon oxide or nitride. This interface retains enough bonding energy to permit steps 4-6 of the process described above, but its fragility allows detachment to be caused through mechanical means, such as insertion of a blade, in step 7 of the process described above.

[0185] On account of the specificities of the process for achieving layer transfer via crystal ion slicing (CIS) (combination of ion implantation, of bonding and of splitting that may be induced thermally, mechanically or chemically), it will be noted that: the first bond, in step 2 of the process described above, must have a sufficient bonding energy to ensure the mechanical integrity of the assembly consisting of the temporary substrate and donor substrate, despite the high thermomechanical stresses experienced in the steps of splitting the donor substrate and of chemical-mechanical polishing, and be capable of withstanding anneals at high temperatures (above 400° C., and potentially up to 600° C.). Typically, the bonding energy must be of the order of 1-1.5 mJ/m.sup.2. This bond must also be able to be undone relatively simply via mechanical detachment (for example via insertion of a blade). Lastly, this material must be able to be deposited at low temperature (and ideally at room temperature) in order not to cause premature ripening of the implantation defects; the second bond, in step 6, for its part, must meet the following constraints: have a high bonding energy, in order to ensure not only the adhesion of the transferred layer throughout the rest of the fabricating process, and in particular in steps that involve a high thermal budget, but also the reliability of the component at the end of fabrication; and resist the step of undoing the temporary first bond. Mineral bonding layers (for example: SiO.sub.2, SiO.sub.xN.sub.y) or metal bonding layers (for example: copper, gold, etc.) possessing an energy higher than that of the detaching interface (typically, higher than 2-3 mJ/cm.sup.2) will therefore necessarily be preferred.

[0186] Ideally, the bonding material possesses a planarizing nature in order to facilitate the encapsulation of layers inserted before the second transfer (i.e. layers such as, for example, lower electrodes) and must be able to be planarized before bonding. The constraint on the temperature withstand of this layer is greatly relaxed, and no longer depends on anything but the rest of the process. This for example optionally allows polymers, which conventionally are unable to withstand high thermal budgets (>300° C.), to be integrated into the list of possible bonding-material candidates.

[0187] It will be noted that, even though the underlying issues of bulk-acoustic-wave resonators were described above, the present invention is entirely applicable to any type of component requiring the transfer of a single-crystal layer requiring a step of healing annealing at relatively high temperature and, moreover, integration of materials that are potentially unable to withstand these anneals. Possible applications comprise any other type of elastic-wave components (SAW filters or Lamb-wave filters), but also potentially applications using the piezoelectric and ferroelectric properties of the material, such as for example pyroelectric sensors.

[0188] In order to illustrate the diversity of components able to advantageously be fabricated using the process of the present invention, the Applicant has described below a few examples of application.

[0189] First variant of the invention comprising producing a bulk-acoustic-wave (BAW) resonator made of lithium niobate:

[0190] Step 1.1:

[0191] Light ions (He, H) are implanted into a lithium-niobate donor substrate 100 as illustrated in FIG. 4A.

[0192] Step 1.2:

[0193] A bonding layer 110, which may for example be a layer of SiO.sub.2 deposited by reactive sputtering of an Si target in an Ar/O.sub.2 plasma, is deposited on the donor substrate 100 as illustrated in FIG. 4B. Next, an operation of chemical-mechanical polishing (CMP) and/or plasma activation is carried out.

[0194] Step 1.3:

[0195] In parallel, an oxide layer 210 is deposited on a temporary receiver substrate 200. The oxide layer may be identical to that produced on the donor substrate or be a thermal oxide, as illustrated in FIG. 4C. Likewise, the temporary receiver substrate 200 may be of the same nature (LiNbO.sub.3) or of a different nature (Si, glass, sapphire) to that of the donor substrate 100.

[0196] Step 1.4:

[0197] The fragile separating interface region is then produced on the surface of the whole bonding layer 210 on the temporary receiving substrate 200. To this end, a noble metal 300 (e.g.: Pt, Pd, Au) is deposited and an (oxide) bonding layer 310 is deposited, then an operation of chemical-mechanical polishing and/or plasma activation is carried out, as illustrated in FIG. 4D. The roughness of the noble-metal layer may typically be comprised between 0.5 and 5 nm. Optionally, an adhesion layer (e.g.: Cr, Ti, TiN, Ta, TaN, Ta.sub.2O.sub.5, TiO.sub.2, WN, WO.sub.3) may be inserted between the layer of noble metal and the layer of bonding oxide in order to promote the adhesion of the latter. This adhesion layer may also act as a barrier layer to the diffusion of elements into the substrate.

[0198] Step 1.5:

[0199] The donor substrate 100 (plus bonding layer 110) is bonded to the temporary substrate 200 (plus bonding layer 210, plus fragile interface region: 300 et 310) as illustrated in FIG. 4E. In this example, it is a question of direct SiO.sub.2/SiO.sub.2 bonding, which is for example achievable by polishing the two substrates, surface activation, placement in contact, and consolidating anneal, as illustrated in FIG. 4E. In order to avoid the effects of differential expansion between donor and temporary substrates, in this example a temporary substrate made of lithium niobate (of same crystal orientation as the donor) is employed.

[0200] Step 1.6:

[0201] The transferred layer 100a is detached and thus left bare, in this example using the “Smart Cut” process (technology developed by the Applicant) and a splitting anneal, as illustrated in FIG. 4F.

[0202] Step 1.7:

[0203] A healing anneal is carried out, then the transferred layer 100a is polished and its thickness adjusted, or, vice versa, the transfer layer is polished, its thickness adjusted and then the healing anneal carried out, as illustrated in FIG. 4G.

[0204] Step 1.8:

[0205] The lower electrode 400 (which is for example made of aluminium) is deposited (by sputtering) then operations of photolithography and etching (chemical etching for example) of the metal layer are carried out and the resist removed, as illustrated in FIG. 4H.

[0206] Step 1.9:

[0207] The following are then carried out: deposition of a sacrificial layer 500, which is for example made of amorphous silicon, photolithography, reactive-ion etching and resist removal, in order to define releasing wells, as illustrated in FIG. 4I.

[0208] Step 1.10:

[0209] A bonding layer 600 (for example made of SiO.sub.2) is deposited (by reactive sputtering of a silicon target in an Ar/O.sub.2 plasma) and an operation of chemical-mechanical polishing (CMP) is carried out to remove the topology caused by the presence of the lower electrode and of the releasing well, as illustrated in FIG. 4J.

[0210] Step 1.11:

[0211] A second joining operation, in which the temporary substrate 200 is bonded to the ultimate substrate 700, is carried out as illustrated in FIG. 4K. The process used is the same as that used to form the first bond. To avoid the effects of differential expansion, an ultimate substrate made of lithium niobate, and of the same crystal orientation as that of the temporary substrate, is advantageously used.

[0212] Step 1.12:

[0213] The operation of separating the two substrates via the fragile separating interface region comprising the layer 300 is then carried out, as illustrated in FIG. 4L, so as to achieve debonding (detachment), this possibly advantageously being done by inserting a blade at the fragile interface.

[0214] Step 1.13:

[0215] The metal layer 300 comprised in the fragile separating interface region is then removed, leaving the layer of interest 100a bare as illustrated in FIG. 4M. It may typically be a question of removing Pt metal via dry etching and removing the oxide in HF.

[0216] The rest of the process may typically be made up of steps identical to those presented in the prior art.

[0217] Step 1.14:

[0218] Apertures are etched in the layer of interest 100a, namely the transferred lithium-niobate film, for example by photolithography, ion-beam etching (IBE) and resist removal, as illustrated in FIG. 4N.

[0219] Step 1.15:

[0220] Upper electrodes 800, for example made of aluminium, are then formed on the surface of the previously structured layer of interest 100a, via deposition by sputtering, photolithography, wet etching and resist removal, as illustrated in FIG. 4O.

[0221] Step 1.16:

[0222] The membranes containing the resonators are then released, by etching the wells of sacrificial layer 500 (here using gaseous XeF.sub.2 to dissolve the wells, which are made of amorphous silicon), as illustrated in FIG. 4P.

[0223] It will be noted that this first variant embodiment proposes to use a detaching layer located directly in contact with the transferred layer, without this presupposing an exact location of this layer with respect to the bonding interface. It is for example possible to locate this sacrificed layer in contact with the temporary substrate, or even to insert it between two layers identical to the bonding layer. In both the latter cases, after the first bond has been undone, provision may be made for a step of removing the residual layer making contact with the transferred layer if this residual layer is not desired in the final stack.

[0224] Second Variant of the Invention in which the Thin Piezoelectric Film is Transferred to a Substrate with Predefined Cavities

[0225] According to this variant, there is no (aSi) sacrificial layer as presented in the first variant of the process in step 1.9. Acoustic isolation is achieved via the formation of predefined cavities in the final substrate. The following is one example of a process using this variant:

[0226] First series of steps, this series being referenced step 2.1: the same operations as those described in step 1.1 to step 1.8 of the first process variant may be repeated, this leading to the structure illustrated in FIG. 5A, which shows the stack of layers: 200/210/300/310/110/100a, with an electrode 400, the layer 100a corresponding to the layer of piezoelectric material.

[0227] Step 2.2:

[0228] A bonding layer 600 (for example made of SiO.sub.2) is deposited (by reactive sputtering of a silicon target in an Ar/O.sub.2 plasma), then an operation of chemical-mechanical polishing (CMP) is carried out to remove the topology caused by the presence of the electrode, as illustrated in FIG. 5B.

[0229] Step 2.3:

[0230] Predefined cavities are produced in the final substrate 700 (Si, glass, sapphire, LNO, LTO) by photolithography, physical and/or chemical etching, then resist removal (or stripping), as illustrated in FIG. 5C.

[0231] Step 2.4:

[0232] A layer of bonding oxide 710 is deposited (preferably chemically for the sake of conformality) or grown via thermal oxidation (presented case). The oxide may have an RMS roughness comprised between 0.1 and 0.5 Å and is compatible with direct bonding, as illustrated in FIG. 5D.

[0233] Step 2.5:

[0234] Next, the temporary substrate 200 and final substrate 700 are joined via all the intermediate layers produced beforehand, then a consolidating anneal is carried out, as illustrated in FIG. 5E.

[0235] Step 2.6:

[0236] The temporary substrate 200 is detached (advantageously by inserting a blade) via the fragile separating interface region as illustrated in FIG. 5F, then the materials from which the fragile interface is made are etched.

[0237] Last Series of Steps, which Series is Referenced: Step 2.7:

[0238] The production process is ended by carrying out the same operations as those described in the steps of the first variant, leading to the structure illustrated in FIG. 5G, which shows the structured layer of interest 100a comprised between the electrodes 400 and 800.

[0239] Third variant of the invention comprising transferring a thin single-crystal film to silicon:

[0240] One of the issues mentioned in the prior art is the fact of being incapable of transferring a thin single-crystal piezoelectric layer to silicon. This is partially related to the need to apply high-temperature heat treatments, this, combined with the large differences in coefficient of thermal expansion between these materials and silicon, often leading to breakage of samples. The Applicant thus proposes to use the invention to more easily transfer the piezoelectric layer to silicon.

[0241] The production process is then in every way identical to the preceding processes. A first transfer, of the thin piezoelectric layer to a temporary substrate that is identical to the donor substrate (reference then being made to homostructure transfer), is carried out. This allows the effects of thermoelastic stresses in the steps of bonding, splitting and annealing at high temperature, to be limited. In the second transfer, the relatively low bonding anneal temperatures required in steps 1.11 (or 2.5) (typically of the order of 150 to 200° C. depending on the materials present) is taken advantage of to limit the thermomechanical stresses resulting from the differential in thermal expansion between the temporary and final substrate. The risk of breakage of the bonded-together wafers is therefore almost reduced to zero, this allowing the use of a silicon substrate as ultimate substrate to be envisaged.

[0242] It will be noted that, if the transferred layer is thin enough with respect to the temporary substrate (thinner than one micron, for a substrate of the order of 500 μm), it will not be able to generate thermoelastic stresses in the annealing steps: in contrast, it will undergo the expansion of the substrate elastically. In this case, if the bonding is strong enough for the risk of delamination to be low, it is possible to envisage a direct transfer to an ultimate substrate different from the donor substrate.

[0243] Fourth Variant of the Invention Comprising Producing a Plate-Wave Component.

[0244] The preceding embodiments may be used for types of resonators other than BAW resonators. They may for example be used to produce plate-acoustic-wave resonators (also called Lamb-wave resonators, or contour-mode resonators, etc.). One of the variants of these components is said to employ vertical field excitation (VFE): the plate waves are excited in a piezoelectric membrane by applying an electric field that is oriented through the thickness of the plate, this being achieved by placing a floating electrode on one of the faces of the membrane (the lower face for example) and electrodes taking the form of interdigitated combs on the opposite face. The process for producing these components is therefore highly analogous to that of a bulk-wave resonator: the only difference is the geometries of the patterns of the electrodes and of the sacrificial layers.

[0245] Another variant of these plate-wave components is said to employ lateral field excitation (LFE): the plate waves are excited in a piezoelectric membrane this time by applying a horizontal electric field, this being achieved by placing electrodes, which again take the form of interdigitated combs, on only one of the faces of the plate. The production process is thus exactly the same, except that the steps required to produce the lower or upper electrodes are not required.

[0246] Fifth Variant of the Invention Comprising Producing a Solidly Mounted or Guided-Wave Bulk-Acoustic-Wave Resonator:

[0247] Variants of bulk-acoustic-wave or plate-acoustic-wave resonators use a Bragg mirror instead of an air-filled cavity to confine the elastic waves in the piezoelectric layer. Reference is then made to solidly mounted resonators (SMR) or guided-wave resonators, respectively. These mirrors are produced by stacking layers having, in alternation, low and high acoustic impedances (for example, SiO.sub.2/W, or SiO.sub.2/Mo, or SiO.sub.2/AlN or SiOC/SiN, etc.) and thicknesses substantially equal to one quarter of a wavelength, although variants do exist that break this rule with a view to optimizing the acoustic characteristics of these mirrors.

[0248] The integration of such mirrors into resonators made of lithium niobate, for example, is tricky because the layers of these structures are generally deposited at high temperature in order to achieve relatively dense, or not very porous, materials that as a result will have reasonable acoustic attenuations. These deposition temperatures (typically of the order of 400 to 500° C.), coupled with the time taken to carry out the depositions required to produce complete stacks, and issues with stresses in these layers, make production, using prior-art processes, of these mirrors on the donor substrate complex. In contrast, use of the invention presented here allows production of mirrors on the healed transferred layer, which may withstand temperatures between 400 and 500° C. (close to the healing anneal temperatures), to be envisaged.

[0249] One example of a production process including such mirrors, and inspired by the first variant of the production process, is described below:

[0250] A first series of steps, which series is referenced Step 5.1:

[0251] Operations similar to those of steps 1.1 to 1.7 of the first variant are carried out and lead to the structure illustrated in FIG. 6A, which shows the layer of interest 100a, on the surface of the fragile separating interface region comprising the layer 300 and produced on the surface of the temporary substrate 200 covered with a layer 210, the layer of interest 100a being covered with an electrode 400.

[0252] Step 5.2:

[0253] A stack is deposited of layers: made of SiO.sub.2, which layer is referenced 600/made of W, which layer is referenced 610/made of SiO.sub.2, which layer is referenced 601/made of W, referenced 620, for example by plasma-enhanced chemical vapour deposition (PECVD) as regards the SiO.sub.2 and by chemical vapour deposition (CVD) as regards the W. Operations of photolithography, and reactive-ion etching are carried out on the W/SiO.sub.2/W trilayer, then the resist is removed. This allows mirrors to be defined under the resonators, as illustrated in FIG. 6B.

[0254] Step 5.3:

[0255] A layer 602 of SiO.sub.2 is deposited, again by PECVD. An operation of planarization by chemical-mechanical polishing, optionally assisted by pre-etching of the SiO.sub.2 layer located on the W/SiO.sub.2/W stacks formed in the preceding step, is carried out, as illustrated in FIG. 6C.

[0256] Step 5.4:

[0257] It is then possible to continue the production process according to the first fabricating-process variant in order to transfer the piezoelectric layer with its Bragg mirror to a final substrate 700, as illustrated in FIG. 6D.

[0258] Sixth Variant of the Invention Comprising a Pyroelectric Sensor

[0259] The invention is not solely applicable to the case of piezoelectric resonators and may be generalized to other types of components. Moreover, it is not limited to the use of a piezoelectric material such as lithium niobate. By way of example, the Applicant proposes to apply the invention to the case of pyroelectric sensors based on lithium tantalate. The principal consists in this case in producing lithium-tantalate membranes that are suspended in order to thermally isolate them from the substrate, and that are metallized on both faces thereof in order to form metal/insulator/metal capacitors. The principle of these sensors consists in measuring the capacitance variation observed when thermal radiation heats the suspended capacitor.

[0260] The use of releasing wells to form suspended membranes was described in the preceding examples. It is entirely possible in the present case, if it is possible to transfer the lithium-tantalate layer to silicon by virtue of the invention, to etch the back side of the silicon.

[0261] Step 6.1:

[0262] Light ions are implanted into a lithium-niobate substrate 100, as illustrated in FIG. 7A.

[0263] Step 6.2:

[0264] A bonding layer 110 is deposited on the donor substrate. In this example, it is proposed to use layers of SiO.sub.2, deposited by reactive sputtering of an Si target in an Ar/O.sub.2 plasma. An operation of chemical-mechanical polishing (CMP) and/or plasma activation is carried out, as illustrated in FIG. 7B.

[0265] Step 6.3:

[0266] An oxide layer 210 is deposited on the temporary receiver substrate 200, as illustrated in FIG. 7C. The oxide layer may be identical to that of the donor substrate or be a thermal oxide. Likewise, the temporary receiver substrate 200 may be of same nature (LiTaO.sub.3) or of different nature (Si, glass, sapphire) to the donor substrate.

[0267] Step 6.4:

[0268] The fragile separating interface region is produced by depositing a noble metal (e.g.: Pt, Pd, Au) 300 and depositing an (oxide) bonding layer 310. Next, an operation of chemical-mechanical polishing and/or plasma activation is carried out, as illustrated in FIG. 7D. Optionally, an adhesion layer (e.g.: Cr, Ti, TiN, Ta, TaN, Ta.sub.2O.sub.5, TiO.sub.2, WN, WO.sub.3) may be inserted between the layer of noble metal and the layer of bonding oxide in order to promote the adhesion of the latter.

[0269] Step 6.5:

[0270] The donor substrate 100 is bonded to the temporary receiver substrate 200, as illustrated in FIG. 7E. In this example, it is a question of direct SiO.sub.2/SiO.sub.2 bonding, which is for example achievable by polishing the two substrates, surface activation, placement in contact, and consolidating anneal. In order to avoid the effects of differential expansion between donor and temporary substrates, in this example a temporary substrate made of lithium niobate (of same crystal orientation as that of the donor substrate) is employed.

[0271] Step 6.6:

[0272] The transferred layer is detached, in this example using the “Smart Cut” process: splitting anneal, as illustrated in FIG. 7F, allowing the thin layer of interest to be defined in the material 100.

[0273] Step 6.7:

[0274] A healing anneal is carried out, then the transferred layer 100 is polished and its thickness adjusted, or, vice versa, the transfer layer is polished, its thickness adjusted and then the healing anneal carried out, as illustrated in FIG. 7G.

[0275] Step 6.8:

[0276] The lower electrode 400 (which is for example made of aluminium) is deposited (by sputtering) and photolithography and etching (chemical etching for example) of the metal layer are carried out and the resist removed, as illustrated in FIG. 7H.

[0277] Step 6.9:

[0278] A bonding layer 600 (for example made of SiO.sub.2) is deposited (for example by reactive sputtering of a silicon target in an Ar/O.sub.2 plasma). An operation of chemical-mechanical polishing (CMP) is carried out to remove the topology caused by the presence of the electrode, as illustrated in FIG. 7I.

[0279] Step 6.10:

[0280] A second bonding operation, in which the temporary substrate 200 is bonded to the ultimate substrate 700, is carried out, as illustrated in FIG. 7J. In this example, the process used is the same as that used to form the first bond: it is a question of direct SiO.sub.2/SiO.sub.2 bonding, which is for example achievable by polishing the two substrates, surface activation, placement in contact, and consolidating anneal. As in step 6.3, in order to avoid the effects of differential expansion between donor and temporary substrates, in this example a temporary substrate made of lithium niobate (of same crystal orientation as that of the temporary substrate) is employed.

[0281] Step 6.11:

[0282] A splitting operation is carried out via the fragile interface, as illustrated in FIG. 7K, then the layers of the fragile interface 300 and 310+110 are removed by dry etching and/or wet etching, as illustrated in FIG. 7L.

[0283] Step 6.12:

[0284] An upper electrode 800 and a layer 810 for absorbing infrared radiation are deposited and upper electrodes and this layer are defined to form capacitors, as illustrated in FIG. 7M.

[0285] Step 6.13:

[0286] The back side of the substrate is etched by deep silicon etching (e.g.: DRIE) as illustrated in FIG. 7N.

[0287] Seventh variant of the invention comprising producing a composite resonator or longitudinally coupled filter.

[0288] Certain variants of bulk-wave resonators, which variants are called “composite resonators”, have been proposed in the literature, for example with a view to providing frequency-agile resonators. In this case, the resonator is composed of two piezoelectric layers and of respective sets of electrodes, one portion of the stack being connected to the filter circuit and the other to a frequency-tuning circuit.

[0289] A similar structure may consist of a set of stacked bulk-wave resonators that are mechanically coupled, via one or more layers, so as to generate a filter function. In this case, each piezoelectric layer forms one resonator, and one of the resonators acts as input and the other as output of the filter. Reference is then made to coupled resonator filters (CRF) or stacked crystal filters (SCF). With respect to composite resonators, ultimately only the thicknesses of the layers and the geometries of the electrodes differ, but the same production process may be envisaged.

[0290] A process for producing composite filters according to the prior art and involving transferring layers is for example described in patent application FR3076126. It consists in carrying out in succession two layer-transferring steps, each including one healing anneal. Thus, during the healing anneal of the second transferred layer, the stack made up of the first layer and of the associated electrodes again undergoes a relatively long anneal at high temperature. This may have particularly dramatic effects on the electrode located deepest. It is therefore advantageous to use the invention proposed here for each of the layer transfers.

[0291] A production process, making use both of the present invention and of that of FR3076126, may therefore take the following form:

[0292] Step 7.1:

[0293] Light ions are implanted into two lithium-niobate substrates 101 and 102 as illustrated in FIG. 8A.

[0294] Step 7.2:

[0295] On the first donor substrate 101 and on the second donor substrate 102, a fragile separating interface region is produced, and a bonding layer made of SiO.sub.2 is deposited and planarized, as illustrated in FIG. 8B; these fragile separating interface regions, 301/311 and 302/312 respectively, will allow the temporary substrates to be detached.

[0296] Step 7.3:

[0297] The donor substrates 101 and 102 are joined by bonding to temporary substrates 201 and 202, as illustrated in FIG. 8C.

[0298] Step 7.4:

[0299] Lithium-niobate layers are split and detached in order to produce the layers 101a and 102a as illustrated in FIG. 8D.

[0300] Step 7.5:

[0301] Operations in which the lithium-niobate layers are subjected to healing anneals, polishing and adjustment of their thicknesses are carried out as illustrated in FIG. 8D.

[0302] Step 7.6:

[0303] A lower electrode 401 (which is for example made of Al deposited by sputtering at a temperature of 400° C.) is deposited and structured on the surface of the lower piezoelectric layer 101a as illustrated in FIG. 8F.

[0304] Step 7.7:

[0305] A layer of amorphous silicon 501 is deposited and operations of photolithography, etching and resist removal are carried out in order to form a well of sacrificial layer as illustrated in FIG. 8G.

[0306] Step 7.8:

[0307] The ultimate bonding layer 601, which may be made of silicon oxide, is deposited, as illustrated in FIG. 8H.

[0308] Step 7.9:

[0309] The first temporary substrate 201 is bonded to the ultimate substrate 701, in the present case made of thermally oxidized silicon. After surface activation, direct SiO.sub.2/SiO.sub.2 bonding may be carried out as illustrated in FIG. 8I.

[0310] Step 7.10:

[0311] The first temporary bond is undone by inserting a blade, in order to leave bare the surface of the layer of interest 101a, as illustrated in FIG. 8J.

[0312] Step 7.11:

[0313] Metal (for example Al deposited by sputtering at a temperature of 400° C.) is deposited and the upper electrode 801 of the first piezoelectric layer 101a structured, as illustrated in FIG. 8K.

[0314] Step 7.12:

[0315] Depending on the targeted application, an inter-resonator SiO.sub.2 isolating or coupling layer 901 is deposited, as illustrated in FIG. 8L.

[0316] Step 7.13:

[0317] Metal (for example, again Al) is deposited and a lower electrode 402 of the upper piezoelectric layer (which will be transferred) is structured, as illustrated in FIG. 8M.

[0318] Step 7.14:

[0319] A layer 902 of SiO.sub.2 is deposited and the step formed by the two electrodes planarized. Only a very small thickness (of the order of 10 to 20 nm) of SiO.sub.2 is left above the electrode, as illustrated in FIG. 8N.

[0320] Step 7.15:

[0321] A thin layer 302 of SiO.sub.2 (of about 10 to 20 nm in thickness) is deposited on the second temporary substrate 202, a fragile separating interface region (comprising the layer of noble metal 312) is produced, and direct bonding then annealing to consolidate the bond are carried out, as illustrated in FIG. 8O.

[0322] Step 7.16:

[0323] An operation of detaching the second temporary substrate 202 is carried out by inserting a blade, in order to leave bare the second layer of interest 102a, as illustrated in FIG. 8P.

[0324] Step 7.17:

[0325] Deposition and an operation of defining the fourth electrode level 802, which may be made of Al, are carried out, as illustrated in FIG. 8Q.

[0326] Step 7.18:

[0327] Operations in which the various layers are successively etched to form apertures allowing redistribution of electrical contacts to the various electrode levels are carried out, and releasing apertures that open into the wells of amorphous silicon 501 are produced, as illustrated in FIG. 8R.

[0328] Step 7.19:

[0329] The resonators are released by etching the wells of amorphous silicon in gaseous XeF.sub.2, as illustrated in FIG. 8S, which shows the two resonators with their layer of interest 101a and 102a comprised between the electrodes 401 and 801 and 402 and 802, respectively.

[0330] The present invention may also be applied in the context of a thicker layer of piezoelectric or pyroelectric or ferroelectric material, or in the context of at least two layers of such materials with nevertheless different natures of materials. In this context, provision is advantageously made for an intermediate growth step, just after the obtainment of the thin layer of material of interest after the splitting operation.

[0331] In this context, the Applicant describes below an eighth variant of the invention, regarding one of the embodiments described above and incorporating a step of piezoelectric-film regrowth.

[0332] The embodiments described above use thin single-crystal piezoelectric films obtained using the “Smart Cut” (or “crystal ion slicing”) process and the thickness of which is smaller than 1 μm. The thickness of the piezoelectric film is mainly dictated by the implantation energy. For example, for an implantation energy of 220 keV (160 keV), the thickness obtained for LiNbO.sub.3 (LiTaO.sub.3) is 600-750 nm (700-900 nm).

[0333] Nevertheless, the applications cited above (pyroelectric sensors, bulk-acoustic-wave resonators, surface-acoustic-wave resonators, plate-wave resonators, energy harvesting, electro-optical modulators, etc.) may require the use of thin single-crystal films having film thicknesses comprised between 1 and 10 μm. There are at the present time no industrial techniques that allow thin single-crystal films having thicknesses comprised between 1 and 10 μm and incorporating functional buried layers, patterned electrodes and/or a sacrificial layer to be obtained.

[0334] This embodiment is based on the insertion of a step of depositing material of same or similar nature (in terms of chemical nature, crystal structure and coefficient of expansion) as the layer of material transferred using the Smart Cut™ process between steps 1.7 (healing anneal, then polishing of the transferred layer and adjustment of its thickness, or, vice versa, polishing of the transferred layer, adjustment of its thickness and healing anneal) and 1.8 (deposition (by sputtering) of the lower electrode (which is for example made of aluminium), photolithography and etching (for example chemical etching) of the metal layer, and resist removal) of the first variant of the invention. The growth is then homoepitaxial and the layer transferred using the “Smart Cut” process (<1 μm) will act as a seed for the layer obtained by deposition (thickness comprised between 0.01 and 5 μm). The deposited layer may then adopt the same structure as the layer transferred using the “Smart Cut” process. Regrowth of a deposited layer thus allows a layer of material, the thickness of which may be comprised between 0.5 and 5 μm, to be obtained.

[0335] Lastly, it will be noted that the present invention is not limited to the case of (alkali-metal)-niobate piezoelectric materials and may be generalized to other families of materials such as the nitrides (AlN, GaN), GaAs, Ge, etc.

[0336] An Example of a Process According to this Eighth Variant:

[0337] The first steps are for example similar to steps 1.1 to 1.7 described above.

[0338] Step 8.1:

[0339] Operations are carried out in which a transferred layer of lithium niobate “LNO” is subjected to a healing anneal, then polishing, and then adjustment of its thickness, or, vice versa, the transferred layer is polished, its thickness adjusted and a healing anneal carried out, as illustrated in FIG. 9A, which shows a temporary substrate 200, a fragile separating interface layer 300, an oxide layer 310, and the layer of first material of interest 100a: the LNO layer.

[0340] Step 8.2:

[0341] A second layer of interest 100b, which may be a layer of LiTaO.sub.3, is deposited. The thickness of the layer is comprised between 0.1 and 5 μm. Said layer may be deposited by laser ablation (PLD—pulsed laser deposition), preferably at deposition temperatures comprised between 500 and 700° C., as illustrated in FIG. 9B.

[0342] Step 8.3:

[0343] The lower electrode 400 (which is for example made of aluminium) is deposited (by sputtering) and photolithography and etching (chemical etching for example) of the metal layer are carried out and the resist removed, as illustrated in FIG. 9C.

[0344] Step 8.4:

[0345] The following are then carried out: deposition of a sacrificial layer 500, which is for example made of amorphous silicon, then operations of photolithography, reactive-ion etching and resist removal, in order to define releasing wells, as illustrated in FIG. 9D.

[0346] Step 8.5:

[0347] A bonding layer 600 is deposited with a view to bonding the ultimate substrate, as illustrated in FIG. 9E.

[0348] Step 8.6:

[0349] A second bonding operation, in which the temporary substrate 200 is bonded to the ultimate substrate 700, is carried out. In this example, the process used is the same as that used to form the first bond. To avoid the effects of differential expansion, an ultimate substrate made of lithium niobate, and of the same crystal orientation as that of the temporary substrate, is used, as illustrated in FIG. 9F.

[0350] Step 8.7:

[0351] Debonding (detachment) is achieved by inserting a blade at the fragile interface comprising the layer 300, as illustrated in FIG. 9G.

[0352] Step 8.8:

[0353] The layer of the fragile interface made of noble metal 300, which in the present case is Pt, is removed by dry etching and the oxide is removed in HF, as illustrated in FIG. 9H, leaving bare the layer of interest 100a.

[0354] Steps that are the same as those presented with respect to the prior art are then carried out:

[0355] Step 8.9:

[0356] Apertures are etched in the transferred lithium-niobate film 100a and in the film 100b (in this example of lithium tantalate), for example by photolithography, ion-beam etching (IBE) and resist removal, as illustrated in FIG. 9I.

[0357] Step 8.10:

[0358] Upper electrodes 800, for example made of aluminium, are then formed via deposition by sputtering, photolithography, wet etching and resist removal as illustrated in FIG. 9J.

[0359] Step 8.11:

[0360] The membranes containing the resonators are then released, by etching the wells of sacrificial layer 500 (here using gaseous XeF.sub.2 to dissolve the wells, which are made of amorphous silicon), as illustrated in FIG. 9K.