Interposer and method for producing holes in an interposer

Abstract

An interposer for electrical connection between a CPU chip and a circuit board is provided. The interposer includes a board-shaped base substrate made of glass having a coefficient of thermal expansion ranging from 3.1×10.sup.−6/K to 3.4×10.sup.−6/K. The interposer further includes a number of holes having diameters ranging from 20 μm to 200 μm. The number of holes ranging from 10 to 10,000 per square centimeter. Conductive paths running on one surface of the board extend right into respective holes and therethrough to the other surface of the board in order to form connection points for the chip.

Claims

1. A method for producing holes in a board-shaped base substrate of an interposer which is adapted for electrical connection between a CPU chip and a circuit board, the method comprising the steps of: providing the board-shaped base substrate to be perforated, the board-shaped base substrate being made of glass and having a first board surface and a second board surface opposite the first board surface; aligning laser beams to predetermined perforation points of the board-shaped base substrate; triggering focused laser pulses in a wavelength range between 1600 and 200 nm in which the glass is at least partially transparent so that laser beams penetrate into the glass and are not absorbed in the surface layer of the glass and with a radiation intensity that causes local only non-thermal destruction of the glass along filamentary channels at the predetermined perforation points; and widening the filamentary channels from both the first and second board surfaces to a desired diameter of the holes so that the holes have a cylindrical shape, wherein the widening comprises etching.

2. The method of claim 1, wherein the widening step comprises electro-thermal heating and evaporation of perforation material in the filamentary channels due to dielectric breakdowns.

3. The method of claim 1, wherein the widening step comprises directing reactive gases onto the filamentary channels.

4. The method of claim 1, wherein the board-shaped base substrate is made of a single layer of glass having a first and a second substrate surface.

5. The method of claim 4, wherein the board-shaped base substrate has transversely to the first and second substrate surfaces a number of holes extending through the single layer thickness and forming inner hole walls that make edges to the first and second surfaces.

6. The method of claim 4, further comprising forming conductive paths on the first substrate surface and through the holes to the second substrate surface.

7. The method of claim 4, further comprising applying a layer of conductive paths on the first substrate surface.

8. The method of claim 1, wherein the board-shaped base substrate has a coefficient of thermal expansion ranging from 3.1×10.sup.−6/K to 3.4×10.sup.−6/K.

9. The method of claim 1, wherein the number of holes ranges from 10 to 10,000 cm.sup.−2.

10. The method of claim 1, wherein the holes having diameters that range from 20 μm to 200 μm.

11. The method of claim 1, wherein the holes have a center-to-center distance between the holes in a range from 50 μm to 700 μm.

12. The method of claim 1, wherein the step of aligning the laser beams comprises aligning a multiple laser beam array.

13. The Method of claim 1, wherein widening the filamentary channels is performed so that the holes have at the first and second board surfaces, a conical or crater-shaped inlet and outlet to the hole, respectively, and wherein the holes have inner wall in the center with a cylindrical shape.

14. A method for producing holes in an interposer adapted for electrical connection between a CPU chip and a circuit board, comprising: providing a single-layered board-shaped base substrate made of glass having a first and a second board surface; aligning laser beams to predetermined perforation points of the base substrate; triggering focused laser pulses in a wavelength range between 1600 and 200 nm in which the glass is at least partially transparent so that laser beams penetrate into the glass and are not absorbed in the surface layer of the glass and with a radiation intensity that causes local non-thermal destruction of the glass along a filamentary channel at each of the predetermined perforation points; widening the filamentary channels to holes that extend transversely through the base substrate between the first and second board surfaces, the holes numbering from 10 to 10,000 per cm.sup.2, having diameters from 20 μm to 200 μm, and having distances as measured from center to center from 50 μm to 700 μm, wherein the widening is performed from the first and the second board surface so that the holes have a cylindrical shape, wherein the widening comprises etching; and applying a layer of conductive paths on the first board surface, wherein the conductive paths on the first board surface extend into the holes and therethrough to the second board surface to form connection points for the CPU chip.

15. The method of claim 14, wherein the widening step comprises electro-thermal heating and evaporation of perforation material in the filamentary channels due to dielectric breakdowns.

16. The method of claim 14, wherein the widening step comprises directing reactive gases onto the filamentary channels.

17. The method of claim 14, wherein widening is performed so that the holes have at the first and second board surfaces, a conical or crater-shaped inlet and outlet to the hole, respectively, and wherein the holes have inner wall in the center with a cylindrical shape.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Exemplary embodiments of the invention will be described with reference to the drawings, wherein:

(2) FIG. 1 schematically illustrates, in a longitudinal sectional view, one way of producing an interposer; and

(3) FIG. 2 illustrates a second way of producing an interposer.

DETAILED DESCRIPTION

(4) In a first method step, perforation points 10 on a board-shaped glass substrate 1 are marked by focused laser pulses 41 emanating from an array 4 of lasers 40. The radiation intensity of these lasers is so strong that it causes local non-thermal destruction in the glass along a filamentary channel 11.

(5) In a second method step, filamentary channels 11 are widened into holes 12. For this purpose, opposing electrodes 6 and 7 may be employed, to which high voltage energy is applied, resulting in dielectric breakdowns across the glass substrate along filamentary channels 11. These breakthroughs are widened by electro-thermal heating and evaporation of the perforation material until the process is stopped by switching off the power supply when the desired hole diameter is achieved.

(6) Alternatively or additionally, the filamentary channels 11 may be widened using reactive gases, as illustrated by nozzles 20, 30, which direct the gas to the perforation points 10.

(7) In the next method step, conductive paths 13 to the perforation points 10 are applied on the upper surface of glass board 1, and the holes 12 are filled with conductive material 14 to complete the connections to the contact points of a CPU chip or the like at the bottom surface of the board. (For mounting on the motherboard, glass board 1 is turned around.)

(8) FIG. 2 shows another way of producing microholes. Perforation points 10 are marked by precisely imprinted RF coupling material. At these points 10 high frequency energy is applied by means of electrodes 2, 3, so that the coupling points themselves and the glass material between the upper surface coupling points and the lower surface coupling points is heated, causing the dielectric strength of the material to be lowered. When a high voltage is applied, dielectric breakdowns will occur along narrow channels 11. By continuing the supply of high-voltage energy, these narrow channels 11 may be widened to the size of holes 12.

(9) However, it is also possible, for widening the narrow channels 11 resulting from dielectric breakdowns, to use reactive gas which is supplied through nozzles 20, 30.

(10) Finally, conductive paths 13 to the holes 12 are applied on the upper surface of the glass substrate, and the holes are filled with conductive material 14 in order to establish the connections for the CPU chip, with the glass board 1 turned around.

(11) It should be noted that interposers need not to be produced separately, rather glass substrate boards for a plurality of interposers may be processed, and the large-sized glass substrate boards may be cut to obtain the individual interposers. Glass substrate boards of a size with edge lengths of 0.2 m by 3 m (or less) can be processed. Round board formats may have dimensions of up to 1 m.

(12) Glasses were melted at 1620° C. in Pt/Ir crucibles from conventional, essentially alkali-free raw materials, apart from unavoidable impurities. The melt was refined for one and a half hour at this temperature, then poured into inductively heated platinum crucibles and stirred for 30 minutes at 1550° C. for homogenization.

(13) The table shows fifteen examples of suitable glasses and their compositions (in wt. % based on oxide) and their main features. The refining agents SnO.sub.2 (Examples 1-8, 11, 12, 14, 15) and As.sub.2O.sub.3 (Examples 9, 10, 13) with a proportion of 0.3 wt. % is not listed. The following properties are specified: the coefficient of thermal expansion α.sub.20/300 (10.sup.−6/K) the density (g/cm.sup.3) the dilatometric glass transition temperature T.sub.g (° C.) according to DIN 52324 the temperature at a viscosity of 10.sup.4 dPa.Math.s (referred to as T4 [° C.]) the temperature at a viscosity of 10.sup.2 dPa.Math.s (referred to as T2 [° C.]), calculated from the Vogel-Fulcher-Tammann equation an “HCl” acid resistance as weight loss (material removal value) of glass boards measuring 50 mm×50 mm×2 mm and polished on all sides after treatment with 5% hydrochloric acid for 24 hours at 95° C. (mg/cm.sup.2). a “BHF” resistance to buffered hydrofluoric acid as a weight loss (material removal value) of glass boards measuring 50 mm×50 mm×2 mm and polished on all sides after treatment with 10% NH.sub.4F NH4F.Math.HF for 20 min at 23° C. (mg/cm.sup.2) the refractive index n.sub.d.

EXAMPLES

(14) Compositions (in wt. % based on oxide), and essential properties of glasses according to the invention

(15) TABLE-US-00001 1 2 3 4 5 6 SiO.sub.2 60.0 60.0 59.9 58.9 59.9 61.0 B.sub.2O.sub.3 7.5 7.5 7.5 8.5 7.5 9.5 Al.sub.2O.sub.3 21.5 21.5 21.5 21.5 21.5 18.4 MgO 2.9 2.9 2.0 2.0 2.9 2.2 CaO 3.8 2.8 3.8 3.8 4.8 4.1 BaO 4.0 5.0 5.0 5.0 3.1 4.5 ZnO — — — — — — α.sub.20/300 (10.sup.−6/K) 3.07 3.00 3.01 3.08 3.13 3.11  (g/cm.sup.3) 2.48 2.48 2.48 2.48 2.47 2.45 Tg (° C.) 747 748 752 741 743 729 T 4 (° C.) 1312 1318 1315 1308 1292 1313 T 2 (° C.) 1672 1678 1691 1668 1662 1700 n.sub.d 1.520 1.518 1.519 1.519 1.521 1.515 HCl (mg/cm.sup.2) 1.05 n.m. 0.85 n.m. 1.1 n.m. BHF (mg/cm.sup.2) 0.57 0.58 0.55 0.55 0.56 0.49 7 8 9 10 11 12 SiO.sub.2 58.5 62.8 63.5 63.5 59.7 59.0 B.sub.2O.sub.3 7.7 8.2 10.0 10.0 10.0 9.0 Al.sub.2O.sub.3 22.7 16.5 15.4 15.4 18.5 17.2 MgO 2.8 0.5 2.0 1.0 2.0 CaO 2.0 4.2 5.6 6.6 8.3 9.0 BaO 5.0 7.5 3.2 3.2 3.2 3.5 ZnO 1.0 — — — — — α.sub.20/300 (10.sup.−6/K) 2.89 3.19 3.24 3.34 3.44 3.76  (g/cm.sup.3) 2.50 2.49 2.42 2.43 2.46 2.50 Tg (° C.) 748 725 711 719 714 711 T 4 (° C.) 1314 1325 1320 1327 1281 1257 T 2 (° C.) 1674 1699 n.m. n.m. 1650 1615 n.sub.d 1.520 1.513 1.511 1.512 1.520 1.526 HCl (mg/cm.sup.2) n.m. 0.30 0.89 n.m. n.m. 0.72 BHF (mg/cm.sup.2) 0.62 0.45 0.43 0.40 0.44 0.49 13 14 15 SiO.sub.2 61.4 59.5 63.9 B.sub.2O.sub.3 8.2 10.0 10.4 Al.sub.2O.sub.3 16.0 16.7 14.6 MgO 2.8 0.7 2.9 CaO 7.9 8.5 4.8 BaO 3.4 3.8 3.1 ZnO — 0.5 — α.sub.20/300 (10.sup.−6/K) 3.75 3.60 3.21  (g/cm.sup.3) 2.48 2.48 2.41 Tg (° C.) 709 702 701 T 4 (° C.) 1273 1260 1311 T 2 (° C.) 1629 1629 n.m. n.sub.d 1.523 1.522 n.m. HCl (mg/cm.sup.2) 0.41 0.97 n.m. BHF (mg/cm.sup.2) 0.74 0.47 n.m. n.m. = not measured

(16) As the exemplary embodiments illustrate, the glasses have the following advantageous properties: a thermal expansion a 20/300 of between 2.8×10.sup.−6/K and 3.8×10.sup.−6/K, in preferred embodiments 3.6×10.sup.−6/K, in particularly preferred embodiments <3.2×10.sup.−6/K, and thus matched to the expansion behavior of both amorphous silicon and also increasingly polycrystalline silicon. with T.sub.g>700° C., a high glass transition temperature, i.e. a high temperature resistance. This is essential for a lowest possible production-related shrinkage (“compaction”) and for use of the glasses as substrates for coatings of amorphous Si layers and subsequent annealing thereof. with <2.600 g/cm.sup.3, a low density a temperature at a viscosity of 10.sup.4 dPa.Math.s (working point V.sub.A) of not more than 1350° C., and a temperature at a viscosity of 10.sup.2 dPa.Math.s of not more than 1720° C., which is a suitable viscosity characteristic in terms of hot-shaping and meltability. with n.sub.d≤1.526 a low refractive index. a high chemical resistance, as is evident inter alia from good resistance to buffered hydrofluoric acid solution.

(17) The glasses exhibit high thermal shock resistance and good devitrification stability. The glasses can be produced as flat glasses by various drawing methods, e.g. microsheet down-draw, up-draw, or overflow fusion methods, and, in a preferred embodiment, if they are free of As.sub.2O.sub.3 and Sb.sub.2O.sub.3, also by the float process.

(18) With these properties, the glasses are highly suitable for use as substrate glass for producing interposers.

(19) By using the base substrate of low-alkali glass and with a coefficient of thermal expansion very close to that of the chip of silicon material, difficulties resulting from different thermal expansions of the interposer and the CPU chip are largely avoided. If adjacent joint material layers or boards have an only slightly different heating behavior and a slightly different coefficient of thermal expansion, there will be fewer mechanical stresses between these joint layers or boards, and there will be no warpage or cracking between the layers or boards.

(20) Interposers which are occupied more densely with holes as compared to previous interposers, take smaller substrate sizes, thereby still further reducing the amount of different expansions and contractions of the involved layers or boards and thus the risk of warpage and hence cracking between the involved layers or boards.

(21) Finally, cost savings can also be expected because (with reduced interposer size and hole size) less glass material and less conductive material for filling the holes has to be used.