MULTI-LEVEL BIDIRECTIONAL ELECTRICAL AC/DC CONVERTER

Abstract

An electrical converter includes at least three AC terminals, a first and a second DC terminal and at least three converter modules. Each of the at least three converter modules has a first converter stage including a flying capacitor circuit coupled to a first switch node, a second converter stage including a flying capacitor circuit coupled to a second switch node, a first inductor, and a first capacitor. The first and second switch nodes are connected to opposite terminals of the first inductor. One of the at least three AC terminals and the second DC terminal are connected to opposite terminals of the first capacitor. The second DC terminal forms a star-point of the first capacitors. A flying capacitor voltage of the first converter stage is clamped to a first voltage across the first capacitor when the first voltage drops below the flying capacitor voltage.

Claims

1. An electrical converter for converting between an AC signal having at least three phase voltages and a DC signal, the electrical converter comprising: at least three AC terminals; a first and a second DC terminal; a control unit; and at least three converter modules coupled to a respective one of the at least three AC terminals, wherein each of the at least three converter modules comprises: a first converter stage comprising a first switch node, a second converter stage comprising a second switch node, a first inductor, wherein the first and second switch nodes are connected to opposite terminals of the first inductor, and a first capacitor, wherein the respective one of the at least three AC terminals and the second DC terminal are connected to opposite terminals of the first capacitor, such that the second DC terminal forms a star-point of the first capacitors of the at least three converter modules; wherein the first converter stage and the second converter stage each comprise a flying capacitor circuit comprising at least one flying capacitor operably coupled to the respective first and second switch nodes; and wherein the control unit is configured to operate each of the at least three converter modules such that a flying capacitor voltage across the at least one flying capacitor of the first converter stage is clamped to a first voltage across the first capacitor when the first voltage drops below a flying capacitor voltage level of the flying capacitor voltage until the first voltage rises to the flying capacitor voltage level.

2. The electrical converter of claim 1, wherein the control unit is configured to maintain the flying capacitor voltage at the flying capacitor voltage level when the first voltage across the first capacitor is higher than the flying capacitor voltage level.

3. The electrical converter of claim 1, wherein the first converter stage comprises first active switching devices series connected between the respective AC terminal and the second DC terminal, wherein the first switch node is a midpoint node of the series connected first active switching devices, the first active switching devices comprising a switch pair configured to provide a connection between terminals of the at least one flying capacitor and the respective AC terminal and the second DC terminal, wherein the control unit is configured to keep both switches of the switch pair turned on simultaneously when the flying capacitor voltage is clamped to the first voltage so as to actively clamp the flying capacitor voltage to the first voltage.

4. An electrical converter for converting between an AC signal having at least three phase voltages and a DC signal, the electrical converter comprising: at least three AC terminals, a first and a second DC terminal; a control unit; and at least three converter modules coupled to a respective one of the at least three AC terminals, wherein each of the at least three converter modules comprises: a first converter stage comprising a first switch node, a second converter stage comprising a second switch node, a first inductor, wherein the first and second switch nodes are connected to opposite terminals of the first inductor, and a first capacitor, wherein the respective one of the at least three AC terminals and the second DC terminal are connected to opposite terminals of the first capacitor, such that the second DC terminal forms a star-point of the first capacitors of the at least three converter modules; wherein the first converter stage and the second converter stage each comprise a flying capacitor circuit comprising at least one flying capacitor operably coupled to the respective first and second switch nodes; wherein the at least one flying capacitor of the first converter stage is connected to the star-point through an active bidirectional switching device; and wherein the control unit is configured to turn off the active bidirectional switching device when the first voltage drops below a flying capacitor voltage across the at least one flying capacitor of the first converter stage.

5. The electrical converter of claim 1, wherein the control unit is configured to operate each of the at least three converter modules such that a flying capacitor voltage across the at least one flying capacitor of the second converter stage is proportional to a DC voltage across the first and second DC terminals.

6. The electrical converter of claim 1, wherein the control unit comprises at least three control modules coupled to a respective one of the at least three converter modules and configured to operate the at least three converter modules independently.

7. The electrical converter of claim 6, wherein the at least three control modules are configured to determine duty cycles for operating the first and second converter stage of the respective converter module based on a voltage reference of the first capacitor of the respective converter module.

8. The electrical converter of claim 1, wherein the control unit is configured to operate each of the at least three converter modules according to a first mode of operation, wherein a DC voltage across the first and second DC terminals is smaller than or equal to the first voltage of the respective first capacitor, and according to a second mode of operation, wherein the DC voltage is larger than the first voltage.

9. The electrical converter of claim 1, wherein the control unit is configured to operate the flying capacitor circuits of the first and second converter stages mutually exclusively via pulse width modulation.

10. The electrical converter of claim 1, wherein the first converter stage comprises a protection circuit, the protection circuit comprising a balancing capacitor connecting the at least one flying capacitor of the first converter stage to the respective one of the at least three AC terminals and/or to the second DC terminal through at least one first normally-closed switch, the control unit being configured to disable the at least one first normally-closed switch.

11. The electrical converter of claim 1, wherein each of the at least three converter modules comprises a second normally-closed switch connected between the second switch node and the star-point, the control unit being configured to disable the second normally-closed switch.

12. The electrical converter of claim 1, wherein the control unit is configured to operate at least a first converter module of the at least three converter modules, such that the second converter stage of the first converter module is disabled, and the first switch node of the first converter stage of the first converter module is clamped to the star-point when a DC voltage between the first and second DC terminals is zero during a start-up operation.

13. The electrical converter of claim 12, wherein a voltage across the at least one flying capacitor of the first converter stage of the first converter module is intermittently clamped to the first voltage when the DC voltage is zero during a start-up operation.

14. The electrical converter of claim 1, wherein the control unit is configured to operate a first converter module of the at least three converter modules, such that a voltage across the at least one flying capacitor of the second converter stage of the first converter module is clamped to a DC voltage between the first and second DC terminals during a ramp up of the DC voltage.

15. The electrical converter of claim 1, wherein the first converter stage and the second converter stage comprise an equal number of the at least one flying capacitor.

16. The electrical converter of claim 1, wherein the first converter stage and the second converter stage comprise a different number of the at least one flying capacitor.

17. An electric motor drive system, comprising the electrical converter of claim 1, wherein the control unit is configured to operate the electrical converter as a traction inverter.

18. A battery charging system, comprising a power supply, the power supply comprising the electrical converter of claim 1.

19. The electrical converter of claim 4, wherein the control unit is configured to operate each of the at least three converter modules such that a flying capacitor voltage across the at least one flying capacitor of the second converter stage is proportional to a DC voltage across the first and second DC terminals.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Aspects of the present disclosure will now be described in more detail with reference to the appended drawings, wherein same reference numerals illustrate same features.

[0035] FIG. 1 represents an exemplary topology of a three-level flying capacitor AC/DC converter interfacing a three-phase grid and a DC source (e.g. a solar panel) or load (e.g. an electric vehicle battery or a passive load).

[0036] FIG. 2 represents an exemplary topology of one converter module of the AC/DC converter of FIG. 1.

[0037] FIG. 3 represents the voltage waveforms and PWM control signals for operating the converter module of FIG. 2.

[0038] FIG. 4 represents the duty cycles corresponding to the voltage waveforms of FIG. 3.

[0039] FIG. 5 represents an exemplary embodiment of a control unit for operating the converter module of FIG. 2. The control unit implements a cascaded control structure, and possible measurements are indicated.

[0040] FIGS. 6A-D represent simulation results of the resulting closed loop circuit. FIG. 6A shows the duty cycle waveforms. FIGS. 6B and 6C show the voltage waveforms. FIG. 6D shows the current waveforms.

[0041] FIG. 7 represents an exemplary topology of a three-level flying capacitor Y-inverter used for driving an AC motor.

[0042] FIG. 8 represents a cascaded speed control scheme for the three-level flying capacitor Y-inverter of FIG. 7.

[0043] FIG. 9 represents the converter module topology of FIG. 2 comprising a passive protection circuit.

[0044] FIG. 10 represents steps of an exemplary start-up procedure of the converter as described herein, in case of a passive load.

[0045] FIG. 11 represents a DC voltage control scheme that can be used in step 2 of the converter start-up procedure of FIG. 10.

[0046] FIG. 12 represents closed loop circuit simulation waveforms of the converter of FIG. 2 during a start-up procedure according to FIG. 10. The upper graph represents duty cycles; the middle graph represents voltages and the lower graph represents currents.

[0047] FIG. 13 represents a topology of a converter module of a hybrid flying capacitor converter according to aspects of the present disclosure having (2 N−1, 2 M−1) voltage levels.

[0048] FIG. 14 represents AC-side (fA) and DC-side (fB) flying capacitor waveforms for a five-level flying capacitor converter according to aspects of the present disclosure.

[0049] FIG. 15 represents a battery charging system comprising an electrical converter as described herein.

DETAILED DESCRIPTION

[0050] The present disclosure describes a three-phase bidirectional multilevel (ML) flying capacitor (FC) buck-boost AC/DC converter—further denoted as FC Y-rectifier (FC-YR)—which is applicable in any of the above mentioned application fields. The FC-YR combines the advantages of FC converter bridge-legs (i.e. improved system performance compared to two-level bridge-legs) and the Y-inverter (i.e. single-stage energy conversion and reduced passive component number).

[0051] In one embodiment, the FC-YR features FC voltages showing unique, time varying reference values, while the respective power semiconductors are high-frequency switched only in one of the two bridge-legs at a time, making it impossible to rely solely on passive FC voltage balancing. In this case, the circuit structure requires a dedicated modulation and control strategy to assure high performance and safe operation, which are described in detail further below. In addition, or alternatively, to allow a controlled ramp-up of the DC voltage, while maintaining all FC voltages within safe bounds, a dedicated modulation strategy and control structure for the start-up of the system can be included, as described further below. In addition, or alternatively, to assure safety even when the power semiconductors cannot be actively controlled (e.g. in failure mode or during system initialization), a passive balancing circuitry, which imposes safe voltage sharing among the FC stages can be included, as described further below.

[0052] Referring to FIG. 1, the three-phase bidirectional three-level flying capacitor AC/DC converter 10 comprises a main power circuit that interfaces the grid AC voltages u.sub.a, u.sub.b, u.sub.c applied at AC terminals a, b, c, and the DC voltage U.sub.dc across DC terminals P, N, which in operation can be connected to an active or passive DC source or load 9. Converter 10 comprises three identical flying capacitor DC-DC buck-boost converter modules 11, of which one such module is shaded grey. An inductive input filter L.sub.g can be provided at the AC terminals as known in the art.

[0053] Each of the converter modules 11 comprises an AC terminal a, b, or c for connecting to the respective phase of the three-phase AC grid and comprises an AC-side capacitor C.sub.a connecting the AC terminal to the negative DC link terminal n hence forming a common star Y-point amongst the three phases. The potential of each AC terminal a, b, c, is strictly defined with respect to n and is independent of the remaining two phases. As a result, each converter module can be operated autonomously, as an equivalent single-phase converter.

[0054] The voltages between the AC terminals and the negative DC link terminal n, i.e. the voltages across the capacitor C.sub.a, denoted U.sub.an, (and for the two other phases b, c: U.sub.bn, and u.sub.cn) are strictly positive allowing the converter modules to be operated as DC/DC converters. Since the common-mode offset U.sub.CM=1/3 (U.sub.an+U.sub.bn+U.sub.cn) has no corresponding current path, sinusoidal grid currents i.sub.a, i.sub.b, i.sub.c can be regulated. U.sub.CM is only constrained by the requirement of strictly positive terminal voltages and can be used to enable e.g. Discontinuous Pulse Width Modulation (DPWM).

[0055] The three converter modules 11 of the converter 10 are hence operated independently and therefore the topology and operation is explained in detail only for converter module 11 linked to AC terminal a which is represented in FIG. 2. In the following, rectifier operation is described, even though it will be apparent to the skilled person that inverter operation can be obtained in likewise fashion.

[0056] Converter module 11 comprises two stages 12 and 13. Each stage 12, 13 is advantageously formed of a flying capacitor converter circuit with C.sub.fj with j=1, 2, . . . , M−1 flying capacitors and hence achieving M+1 voltage levels (M≥1).

[0057] In the exemplary embodiment of FIG. 2, stage 12 is connected across the AC-side capacitor C.sub.a on one side and comprises a switch node A on the other side, in between which a flying capacitor circuit comprising at least one flying capacitor C.sub.fA is arranged. Active switches T.sub.A1, T.sub.A2, T′.sub.A1, T′.sub.A2 connect the terminals of flying capacitor C.sub.fA between the terminals of C.sub.a (i.e., the AC terminal and the negative DC link n) and the switch node A.

[0058] Stage 13 comprises, on one side a switch node B, and is connected, on the other side, to the DC terminal P and the negative DC link terminal n (which forms DC terminal N). Advantageously, a DC side capacitor C.sub.dc is provided, whose terminals are connected to P and N, respectively. A flying capacitor circuit comprising at least one flying capacitor C.sub.fB is arranged between switch node B and the DC terminals P and N (n). Active switches T.sub.B1, T.sub.B2, T′.sub.B1, T′.sub.B2 connect the terminals of flying capacitor C.sub.fB between switch node B and the DC terminals P, N (advantageously the terminals of C.sub.dc).

[0059] Switch nodes A and B are connected to opposite terminals of a physical inductor L.

[0060] The above topology allows for obtaining buck-boost AC/DC conversion for each of the three phases a, b, c separately. As will be explained in detail below, stage 12 is operated when buck converter operation is required, whereas stage 13 is operated when boost converter operation is required. The buck and boost stages are advantageously operated in a mutually exclusive fashion, meaning that only one of the two stages 12, 13 are pulse width modulated at a point of time, while the other stage has its switch node A, B clamped to the respective AC terminal, e.g. a, and the positive DC terminal P, respectively. By so doing, single-stage high-frequency energy conversion can be obtained, leading to improved performance.

[0061] Referring to FIG. 3, in order to achieve single-stage high-frequency energy conversion, the converter module 11 is working depending on the instantaneous modulation depth m(t)=u.sub.an(t)/U.sub.dc (i.e. the input-output voltage ratio) in one of the two possible operation modes: boost operation, and buck operation.

[0062] Boost operation mode (of converter module 11 linked to AC terminal a) is selected when the respective phase input voltage U.sub.an is lower than U.sub.dc. The upper switches T.sub.A1 and T.sub.A2 of the buck bridge are permanently turned on and hence the switch node A of stage 12 is clamped to the AC terminal voltage. The boost stage 13 is controlled through pulse width modulation (PWM) such that the voltage of switch node B has a local average value (i.e. averaged over one pulse period) equal to the AC terminal voltage. In this mode of operation, a second order input filter is advantageously formed by the phase inductor L and the AC-side capacitor C.sub.a.

[0063] Buck operation mode is selected when u.sub.an exceeds U.sub.dc. The upper switches T.sub.B1 and T.sub.B2 of the boost bridge are permanently turned on and the switch node B of the boost stage 13 is clamped to the positive DC link rail (terminal P). Stage 12 is now PWM operated in order to step down the AC terminal voltage, such that the voltage of switch node A has a local average value equal to the DC voltage U.sub.dc. In this operation mode, solely the AC-side capacitor C.sub.a is acting as an input filter and the inductor current i.sub.La shows an elevated fundamental (local average) current (i.sub.La)≥i.sub.a.

[0064] The active switches T.sub.A1, T.sub.A2, T′.sub.A1, T′.sub.A2 of the buck stage 12 and T.sub.B1, T.sub.B2, T′.sub.B1, T′.sub.B2 of the boost stage 13 are advantageously semiconductor switching devices, e.g. Field Effect Transistors (FETs), in particular MOSFET devices.

[0065] Accordingly, the stages 12, 13 of converter module 11 are operated with time varying duty cycles d.sub.A of the buck stage 12 and d.sub.B of the boost stage 13 which can be defined by:

[00001]$d_A\left(t\right)=\min \left(1,\frac{1}{m\left(t\right)}\right)$$d_B\left(t\right)=\min \left(1,m\left(t\right)\right).$

The duty cycles are graphically represented in FIG. 4. These duty cycles ensure the mutually exclusive high-frequency operation of buck and boost stages 12, 13 respectively. Also, as can be seen from FIG. 4, both duty cycles d.sub.A and d.sub.B are advantageously continuous, allowing a simple control structure, avoiding transient oscillations during the changeover of the modulation regions.

[0066] The duty cycles d.sub.A and d.sub.B are fed into both half-bridges of stage 12 and 13 respectively. During PWM operation of either stage 12 and 13, the active switches arranged at opposite positions in the bridge are operated in inverse synchronized mode, e.g. when T.sub.A1 is turned on, T′.sub.A1 is turned off and vice versa. Same holds for the switch pairs T.sub.A2and T′.sub.A2, T.sub.B1 and T′.sub.B1, T.sub.B2 and T′.sub.B2. The PWM control signals for the active switches can be generated in a known manner using, for the case of two switch pairs for each half-bridge, 180° phase shifted PWM carriers for the outer (i.e. T.sub.A1 and T′.sub.A1 in stage 12) and inner (i.e. T.sub.A2 and T′.sub.A2 in stage 12) half-bridges of each stage (FIG. 3). More generally, if the stage comprises M−1 flying capacitors C.sub.fj with j=1, 2, . . . , M−1, the PWM control signals for driving two consecutive switch pairs can be phase shifted by 360°/M. By doing so, the inductor current L.sub.a equally charges and discharges the flying capacitors during one switching period and natural balancing of the flying capacitor voltages can be obtained. As a result, M+1 different voltage levels can be obtained at the switch node.

[0067] Present inventors have however observed that the natural balancing only holds if the respective stage is high-frequency operated. If the converter module 11 is running e.g. in buck operation (i.e. m>1), the switch node B of stage 13 is clamped to the positive DC link rail (DC terminal P) and C.sub.fB is bypassed and hence remains at constant voltage. Given the ideally constant FC voltage U.sub.fB=U.sub.dc/2 (cf. FIG. 3), the operation of the boost stage 13 is found to be unproblematic and greatly resembles a multilevel flying capacitor voltage source rectifier.

[0068] In contrast, maintaining the stage 12 FC voltage at U.sub.fA=U.sub.an/2 is only possible during buck operation, and the key time instances for the voltage regulation of C.sub.fAare highlighted in FIG. 3. When starting boost operation at position {circle around (1)}, C.sub.fA is bypassed and its voltage remains constant at U.sub.fA=U.sub.dc/2. More critical, at position {circle around (2)}, the antiparallel diode of T′.sub.A1 starts conducting once the input voltage U.sub.an falls below U.sub.fA, paralleling C.sub.a and C.sub.fA. Accordingly, C.sub.fA is fully discharging until position @. There, the voltage u.sub.an starts to rise again and T′.sub.A1 builds up voltage, while C.sub.fA would remain fully discharged if no further measures would be taken, resulting in a massive blocking voltage imbalance between the half-bridges of stage 12, when starting buck operation in the subsequent AC period.

[0069] According to an aspect of the present disclosure, hence a modulation scheme for the converter module 11 (and stage 12 in particular) comprises the simultaneous turn-on of T.sub.A1 and T′.sub.A1 when U.sub.fA<U.sub.dc/2, allowing C.sub.fA to be actively clamped to C.sub.a when U.sub.an starts rising again at position {circle around (3)} and is only released once the desired FC voltage level is reached at position {circle around (4)}. By so doing, equal voltage sharing of the switches of stage 12 can be obtained when entering again buck operation in the subsequent AC period.

[0070] In a practical realization, a hysteresis block for the clamping logic is advantageously used to assure that the antiparallel diode of T′.sub.A1 is already conducting at the turn-on instance of T′.sub.A1, hence assuring zero-voltage switching and avoiding transient oscillations when paralleling C.sub.a and C.sub.fA.

[0071] Referring to FIG. 5, the converter 10 comprises a control unit 15 to implement the above modulation strategy. The control unit can comprise individual control modules for operating the different converter modules 11 autonomously. One such control module 16 for operating one converter module 11, e.g. the converter module linked to AC terminal a, is shown schematically in FIG. 5.

[0072] The control unit 15 is advantageously configured to perform power factor correction (PFC) rectifier control with a cascaded control structure as known in the art. Measurement means are advantageously provided for measuring the AC grid voltages u.sub.a, u.sub.b, u.sub.c and grid currents i.sub.a, i.sub.b, i.sub.c, and the inductor current i.sub.La. On the DC side, measurement means are advantageously provided for measuring the DC terminal voltage U.sub.dc and advantageously the DC terminal current I.sub.dc. These measurements are advantageously input to control unit 15.

[0073] Sinusoidal grid current references i.sub.a.sup.*, i.sub.b.sup.*, i.sub.c.sup.* are derived based on the DC voltage error and the measured AC voltages u.sub.a, u.sub.b, u.sub.c. Then, the AC terminal voltage references u.sub.an.sup.*, u.sub.bn.sup.*, u.sub.cn.sup.* are set in order to enforce the required grid currents. These AC terminal voltage references are fed to the respective control modules 16 for operating each converter module individually.

[0074] The control module 16 comprises an AC voltage control block 161, an inductor current control block 162, and a modulator 163. The output signal of the inductor current control block 162 is fed into the modulator 163, generating duty cycles for the mutually exclusive operation of buck stage 12 and boost stage 13.

[0075] The control signals for the active switches T.sub.A1, T.sub.A2, etc. are then generated using PWM blocks 164 and 165. The clamping logic for the buck stage 12 as described in the present disclosure is advantageously implemented in PWM control block 164.

[0076] To enforce the desired time-varying voltage waveform of C.sub.fA (cf. FIG. 3), an additional flying capacitor voltage control block 166 is advantageously added to regulate the voltage U.sub.fA across the flying capacitors of stage 12. This can be done in a known manner by slightly changing the duration of the redundant flying capacitor charging and discharging intervals by means of a correction duty cycle d.sub.cor which is imposed on the duty cycle d.sub.A of stage 12, as further described in [8]. By so doing, a possible insufficient natural FC voltage balancing performance of the stage 12, which may be dependent on how good the capacitor C.sub.a resembles a voltage source, e.g. arising due to dynamic capacitance limitations for C.sub.a, is obviated.

[0077] The resulting closed loop circuit simulation duty cycle, current and voltage waveforms are shown in FIG. 6A-C, for û.sub.ac=325 V, U.sub.dc=400 V and output power P=9 kW. As can be observed, sinusoidal grid currents can be achieved, verifying the selected control structure displayed in FIG. 5, where the transition from buck to boost operation (and vice versa) is completely seamless. The FC voltages follow closely the desired voltage profile shown in FIG. 3 despite a substantial high-frequency voltage variation.

[0078] Referring now to FIG. 7, as the converter modules, and in particular stages 12 and 13 allow for bidirectional power flow, a same converter structure as converter 10 can also be employed as an inverter 20, e.g. where a three-phase AC motor 29 is powered from a DC source. As with rectifier applications described hereinabove, the inverter 20 is formed as a three-level flying capacitor Y-inverter with autonomously operating converter modules 21 (one such converter module being shaded grey).

[0079] A closed-loop control structure for the inverter 20, in particular for operation as a variable speed drive is outlined in FIG. 8. Speed control based on the angular speed reference ω* and measured value w is performed in a dq frame (the rotor angle E is used for the coordinate transformation), yielding the differential mode converter terminal voltage references u.sub.a.sup.*, u.sub.b.sup.*, u.sub.c.sup.*. Adding the desired common mode voltage reference, the terminal voltage references with respect to the negative DC link terminal u.sub.an.sup.*, u.sub.bn.sup.*, u.sub.cn.sup.* result and the subsequent phase module control structure is identical to the control strategy of a Y-rectifier as shown in FIG. 5.

[0080] In certain operating conditions (e.g. failure mode or during system initialization), the switching devices of stages 12 and 13 are (or need to be) disabled and cannot be actively controlled. Still, the grid line-to-line voltage is impressed on the AC terminals. Since the antiparallel diodes of the stage 12 semiconductor switching devices prevent negative voltages U.sub.an and U.sub.fA, a minimum constant offset u.sub.CM=û.sub.ac is established. In this case, flying capacitor clamping according to the modulation strategy as described herein in relation to FIG. 3 is not possible. To obviate such inconvenience, a passive protection circuit is advantageously provided. The passive protection circuit is configured to impose a safe voltage sharing among the semiconductor switches of stage 12. In one possible embodiment of the passive protection circuit, a balancing resistor is used for voltage balancing the flying capacitors. However, this approach would result in substantial losses.

[0081] Referring to FIG. 9, an advantageous embodiment of a passive protection circuit 17 according to an aspect of the present disclosure is to connect balancing capacitors C.sub.p with normal-closed (normal-on) switches T.sub.p in parallel with the semiconductor switches T.sub.A1 and T.sub.A1. In other words, the normal-closed (depletion mode) semiconductor switches T.sub.p series connect the balancing capacitors C.sub.p with the flying capacitor C.sub.fA and assure equal voltage sharing among the stage 12 semiconductors, while the stage B is clamped to the negative DC link rail to avoid an uncontrolled charging of the DC link. The capacitance value of C.sub.p is advantageously selected such that equal AC voltage sharing results among the stage 12 semiconductor switches, while the antiparallel diodes also establish equal DC bias voltage sharing.

[0082] In addition, or alternatively, a normal-closed semiconductor switch T.sub.p is advantageously provided connecting the switch node B of stage 13 to the negative DC link rail in order to prevent an uncontrolled rise of U.sub.dc, while pre-charging resistors R.sub.pr with bypass switch limit inrush currents when connecting the input filter of the converter to the three-phase grid.

[0083] In normal operation, the pre-charging resistors are bypassed with switches T.sub.pr, and the normal-closed semiconductor switches T.sub.p are disabled. The clamping modulation as described herein then allows to ensure that all FC voltages remain within safe boundaries. The output capacitance of the normal-closed semiconductor switches is in parallel with T.sub.A1 and T′.sub.A1, hence increasing the switching losses of stage 12. However, normal-closed semiconductor devices with high on-state resistance (and hence low parasitic capacitance) can be selected due to the low current stresses in passive balancing operation.

[0084] The passive protection circuitry shown in FIG. 9 advantageously protects the semiconductors from critical overvoltages, limits input filter inrush currents and avoids an uncontrolled pre-charging of the DC output voltage during system initialization when connecting to the three-phase grid.

[0085] As soon as the controller is initialized, the normal-closed semiconductor switches T.sub.p of the protection circuit are disabled. However, in case of a passive load (with initially zero DC link voltage) PFC rectifier operation with sinusoidal grid currents is not possible for U.sub.dc s U.sub.dc,min.

[0086] According to an advantageous aspect of the present disclosure, a dedicated start-up procedure is provided in order to avoid excessive semiconductor voltage stresses while ramping up the DC link voltage in a controlled manner.

[0087] The start-up procedure advantageously comprises four steps, which will be described in relation to FIG. 10. A first step relates to converter operation when the DC link voltage U.sub.dc=0 V. T′.sub.A and T′.sub.A2 are permanently turned on and T.sub.A2 is permanently disabled to clamp the switch node A of stage 12 to the negative DC link rail and therefore prevent DC link charging currents. Additionally, an active clamping strategy is advantageously used to limit the maximum stage 12 semiconductor blocking voltage. As the power semiconductors are not yet PWM operated, C.sub.fA is clamped to the input capacitor (i.e. T.sub.A1, and T′.sub.A1 on) if a certain condition on the AC side capacitor voltage U.sub.an with respect to the negative DC link rail is met, in particular if

[00002]$u_{\mathrm{an}}<\frac{1}{2}{u}_{\mathrm{an},\max }={\hat{u}}_{\mathrm{ac}},$

to achieve an equal maximum semiconductor blocking voltage sharing for stage 12. The stage 13 semiconductor switches remain permanently disabled in this initial state.

[0088] Still referring to FIG. 10, a second step relates to converter operation when the DC link voltage increases up to a predetermined threshold value U.sub.dc,min, where advantageously the DC link voltage reference U.sub.dc>U.sub.dc,min. As soon as U.sub.dc increases beyond 0 V, C.sub.fB is clamped to the DC link capacitor C.sub.dc by turning T.sub.B1, and T′.sub.B1 permanently on, while the inner half-bridge of stage 13 (T.sub.B2 and T′.sub.B2) remains disabled. In this case, the antiparallel diodes of T.sub.B2 and T′.sub.B2 can represent a diode rectifier. By applying PWM pulses to the inductor terminal connected to the switch node A of stage 12 (i.e. stepping down the AC side capacitor voltage U.sub.an which is impressed by the grid line-to-line voltages), the DC link voltage can be ramped up. This is advantageously performed in discontinuous conduction mode. An exemplary embodiment of a corresponding control scheme for step 2 is represented in FIG. 11.

[0089] Since the clamping modulation of the flying capacitor C.sub.fA of stage 12 as described herein requires a minimum load current, the modified clamping modulation strategy from step 1 is maintained in step 2. Accordingly, only T.sub.A2 and T′.sub.A2 are PWM operated if u.sub.an<1/2U.sub.an,max=U.sub.dc. Then, if u.sub.an>1/2U.sub.an,max, stage 12 is operated as a quasi two-level bridge-leg, where T.sub.A1 and T.sub.A2 receive identical PWM signals and the FC voltage U.sub.fA remains constant.

[0090] As soon as U.sub.dc ? U.sub.dc,min (step 3), standard PFC operation with sinusoidal grid current control according to FIG. 5 is possible, while the DC link voltage is further ramped up towards its nominal value. Steady-state operation is achieved in step 4 when U.sub.dc attains the nominal value of U.sub.dc.sup.*.

[0091] The resulting converter waveforms from a closed loop circuit simulation are presented in FIG. 12, where the DC link voltage U.sub.dc is linearly ramped up to 400 Vm, while the semiconductor blocking voltage stresses remain balanced, hence confirming the presented start-up strategy for the converters according to the present disclosure.

[0092] In contrast, for e.g. a FC Y-Inverter variable speed drive as described in relation to FIG. 7 no special start-up strategy is required due to the attached DC voltage source and the terminal voltages can be gradually ramped up with increasing motor speed using the control structure depicted in FIG. 8.

[0093] In this disclosure, the modulation strategy, control structure, passive protection circuitry, as well as the start-up control scheme are discussed in detail for the three-level Y-rectifier. However, the findings are of generic nature and can also be applied to higher level number FC Y-rectifiers, or also to inverter applications. In particular, it will be convenient to note that the concepts described in the present disclosure are not limited to a three-level flying capacitor converter, but can be applied for any number of voltage levels. FIG. 13 shows the circuit structure of a converter module having a (N+1, M+1)-level FC converter with stage 12 flying capacitors C.sub.Aj, j=1 to N−1 and stage 13 flying capacitors C.sub.fBi, I=1 to M−1, in which N and M need not be identical, i.e. a hybrid converter with different voltage levels for stage 12 and 13 is possible.

[0094] Referring to FIG. 14, the flying capacitor clamping modulation strategy as described hereinabove in relation to a three-level flying capacitor circuit (comprising one flying capacitor C.sub.fA), can be readily applied to flying capacitor circuits with more than three voltage levels. The clamping modulation is shown in FIG. 14 in relation to a five-level flying capacitor circuit. The AC side flying capacitor voltage waveforms are shown for buck and boost operation. Once buck operation ends and the converter passes to boost mode (i.e. at position {circle around (1)} where u.sub.an<U.sub.dc), all AC side FCs are bypassed and the respective FC voltages remain constant. Each FC is clamped to AC side capacitor C.sub.a once u.sub.an drops below the respective FC voltage value, which is different for each FC. Time instances (2.1), (2.2), (2.3) indicate the start and (4.1), (4.2), (4.3) indicating the respective end of the clamping periods of the respective FC.

[0095] In an alternative embodiment to the above topology and control strategy, the topology of FIG. 2 can be changed by replacing switch T′.sub.A1 with a bidirectional switch. Referring again to FIG. 3, the bidirectional switch can be turned off between time positions {circle around (2)} and {circle around (4)}, hence preventing discharge of C.sub.fA. This allows U.sub.fA to remain constant in boost operation. This embodiment, however, would increase the component count and possibly lead to increased conduction losses compared to the previous case.

[0096] Referring to FIG. 15, a battery charging system 700 comprises a power supply unit 704. The power supply unit 704 is coupled on one side to the AC grid through terminals a, b, c and on the other side (at terminals P′, N′) to an interface 702, e.g. comprising a switch device, which allows to connect the power supply unit 704 to a battery 703. The power supply unit 704 comprises any one of the electrical converters, e.g. converter 10, as described hereinabove and can comprise a further converter stage 701, which in the present system is a DC-DC converter. The power supply unit 704, e.g. the converter stage 701, can comprise a pair of coils which are inductively coupled through air (not shown), such as in the case of wireless power transfer. Alternatively, the DC-DC converter stage 701 can comprise or consist of one or more possibly isolated DC-DC converters. In some cases, the interface 702 can comprise a plug and socket, e.g. in wired power transfer. Alternatively, the plug and socket can be provided at the input (e.g., at nodes a, b, c).

[0097] Aspects as described herein are set out in the following numbered clauses.

[0098] 1. Electrical converter (10, 20) for converting between an AC signal having at least three phase voltages and a DC signal, comprising: [0099] at least three AC terminals (a, b, c), a first and a second DC terminal (P, N), [0100] a control unit (15), [0101] at least three converter modules (11) coupled to a respective one of the at least three AC terminals, wherein each of the at least three converter modules comprises: [0102] a first converter stage (12) comprising a first switch node (A), [0103] a second converter stage (13) comprising a second switch node (B), [0104] a first inductor (L), wherein the first and second switch nodes are connected to opposite terminals of the first inductor, [0105] a first capacitor (C.sub.a), wherein the respective one of the at least three AC terminals and the second DC terminal are connected to opposite terminals of the first capacitor, such that the second DC terminal forms a star-point (n) of the first capacitors (C.sub.a) of the at least three converter modules, [0106] characterized in that the first converter stage (12) and the second converter stage (13) each comprise a flying capacitor circuit comprising at least one flying capacitor (C.sub.fA, C.sub.fB) operably coupled to the respective first and second switch nodes (A, B).

[0107] 2. Electrical converter of clause 1, wherein the control unit (15) is configured to operate each of the converter modules (11) such that a flying capacitor voltage (u.sub.fA) across the at least one flying capacitor of the first converter stage is clamped to a first voltage (u.sub.an) across the first capacitor when the first voltage (u.sub.an) drops below the flying capacitor voltage (u.sub.fA).

[0108] 3. Electrical converter of clause 1, wherein the at least one flying capacitor (C.sub.fA) of the first converter stage (12) is connected to the star-point (n) through an active bidirectional switching device.

[0109] 4. Electrical converter of clause 3, wherein the control unit (15) is configured to turn off the active bidirectional switching device when the first voltage (u.sub.an) drops below a flying capacitor voltage (u.sub.fA) across the at least one flying capacitor (C.sub.fA) of the first converter stage.

[0110] 5. Electrical converter of any one of the preceding clauses, wherein the control unit is configured to operate each of the converter modules such that a flying capacitor voltage (u.sub.fB) across the at least one flying capacitor (C.sub.fB) of the second converter stage is proportional to a DC voltage (U.sub.dc) across the first and second DC terminals.

[0111] 6. Electrical converter of any one of the preceding clauses, wherein the control unit comprises at least three control modules (16) coupled to a respective one of the at least three converter modules (11) and configured to operate the at least three converter modules independently.

[0112] 7. Electrical converter of clause 6, wherein the at least three control modules (16) are configured to determine duty cycles (d.sub.A, d.sub.B) for operating the first and second converter stage of the respective converter module based on a voltage reference of the first capacitor (C.sub.a) of the respective converter module.

[0113] 8. Electrical converter of any one of the preceding clauses, wherein the control unit is configured to operate each of the at least three converter modules (11) according to a first mode of operation, wherein a DC voltage (U.sub.dc) across the first and second DC terminals is smaller than or equal to the first voltage (u.sub.an) of the respective first capacitor (C.sub.a), and according to a second mode of operation, wherein the DC voltage (U.sub.dc) is larger than the first voltage (u.sub.an).

[0114] 9. Electrical converter of any one of the preceding clauses, wherein the control unit is configured to operate the flying capacitor circuits of the first and second converter stages mutually exclusively via pulse width modulation.

[0115] 10. Electrical converter of any one of the preceding clauses, wherein the first converter stage comprises a protection circuit (17), the protection circuit comprising a balancing capacitor (C.sub.p) connecting the at least one flying capacitor (C.sub.fA) of the first converter stage (12) to the respective one of the at least three AC terminals and/or to the second DC terminal through at least one first normally-closed switch (T.sub.p), the control unit (15) being configured to disable the at least one first normally-closed switch.

[0116] 11. Electrical converter of any one of the preceding clauses, wherein each of the at least three converter modules comprises a second normally-closed switch (T.sub.p) connected between the second switch node (B) and the star-point (n), the control unit (15) being configured to disable the second normally-closed switch.

[0117] 12. Electrical converter of any one of the preceding clauses, wherein the control unit (15) is configured to operate a converter module (11) of the at least three converter modules, such that the second converter stage (13) is disabled, and the first switch node (A) is clamped to the star-point (n) when a DC voltage (U.sub.dc) between the first and second DC terminals is zero during a start-up operation.

[0118] 13. Electrical converter of clause 12, wherein a voltage (u.sub.fA) across the at least one flying capacitor (C.sub.fA) of the first converter stage is intermittently clamped to the first voltage (u.sub.an) when the DC voltage (U.sub.dc) is zero during a start-up operation.

[0119] 14. Electrical converter of any one of the preceding clauses, wherein the control unit is configured to operate a converter module of the at least three converter modules, such that a voltage (u.sub.fB) across the at least one flying capacitor (C.sub.fB) of the second converter stage (13) is clamped to a DC voltage (U.sub.dc) between the first and second DC terminals during a ramp up of the DC voltage.

[0120] 15. Electrical converter of any one of the preceding clauses, wherein the first converter stage and the second converter stage comprise an equal number of the at least one flying capacitor (C.sub.fA, C.sub.fB).

[0121] 16. Electrical converter of any one of the clauses 1 to 14, wherein the first converter stage and the second converter stage comprise a different number of the at least one flying capacitor (C.sub.fA, C.sub.fB).

[0122] 17. Electric motor drive system, comprising the electrical converter (20) of any one of the preceding clauses, wherein the control unit is configured to operate the electrical converter as a traction inverter.

[0123] 18. Battery charging system, in particular for charging electric vehicle drive batteries, wherein the battery charging system comprises a power supply, the power supply comprising the electrical converter (10) of any one of the clauses 1 to 16.