Negative-resistance circuit and active filter for millimetre wave frequencies

11336263 · 2022-05-17

Assignee

Inventors

Cpc classification

International classification

Abstract

The invention relates to a tunable, silicon-based negative-resistance circuit (10, 30) and to an active filter (50) for E-band frequencies (60 to 90 GHz). A base of a transistor (11) is connected to an on-chip inductive transmission line (13) which has a length of approximately a quarter-wavelength at a frequency of 83.5 GHz. The transmission line connects a DC voltage source (14) to the base terminal of the transistor (11) in order to bias the base. Another DC voltage source (15) is connected to the collector of the transistor (11) to bias the transistor. A capacitor (16) operatively bypasses or decouples the voltage source (15) in order to shunt high frequencies or alternating current (AC) signals to ground. The emitter terminal of the transistor (11) is connected to ground through a resistor (18) to limit the collector current (l.sub.e). The circuit gives rise to improved quality factor of resonators.

Claims

1. An active filter which includes: a plurality of negative-resistance circuits; and a plurality of coupled resonators, wherein each negative-resistance circuit has an output terminal which is operatively connected in series to a one coupled resonator to form a silicon based microstrip bandpass filter configured for use in the millimetre wave frequency band ranging between 30 GHz and 300 GHz, and wherein each negative-resistance circuit includes: only one transistor having three terminals; an inductive element in the form a distributed constant transmission line which is connected to a first terminal of the transistor, the inductive element operatively serving as a Radio Frequency (RF) choke to connect a first power source to the first terminal of the transistor in order to bias the first terminal while suppressing Radio Frequency (RF); a first capacitive element which operatively bypasses a second power source, connected to a second terminal of the transistor, in order to shunt high frequencies; a second capacitive element which capacitively couples the output terminal to the first terminal of the transistor; and a capacitive feedback circuit which is configured to feed a signal from a third terminal of the transistor back to the first terminal.

2. The active filter as claimed in claim 1, wherein the resonators are quarter-wave transmission line resonators.

3. The active filter as claimed in claim 1, wherein the third terminal of the transistor is connected to a ground potential through a resistive element.

4. The active filter as claimed in claim 3, wherein the capacitive feedback circuit includes a third capacitive dement which connects the third terminal to the first terminal.

5. The active filter as claimed in claim 4, which includes a fourth capacitive element, one end of which is connected to the third terminal of the transistor and to the third capacitive element, the other end of which is connected to the ground potential and wherein the fourth capacitive element is in parallel connection with the resistive element.

6. An active filter as claimed in claim 5, in which any one of the second, third or fourth capacitive elements is a variable capacitive element.

7. The active filter as claimed in claim 6, wherein the variable capacitive dement includes a varactor.

8. The active filter as claimed in claim 1, wherein the transistor is a heterojunction bipolar transistor, the first terminal corresponding to the base, the second terminal corresponding to the collector and the third terminal corresponding to the emitter of the transistor.

9. The active filter as claimed in claim 1, wherein the silicon-based microstrip bandpass filter is configured for use in E-band frequencies ranging between 60 GHz and 90 GHz.

10. An on-wafer negative-resistance circuit configured for millimetre wave frequencies ranging between 30 GHz and 300 GHz having an output terminal which is operatively connected or connectable to a transmission line, the negative-resistance circuit including: only one transistor having three terminals; an inductive element in the form of a distributed constant transmission line which is connected to a first terminal of the transistor, the inductive element operatively serving as a Radio Frequency (RF) choke to connect a first power source to the first terminal of the transistor in order to bias the first terminal while suppressing Radio Frequency (RF); a first capacitive element which operatively bypasses a second power source, connected to a second terminal of the transistor, in order to shunt high frequencies; a second capacitive element which capacitively couples the output terminal to the first terminal of the transistor; and a capacitive feedback circuit which is configured to feed a signal from a third terminal of the transistor hack to the first terminal.

11. A semiconductor device which includes: a complementary metal-oxide semiconductor (CMOS) die; and the negative-resistance circuit as claimed in claim 10 on the die.

12. A semiconductor device which includes: a complementary metal-oxide semiconductor (CMOS) die; and the active filter as claimed in claim 9 on the die.

Description

BRIEF DESCRIPTION OF DRAWINGS

(1) The invention will now be further described, by way of example and simulated circuitry, with reference to the accompanying diagrammatic drawings.

(2) In the drawings:

(3) FIG. 1 shows a schematic circuit diagram of a first embodiment of a negative-resistance circuit in accordance with the invention;

(4) FIG. 2 shows a schematic circuit diagram of a second embodiment of the negative-resistance circuit;

(5) FIG. 3 shows a plot of the simulated real and imaginary input impedances of the negative-resistance circuit of FIG. 1 plotted against frequency;

(6) FIG. 4 shows a plot of the simulated real and imaginary input impedances of the negative-resistance circuit of FIG. 2 plotted against frequency;

(7) FIG. 5 illustrates a plan view of a silicon wafer layout of the negative-resistance circuit of FIG. 1;

(8) FIG. 6 illustrates a plan view of a silicon wafer layout of the negative-resistance circuit of FIG. 2;

(9) FIG. 7 illustrates a plot of the measured de-embedded real and imaginary input impedances of the negative-resistance circuit of FIG. 1 plotted against frequency;

(10) FIG. 8 illustrates a plot of negative-resistance values against frequency for different varactor voltages (V2) of the negative-resistance circuit of FIG. 2;

(11) FIG. 9 illustrates a plot of reactance values against frequency for different varactor voltages (V2) of the negative-resistance circuit of FIG. 2;

(12) FIG. 10 illustrates a plan view of a silicon wafer layout of an active Q-enhanced resonator circuit incorporating the negative-resistance circuit of FIG. 1;

(13) FIG. 11 is a photograph of a measurement setup used to obtain measurements of the manufactured die of FIG. 10 amongst others;

(14) FIG. 12 shows an on-wafer measurement micrograph of the active Q-enhanced resonator of FIG. 10;

(15) FIG. 13 shows measured frequency responses of the active resonator circuit of FIG. 10;

(16) FIG. 14 illustrates a plot of collector current (I.sub.c) versus quality factor (Q.sub.0) for the active resonator circuit of FIG. 10; and

(17) FIG. 15 shows a schematic circuit representation of an active Q-enhanced coupled resonator filter in accordance with another aspect of the invention.

DETAILED DESCRIPTION OF AN EXAMPLE EMBODIMENT

(18) The following description of the invention is provided as an enabling teaching of the invention. Those skilled in the relevant art will recognise that many changes can be made to the embodiments described, while still attaining the beneficial results of the present invention. It will also be apparent that some of the desired benefits of the present invention can be attained by selecting some of the features of the present invention without utilising other features. Accordingly, those skilled in the art will recognise that modifications and adaptations to the present invention are possible and can even be desirable in certain circumstances, and are a part of the present invention. Thus, the following description is provided as illustrative of the principles of the present invention and not a limitation thereof.

(19) In the context of this specification, the phrase “high frequency” or “high frequencies” refer to frequencies in the microwave and millimetre wave spectrum. A distributed constant line should be understood to refer to a transmission line used for guiding high frequency signals such as microwave or millimetre wave signals in microwave or millimetre wave circuits.

(20) In FIG. 1 reference numeral 10 refers generally to a first embodiment of a negative-resistance circuit in accordance with the invention. Although a Field-Effect Transistor (FET) may also be used to form a negative-resistance circuit, a Heterojunction Bipolar Transistor (HBT) 11 has been used in the circuit 10 illustrated in FIG. 1. The circuit 10 includes an output terminal 12 which is operatively connected to a transmission line resonator 42. As is conventional, the transistor 11 has three terminals, namely a base (designated by reference sign B), a collector (C) and an emitter (E). The base (B) of the transistor 11 is connected to an inductive element which takes the form of an on-chip inductive transmission line 13 which has a length of approximately a quarter-wavelength at a frequency of 83.5 GHz. The transmission line 13 connects a DC voltage power source 14 to the base terminal of the transistor 11 in order to bias the base (B). The inductive transmission line 13 permits DC bias of the base (B) but is configured to decouple radio frequency signals or high frequencies from the DC voltage source 14. Another power source in the form of another DC voltage source 15 is connected to the collector terminal (C) of the transistor 11 to bias the transistor. A capacitive element in the form of a Metal-Insulator-Metal (MIM) capacitor 16 operatively bypasses or decouples the voltage source 15 in order to shunt high frequencies or alternating current (AC) signals to ground. In doing so, the capacitor 16 connects the collector (C) to a ground potential. The RF choke indicated in the circuit 10 is used to represent cables that connect the voltage source to the circuit which are inductive in nature. The emitter terminal of the transistor 11 is connected to ground through a resistive element or resistor 18 to limit the amount of collector current (I.sub.c) which follows through the transistor 11.

(21) The negative-resistance circuit 10 further includes a capacitive feedback circuit which is configured to feed a signal from the emitter terminal (E) of the transistor 11 back to the base (B). The capacitive feedback circuit includes a MIM capacitor 17 connected between the emitter (E) and base (B). The circuit 10 includes another MIM capacitor 19 which is connected in parallel with the resistor 18. One end of the capacitor 19 is connected to the capacitor 17 of the feedback circuit, which is connected to the emitter, and the other end is connected to ground. Furthermore, the base (B) is connected to the output terminal 12 via a MIM capacitor 20 which is used to decouple DC from the transmission line resonator 42. Passive lumped element component values and dimensions for the circuit 10 are shown in the Table 1 below.

(22) TABLE-US-00001 TABLE 1 Lumped element component attributes for negative- resistance circuit shown in FIG. 1 Component Type Value Width Length C.sub.1 MIM capacitor 17 fF 4 μm 4 μm C.sub.2 MIM capacitor 17 fF 4 μm 4 μm C.sub.3 MIM capacitor 200 fF 19.63 μm 10 μm C.sub.4 MIM capacitor 463.3 fF 21.4 μm 21.4 μm R.sub.1 KQ BEOL resistor 495.34 Ω 5.92 μm 50 μm

(23) The transmission line 13 is used as a RF choke to decouple the base bias voltage from the AC signal path and has a length of 500 μm, a width of 4 μm, and an inductance of 540 pH. Transistor 11 has an emitter length of 2.5 μm and an emitter width of 0.12 μm. The collector current (I.sub.c) is varied by varying the voltage of voltage source 14 which in turn varies the amount of negative-resistance generated. The simulated real and imaginary input impedances (Zin) of the circuit 10 are shown in FIG. 3 for a V1 of 3.5 V and V2 of 1.31 V which results in an I.sub.c of 939.5 μA.

(24) A second embodiment of a negative-resistance circuit is designated by numeral 30 in FIG. 2. The same reference numerals used above have been used again to refer to similar features of the circuit 30. The circuit 30 is almost identical to the circuit 10 in FIG. 1 but with MIM capacitor 19 replaced with a hyperabrupt junction (HA) varactor 31 with a length of 3.59 μm and a width of 0.8 μm. With reference to FIG. 2, voltage source 33 (V2) is used to bias the varactor 31 and the inductive connector cables are represented by the RF choke. Another shunt capacitor 32 is used to provide a low impedance AC signal path to ground. This capacitor 32 is identical to capacitor 16 in terms of dimensions. The simulated real and imaginary input impedances (Zin) of the circuit 30 are shown in FIG. 4 for an I.sub.c of 2.422 mA and V2 of 1.5 V.

(25) On-wafer negative-resistance circuits 10, 30 shown in FIGS. 5 and 6 were developed and characterized in isolation using one-port on-wafer measurements which were de-embedded using an on-wafer open standard. The de-embedded input impedance (Zin) of the negative resistance circuit 10 which is only tunable in resistance is shown in FIG. 7 biased with a collector current of 3 mA. It can be seen that the circuit 10 offers constant negative-resistance over the E-band channels of interest. Plots of measured real and imaginary input impedance values for the negative-resistance circuit 30 are illustrated in FIGS. 8 and 9 for different varactor voltage 33 values. The transistor 11 was biased with a collector current of 3 mA. This fully-tunable negative-resistance circuit 30 enables tunable active Q-enhanced resonators.

(26) During development of the circuitry, it was shown by simulation that a theoretical negative-resistance offers sufficient loss compensation. In addition to separate silicon-based negative-resistance circuits 10, 30 (FIGS. 5 and 6), an active transmission line resonator circuit was simulated using suitable simulation software and a silicon-based layout 40 was manufactured (see FIG. 10). In doing so the negative-resistance circuit 10 was connected to a BEOL resonator 42 with a length of 350 μm and a width of 30 μm. The BEOL resonator 42 was grounded on one side using a via array stack with two rows and nine columns. The length was chosen to be shorter than a quarter-wavelength at f.sub.0 of 83.5 GHz. This is because the capacitive loading of the resonator 42 by the negative-resistance circuit 10 will increase the electrical length of the resonator 42. With reference to FIG. 10, an input transmission line 41 leads from an input port to the resonator 42 and an output transmission line 43 leads from the other side of the resonator 42 to an output port. The final filled layout of this circuit connected to the BEOL resonator structure with probe connection pads 44 included is shown in FIG. 10.

(27) FIG. 12 shows an on-wafer measurement micrograph of the active resonator circuit of FIG. 10 whilst FIG. 13 shows a number of measured frequency responses of the active resonator circuit 40 which illustrates tunability of the quality factor (Q.sub.0) of the resonator 42 by controlling the collector current (I.sub.c) of the negative-resistance circuit 10. As can be seen in FIG. 13, it has been experimentally demonstrated that the quality factor of the resonator 42 can be enhanced up to 1578 using the negative-resistance circuit 10 made on 130 nm BiCMOS. Therefore, using any one of the negative-resistance circuits 10, 30, a highly selective active bandpass filter can be constructed. FIG. 14 illustrates a plot of collector current (I.sub.c) versus quality factor (Q.sub.0) for the active resonator circuit 40. Using the negative-resistance circuit 30 with a coupled resonator a tunable filter may be created.

(28) In FIG. 15 reference numeral 50 designates an active Q-enhanced coupled resonator bandpass filter which includes four coupled resonators (N1 to N4) with negative-resistance circuits (Z1 to Z4) connected thereto. The negative-resistance circuits (Z1 to Z4) may take the form of the circuit 10 in FIG. 1 which permits tuning of the quality factor of each resonator or circuit 30 in FIG. 2 which permits tuning of the quality factor as well as the centre frequency of the respective resonators. L1 to L4 designate input and output transmission lines and S1 to S5 designate coupling gaps between the respective resonators and transmission lines. The gaps affect interresonator coupling and Q.sub.E. The capacitive loading provided by the negative-resistance circuit, which can be varied by varying the capacitance of the varactor 31 in FIG. 2, can be used to shift the centre frequency (f.sub.0) of each resonator and the bias current or collector current (I.sub.c) can be used to tune the quality factor Q.sub.0 of each resonator.

(29) The Applicant believes that the invention has overcome the drawbacks associated with existing technologies by demonstrating that a fully-tunable on-wafer negative-resistance circuit can be used to overcome high insertion loss associated with silicon-on-chip resonators in the E-band.