METHOD FOR ASSESSING THE THERMAL LOADING OF A CONVERTER

Abstract

A method for assessing the state of damage of a semiconductor module that is subject to operational loading, in particular a semiconductor module of a drive system converter, that includes at least one semiconductor component arranged on or in a support structure. It is possible not only to estimate a spent service life for the entire semiconductor module, but also to detect unexpected or undesirable loading states and thus a premature reduction of the remaining service life of the semiconductor module. Continuous load assessments are thus possible already during the operation of the semiconductor module and allow interventions to be made in good time.

Claims

1. A method for assessing the damage state of an operationally loaded semiconductor assembly, in particular a drive system converter, having at least one semiconductor component arranged on or in a support structure, wherein a temperature (T.sub.j)-occurring within the semiconductor component is determined in the form of a time series as a high-cycle load-time curve, to which a first damage characteristic value (LC.sub.PC) is assigned with the aid of assessment algorithms known per se, and a temperature (T.sub.C)-occurring in the support structure is determined in the form of a time series as a low-cyclic load-time curve, to which a second damage characteristic value (LC.sub.TC) is assigned with the aid of the assessment algorithms known per se, characterized in that wherein the first damage characteristic value (LC.sub.PC) for identifying a high-cycle actual operating state range of the semiconductor assembly is assigned to a non-critical, a critical and a supercritical operating state range for high-cycle loads on the semiconductor assembly by comparison of the first damage characteristic value (LC.sub.PC) with a predetermined first reference value (LC.sub.PC,ref) and the second damage characteristic value (LC.sub.TC) for identifying a low-cycle actual operating state range of the semiconductor assembly is assigned to a non-critical, a critical and a supercritical operating state range for low-cycle loads of the semiconductor assembly by comparison of the second damage characteristic value (LC.sub.TC) with a predetermined second reference value (LC.sub.TC,ref), and subsequently a first indication signal is generated if both the high-cycle and the low-cycle actual operating state ranges correspond to a non-critical operating state range, a second indication signal is generated if the high-cycle or the low-cycle actual operating state range corresponds to a critical operating state range and neither corresponds to a supercritical operating state range, and a third indication signal is generated if the high-cycle or the low-cycle actual operating state range corresponds to a supercritical operating state range, wherein the time curve of the first reference value (LC.sub.PC,ref) and of the second reference value (LC.sub.TC,ref) during operation of the semiconductor assembly is in each case a predetermined, monotonically increasing function which assumes the value 1 when the maximum service life is reached, and the determination of the first damage characteristic value (LC.sub.PC) during operation of the converter is often repeated at predetermined time intervals on the basis of currently determined high-cycle load-time curves and compared with the first reference value (LC.sub.PC,ref), and the determination of the second damage characteristic value (LC.sub.TC) during operation of the converter is often repeated at predetermined time intervals on the basis of currently determined low-cycle load-time curves and compared with the second reference value (LC.sub.TC,ref) in order to generate in each case an indication signal for the current load state.

2. The method according to claim 1, wherein a non-critical operating state range is present in each case if the damage characteristic value (LC.sub.PC, LC.sub.TC) lies below a deviation range of the reference value (LC.sub.PC,ref, LC.sub.TC,ref) assigned to it, a critical operating state range is present in each case if the damage characteristic value (LC.sub.PC, LC.sub.TC) lies within the deviation range of the reference value (LC.sub.PC,ref, LC.sub.TC,ref) assigned to it, and a supercritical operating state range is present in each case if the damage characteristic value (LC.sub.PC, LC.sub.TC) lies above the deviation range of the reference value (LC.sub.PC,ref, LC.sub.TC,ref) assigned to it.

3. The method according to claim 2, wherein the deviation range of the reference values (LC.sub.PC,ref, LC.sub.TC,ref) is in the value range of 80-100% of the reference values (LC.sub.PC,ref, LC.sub.TC,ref).

4. The method according to claim 1, wherein the assessment algorithms comprise a rainflow count carried out on the basis of the high-cycle load-time curve, by which the frequency of a temperature rise (ΔT.sub.j) of a specific order of magnitude is counted for different orders of magnitude for the temperature (T.sub.j) occurring within the semiconductor component, and a computational determination of the maximum number of load cycles (N.sub.j,f) for a temperature rise (ΔT.sub.j) of each order of magnitude, wherein the first damage characteristic value (LC.sub.PC) is the sum of the quotients of the frequency of a temperature rise (ΔT.sub.j) of a specific order of magnitude for the temperature (T.sub.j) occurring within the semiconductor component to the maximum number of load cycles (N.sub.j,f) for a temperature rise (ΔT.sub.j) of the same order of magnitude.

5. The method according to claim 4, wherein an average value (T.sub.j,m) for the temperature (T.sub.j) occurring within the semiconductor component is determined from the temperature rise (ΔT.sub.j) of a specific order of magnitude for the temperature (T.sub.j) occurring within the semiconductor component for the respective order of magnitude, and the computational determination of the maximum number of load cycles (N.sub.j,f) for the temperature rise (ΔT.sub.j) of each order of magnitude is calculated according to the following formula:
N.sub.j,f=A.Math.ΔT.sub.j.sup.α.Math.exp(c/(k.sub.B.Math.T.sub.j,m)) wherein A, c and α are parameters determined empirically or by simulation for the respective semiconductor assembly and k.sub.B=1.38.Math.10.sup.−23 J/K.

6. The method according to claim 1, wherein a rainflow count is carried out on the basis of an expected high-cycle reference load-time curve, by which the frequency of a temperature rise (ΔT.sub.j,ref) of a specific order of magnitude is counted for different orders of magnitude for the temperature (T.sub.j,ref) occurring within the semiconductor component, and a computational determination of the maximum number of load cycles (N.sub.j,f,ref) for a temperature rise (ΔT.sub.j,ref) of each order of magnitude, wherein the first reference value (LC.sub.PC,ref) is the sum of the quotients of the frequency of a temperature rise (ΔT.sub.j,ref) of a specific order of magnitude for the temperature (T.sub.j,ref) occurring within the semiconductor component to the maximum number of load cycles (N.sub.j,f,ref) for a temperature rise (ΔT.sub.j,ref) of the same order of magnitude.

7. The method according to claim 6, wherein an average value (T.sub.j,m,ref) for the temperature (T.sub.j,ref) occurring within the semiconductor component is determined from the temperature rise (ΔT.sub.j,ref) of a specific order of magnitude for the temperature (T.sub.j,ref) occurring within the semiconductor component for the respective order of magnitude, and the computational determination of the maximum number of load cycles (N.sub.j,f,ref) for the temperature rise (ΔT.sub.j,ref) of each order of magnitude is calculated according to the following formula:
N.sub.j,f,ref=A.Math.ΔT.sub.j,ref.sup.α.Math.exp(c/(k.sub.B.Math.T.sub.j,m,ref) wherein A, c and α are parameters determined empirically or by simulation for the respective semiconductor assembly and k.sub.B=1.38.Math.10.sup.−23 J/K.

8. The method according to claim 1, wherein the assessment algorithms comprise a rainflow count carried out on the basis of the low-cycle load-time curve, by which the frequency of a temperature rise (ΔT.sub.C) of a specific order of magnitude is counted for different orders of magnitude for the temperature (T.sub.C) occurring in the support structure, and a computational determination of the maximum number of load cycles (N.sub.C,f) for a temperature rise (ΔT.sub.C) of each order of magnitude, wherein the second damage characteristic value (LC.sub.TC) is the sum of the quotients of the frequency of a temperature rise (ΔT.sub.C) of a specific order of magnitude for the temperature (T.sub.C) occurring in the support structure to the maximum number of load cycles (N.sub.C,f) for a temperature rise (ΔT.sub.C) of the same order of magnitude.

9. The method according to claim 8, wherein an average value (T.sub.C,m) for the temperature (T.sub.C) occurring in the support structure is determined from the temperature rise (ΔT.sub.C) of a specific order of magnitude for the temperature (T.sub.C) occurring in the support structure for the respective order of magnitude, and the computational determination of the maximum number of load cycles (N.sub.C,f) for the temperature rise (ΔT.sub.C) of each order of magnitude is calculated according to the following formula:
N.sub.C,f=B.Math.ΔT.sub.C.sup.ß.Math.exp(d/(k.sub.B=T.sub.C,m)) wherein B, d and ß are parameters determined empirically or by simulation for the respective semiconductor assembly and k.sub.B=1.38.Math.10.sup.−23 J/K.

10. The method according to claim 1, wherein a rainflow count is carried out on the basis of an expected low-cycle reference load-time curve, by which the frequency of a temperature rise (ΔT.sub.C,ref) of a specific order of magnitude is counted for different orders of magnitude for the temperature (T.sub.C,ref) occurring in the support structure, and a computational determination of the maximum number of load cycles (N.sub.C,f,ref) for a temperature rise (ΔT.sub.C,ref) of each order of magnitude, wherein the second reference value (LC.sub.TC,ref) is the sum of the quotients of the frequency of a temperature rise (ΔT.sub.C,ref) of a specific order of magnitude for the temperature (T.sub.C,ref) occurring in the support structure to the maximum number of load cycles (N.sub.C,f,ref) for a temperature rise (ΔT.sub.C,ref) of the same order of magnitude.

11. The method according to claim 10, wherein an average value (T.sub.C,m,ref) for the temperature (T.sub.C,ref) occurring in the support structure is determined from the temperature rise (ΔT.sub.C,ref) of a specific order of magnitude for the temperature (T.sub.C,ref) occurring in the support structure for the respective order of magnitude, and the computational determination of the maximum number of load cycles (N.sub.C,f,ref) for the temperature rise (ΔT.sub.C,ref) of each order of magnitude is calculated according to the following formula:
N.sub.C,f,ref=B.Math.ΔT.sub.C,ref.sup.ß.Math.exp(d/(k.sub.B=T.sub.C,m,ref)) wherein B, d and ß are parameters determined empirically or by simulation for the respective semiconductor assembly and k.sub.B=1.38.Math.10.sup.−23 J/K.

12. A drive system converter comprising a processor for carrying out the method according to claim 1.

Description

[0035] The invention is explained in more detail below by means of exemplary embodiments with the aid of the accompanying figures, wherein:

[0036] FIG. 1 shows a schematic representation of a possible embodiment of a semiconductor assembly,

[0037] FIG. 2 shows a schematic diagram illustrating the load cycles in the course of thermal loading of semiconductor components and support structure during operation of the semiconductor assembly, and

[0038] FIG. 3 shows a block diagram illustrating an embodiment of the method according to the invention.

[0039] Firstly, reference is made to FIG. 1, which shows a schematic representation of a possible embodiment of a semiconductor assembly comprising a semiconductor component 1 and a support structure 2. In the exemplary embodiment shown, the support structure 2 comprises a DCB substrate on which the semiconductor components 1 are mounted in the form of bare dies and connected with bond wires 3. DCB substrates consist of a ceramic insulator 4, for example aluminum oxide or aluminum nitride, to which a copper coating 5 is applied in a high-temperature melting and diffusion process and bonded firmly to the ceramic insulator 4. DCB substrates exhibit high current-carrying capacity due to the thick copper metallization and are especially popular in high-power semiconductor assemblies. The semiconductor components 1 are attached to the copper coating 5 on one side of the ceramic insulator 4 via solder joints 6. On the side opposite to the semiconductor components 1, a base plate 7 is attached to the copper coating 5 of the ceramic insulator 4 via further solder joints 6, which is connected to a heat sink 9 via a thermal interface 8. As can be seen from the structure according to FIG. 1, semiconductor assemblies are made of materials with different thermal properties, in particular different coefficients of thermal expansion. Therefore, due to the time-varying load, mechanical stress conditions may occur that load the semiconductor assembly. Consequently, cyclic thermal load may cause mechanical damage, such as film delamination, terminal detachment, or fatigue fractures. Failure of the semiconductor component 1 may be caused, for example, by damage to the semiconductor itself, but also by detachment of the bond wires 3, or by damage to the solder joints 6 of the semiconductor component 1 on the support structure 2. Failure of the support structure 2 may be caused, for example, by damage to the solder joints 6 within the support structure or by damage to the thermal interface 8 between the base plate 7 and the heat sink 9.

[0040] The thermal loads on the semiconductor assembly show a periodicity over time during operation due to the changes in the electrical load I.sub.P overtime and, in the case of a drive system converter, also due to the speed of the machine. These thermal load cycles are explained with reference to FIG. 2. During the electrical load (“t.sub.on”), the temperature T increases and reaches a maximum temperature T.sub.max when the electrical load ends. The temperature T will subsequently decrease again (“t.sub.off”) and reach a minimum value T.sub.min before the start of the new load. The difference is the temperature rise ΔT. Furthermore, an average value T.sub.m can also be formed.

[0041] In the context of the present invention, these load cycles are considered for two different temperatures at which changes occur at different rates, namely in the form of comparatively rapidly changing high-cycle load-time curves for a temperature T.sub.j occurring within the semiconductor component 1 and in the form of comparatively slowly changing low-cycle load-time curves for a temperature T.sub.C occurring in the support structure 2. The temperature T.sub.j occurring within the semiconductor component 1 is usually a junction temperature, and the temperature T.sub.C occurring in the support structure 2 is, for example, a temperature measured at the base plate 7 of the support structure 2.

[0042] The temperature T.sub.C measured at the base plate 7 of the support structure 2 can easily be measured and specified in the form of low-cycle load-time curves, as shown in simplified form in FIG. 2. However, actual load-time curves are more complex in structure and show, for example, a superposition of several load cycles, each with a different temperature rise and different periods.

[0043] The junction temperature as a temperature T.sub.j occurring within the semiconductor component 1 is not accessible to direct temperature measurement. However, a temperature that is as representative as possible of the junction temperature can be measured elsewhere in order to be able to draw conclusions about the junction temperature. For this purpose, the user can rely on different thermal models. For example, detailed thermal models exist which are recalculated with the switching frequency, i.e. with an update rate of several kHz. Simplified thermal models with lower update rates are also available, which admittedly also have lower accuracies.

[0044] Another possibility was described in AT 518.115 of the applicant. In a first step, a power dissipation averaged over the current period is calculated from circuit parameters S.sub.i (i=1, 2 . . . N), and an average value of the thermal load averaged over the current period is determined from the power dissipation with the aid of known thermal simulation models. In a second step, a correction value for the average value of the thermal load averaged over the current period to a maximum value of the thermal load during the current period is determined from predetermined interpolation functions for the circuit parameters S.sub.i, wherein the maximum value of the thermal load is the sum or product of the average value of the thermal load averaged over the current period and the correction value. The power dissipation can be determined from the circuit parameters S.sub.i, which are essentially independent of time over a current period. To create the interpolation functions mentioned, the maximum deviation of the thermal load from the average value can be calculated point by point with the aid of thermal simulation models known per se for combinations of circuit parameters S.sub.i to be expected, and a correction value can be determined by comparison with the average value, wherein selected correction values for selected combinations of the circuit parameters S.sub.i are the supporting points of the interpolation functions. With the help of this method, on the one hand, the accuracy of thermal simulation models known per se can be maintained as far as possible, wherein the need for high computing power during operation of the circuit is avoided, however. Instead, during operation of the circuit, only the power dissipation has to be calculated from essentially time-independent average values of the circuit parameters S.sub.i, and subsequently an average value of the thermal load, which are comparatively simple computational operations. For a sufficiently accurate estimation of the thermal load, however, the above-mentioned alternating loads must also be taken into account. In the proposed methodology, these alternating loads are recorded with the aid of interpolation functions which have been determined beforehand (offline) for each circuit parameter S.sub.i relevant for the alternating load and are stored for each semiconductor component in a memory unit of a corresponding processor, which is usually provided in power circuits anyway. However, the alternating load is not tracked in its time dependence, but only a correction value for calculating the maximum value is determined on the basis of an average value, in that the maximum (positive) deviation of the thermal load from the average value is calculated point by point with the aid of thermal simulation models known per se for combinations of circuit parameters S.sub.i to be expected and is made available in libraries as supporting values of an interpolation function. During operation of the circuit, the correction value for calculating the maximum value is determined for specific circuit parameters S.sub.i with the aid of these interpolation functions. This process can also be carried out comparatively quickly and without a great deal of computing power during operation of the circuit. Due to the low computational effort during the operation of the circuit, it is also possible with the help of the proposed methodology to determine the thermal load of each semiconductor component 1 also during operation many times.

[0045] The result of these calculations can be represented in highly cyclic load-time curves, as shown in simplified form in FIG. 2. It is understood that actual load-time curves are more complex in design and show, for example, a superposition of several load cycles, each with a different temperature range and different periods.

[0046] The high-cycle load-time curve determined in this way for a temperature T.sub.j occurring inside the semiconductor component 1 and the low-cycle load-time curve for a temperature T.sub.C occurring in the support structure 2 are the starting point of the method according to the invention, as will be explained below with reference to FIG. 3. The determination of the high-cycle and low-cycle load-time curves takes place in the first block of FIG. 3 labeled “Thermal model”.

[0047] These load-time curves are each subjected to rainflow counting. In the case of the highly cyclic load-time curve, the frequency of a temperature rise ΔT.sub.j of a specific order of magnitude is counted for different orders of magnitude by means of rainflow counting for the temperature T.sub.j occurring within the semiconductor component. The result is a matrix in which different orders of magnitude are assigned a corresponding frequency for the temperature rise ΔT.sub.j. The highly cyclic load-time curves are determined and analyzed at predetermined intervals during operation of the semiconductor assembly, wherein the frequencies of a temperature rise ΔT.sub.j of a specific magnitude are summed up over time. The frequencies determined in this way can be set in relation to the maximum number of load cycles N.sub.j,f for a temperature rise ΔT.sub.j of a specific magnitude. This quotient, which can be determined for each order of magnitude, can subsequently be summed up over all orders of magnitude and results in a value which will be small at the beginning of the operation of the semiconductor assembly and will approach the value 1 during the service life of the semiconductor assembly. This value is the first damage characteristic value LC.sub.PC.

[0048] For the computational determination of the maximum number of load cycles N.sub.j,f for the temperature rise ΔT.sub.j of a specific order of magnitude, an average value T.sub.j,m for the temperature T.sub.j occurring within the semiconductor component for the respective order of magnitude can first be determined from the temperature rise ΔT.sub.j of a specific order of magnitude for the temperature T.sub.j occurring within the semiconductor component. The computational determination of the maximum number of load cycles N.sub.j,f for the temperature rise ΔT.sub.j of each order of magnitude can subsequently be calculated according to the following formula:

N.sub.j,f=A.Math.ΔT.sub.j.sup.α.Math.exp(c/(k.sub.B.Math.T.sub.j,m))

[0049] wherein A, c and α are parameters determined empirically or by simulation for the respective semiconductor assembly and k.sub.B=1.38.Math.10.sup.−23 J/K.

[0050] An analogous procedure can be followed for the low-cycle load-time curve. In the case of the low-cycle load-time curve, the frequency of a temperature rise ΔT.sub.C of a specific order of magnitude is counted for different orders of magnitude by means of rainflow counting for the temperature T.sub.C of the base plate 7. The result is again a matrix where different orders of magnitude are assigned a corresponding frequency for the temperature rise ΔT.sub.C. The low-cycle load-time curves are determined and analyzed at predetermined intervals during operation of the semiconductor assembly, wherein the frequencies of a temperature rise ΔT.sub.C of a specific magnitude are summed up over time. The frequencies determined in this way can be set in relation to the maximum number of load cycles N.sub.C,f for a temperature rise ΔT.sub.C of a specific magnitude. This quotient, which can be determined for each order of magnitude, can subsequently be summed up over all orders of magnitude and results in a value that will be small at the beginning of the operation of the semiconductor assembly and will approach the value 1 during the service life of the semiconductor assembly. This value is the second damage characteristic value LC.sub.TC.

[0051] For the computational determination of the maximum number of load cycles N.sub.C,f for the temperature rise ΔT.sub.C of a specific order of magnitude, an average value T.sub.C,m, can first be determined for the relevant order of magnitude from the temperature rise ΔT.sub.C of a specific order of magnitude for the temperature T.sub.C of the base plate 7. The computational determination of the maximum number of load cycles N.sub.C,f for the temperature rise ΔT.sub.C of each order of magnitude can subsequently be calculated according to the following formula:

N.sub.C,f=B.Math.ΔT.sub.C.sup.ß.Math.exp(d/(k.sub.B.Math.T.sub.C,m))

[0052] wherein B, d and ß are parameters determined empirically or by simulation for the respective semiconductor assembly and k.sub.B=1.38.Math.10.sup.−23 J/K.

[0053] The first reference value LC.sub.PC,ref and the second reference value LC.sub.TC,ref are determined in the same way as the first damage characteristic value LC.sub.PC and the second damage characteristic value LC.sub.TC, as shown in the lower part of FIG. 3 with the blocks outlined in bold. Only an expected high-cycle or low-cycle reference load-time curve is used, and a rainflow count is performed based on the expected high-cycle or low-cycle reference load-time curve. Furthermore, the determination of the first reference value LC.sub.PC,ref and the second reference value LC.sub.TC,ref will only be carried out once for a specific application, usually by the manufacturer of the drive system converter. Considering the temporal course of the reference values LC.sub.PC,ref and LC.sub.TC,ref during the operation of the semiconductor assembly, a monotonously increasing function results in each case, which assumes the value 1 when the maximum service life is reached, and which is stored in the memory of a microprocessor of the converter. The determination of the first damage characteristic value LC.sub.PC and the second damage characteristic value LC.sub.TC, on the other hand, is often repeated at predetermined time intervals during operation of the converter on the basis of currently determined load-time curves and compared with the first reference value LC.sub.PC,ref and the second reference value LC.sub.TC,ref to generate an indication signal for the current load state. Taking into account the time curve of the first damage characteristic value LC.sub.PC and the second damage characteristic value LC.sub.TC during operation of the semiconductor assembly, a monotonically increasing function results in each case, which assumes the value 1 when the maximum service life is reached, but which can be steeper or flatter than that of the corresponding reference values LC.sub.PC,ref, LC.sub.TC,ref. If it is steeper, the corresponding converter is loaded more than expected, so that an early failure of the semiconductor assembly is to be expected. If it is flatter, the corresponding converter is loaded less than expected, so that safe operation of the semiconductor assembly up to the expected maximum service life can be expected.

[0054] In this case, the absolute value can be compared, or the time derivative, which corresponds to the increase of the mentioned monotonic functions. Both the absolute value and the time derivative are suitable for comparing the first and second damage characteristic values LC.sub.PC, LC.sub.TC with the respective reference values LC.sub.PC,ref, LC.sub.TC,ref.

[0055] On the basis of this comparison, assignment to a non-critical, a critical and a supercritical operating state range is made by comparing the first damage characteristic value LC.sub.PC with the first reference value LC.sub.PC,ref and the second damage characteristic value LC.sub.TC with the second reference value LC.sub.TC,ref, wherein a non-critical operating state range is present in each case if the respective damage characteristic value LC.sub.PC, LC.sub.TC lies below a deviation range of the reference value LC.sub.PC,ref, LC.sub.TC,ref assigned to it in each case. A critical operating state range is present in each case if the damage characteristic value LC.sub.PC, LC.sub.TC lies within the deviation range of the reference value LC.sub.PC,ref, LC.sub.TC,ref assigned to it in each case, and a supercritical operating state range is present in each case if the damage characteristic value LC.sub.PC, LC.sub.TC lies above the deviation range of the reference value LC.sub.PC,ref, LC.sub.TC,ref assigned to it in each case. The deviation range of the reference values LC.sub.TC,ref, LC.sub.TC,ref can, for example, lie in the value range of 80-100% of the reference values LC.sub.PC,ref, LC.sub.TC,ref. A non-critical operating condition range would exist in this case if, for example, the first damage characteristic value LC.sub.PC is less than 80% of the first reference value LC.sub.PC,ref. A critical operating condition range would be present if the first damage characteristic value LC.sub.PC is within the deviation range of 80-100% of the first reference value LC.sub.PC,ref. A supercritical operating condition range would be present if the first damage characteristic value LC.sub.PC is above the first reference value LC.sub.PC,ref. The latter represents an unexpectedly high load on the semiconductor component, which the user should know about in order to be able to intervene in an appropriate way. It is understood that the non-critical, critical and supercritical operating condition ranges can also be selected in the form of other percentage deviations for the deviation range. In addition, different percentage deviations could be selected in each case for high-cycle and low-cycle loads to define the non-critical, critical and supercritical operating condition ranges.

[0056] With the aid of the invention, it is thus possible to evaluate the thermal damage state of an operationally loaded semiconductor assembly, wherein it is not only possible to estimate a consumed service life for the entire semiconductor assembly, but also to detect unexpected or undesired load conditions and thus a premature reduction of the remaining service life of the semiconductor assembly. This enables ongoing load evaluations while the semiconductor assembly is still in operation, allowing timely interventions.