Amplifier

11329613 · 2022-05-10

Assignee

Inventors

Cpc classification

International classification

Abstract

An amplifier, including: an amplifying element, having a voltage input across a first terminal and a third terminal and a voltage controlled current path between a second terminal and the third terminal; and a trifilar transformer having a primary winding, a secondary winding and a tertiary winding; wherein the primary winding is connected to the third terminal, the secondary winding is connected to the first terminal and the tertiary winding is connected to the second terminal; wherein the primary winding and the secondary winding are mutually coupled in inverting relationship; wherein the primary winding and the tertiary winding are mutually coupled in non-inverting relationship; wherein the secondary winding and the tertiary winding are mutually coupled in inverting relationship; and wherein the tertiary winding is between the amplifier output and the second terminal.

Claims

1. An amplifier, comprising: an amplifying element, having a voltage input across a first terminal and a third terminal and a voltage controlled current path between a second terminal and the third terminal; and a trifilar transformer having a primary winding, a secondary winding and a tertiary winding; wherein the primary winding is connected to the third terminal, the secondary winding is connected to the first terminal and the tertiary winding is connected to the second terminal; wherein the primary winding and the secondary winding are mutually coupled in inverting relationship; wherein the primary winding and the tertiary winding are mutually coupled in non-inverting relationship; wherein the secondary winding and the tertiary winding are mutually coupled in inverting relationship; and wherein the tertiary winding is between the amplifier output and the second terminal.

2. An amplifier as claimed in claim 1, wherein the effective turns ratios of each pair of windings is selected such that the real part of the amplifier input impedance is positive and the real part of the amplifier output impedance is positive.

3. An amplifier as claimed in claim 1, wherein the effective turns ratios of each pair of windings is selected such that the phase difference between the first terminal and the third terminal is within a range of 120-240 degrees.

4. An amplifier as claimed in claim 1, wherein the effective turns ratios of each pair of windings is selected such that the phase difference between the first terminal and the third terminal is within a range of 150-210 degrees.

5. An amplifier as claimed in claim 1, wherein the primary winding, the secondary winding and the tertiary winding are all concentric and wherein the primary winding separates the secondary winding from the tertiary winding.

6. An amplifier as claimed in claim 1, wherein the primary winding is interwound with either the secondary winding or the tertiary winding.

7. An amplifier as claimed in claim 6, wherein the other of the secondary winding and the tertiary winding is concentric with the interwound windings.

8. An amplifier as claimed in claim 1, wherein the trifilar transformer is a stacked transformer formed in two metal layers with the primary winding stacked with one of the secondary winding and the tertiary winding and the primary winding being formed in the same layer and concentric with the other of the secondary winding and the tertiary winding.

9. An amplifier as claimed in claim 1, wherein the secondary winding is shaped so as to have near-zero mutual coupling with the tertiary winding.

10. An amplifier as claimed in claim 1, wherein the amplifying element is a transistor.

11. An amplifier as claimed in claim 10, wherein the transistor is a FET, preferably a MOSFET.

12. An amplifier as claimed in claim 11, wherein the FET is arranged in a common-gate configuration.

13. An amplifier as claimed in claim 12, wherein the primary winding is connected to the FET's source, the secondary winding is connected to the FET's gate and the tertiary winding is connected to the FET's drain.

14. A method of amplifying a signal with an amplifying element, the amplifying element comprising a voltage input across a first terminal and a third terminal and comprising a voltage controlled current path between a second terminal and the third terminal, the method comprising: applying the signal to a third terminal of the amplifying element; sensing, with a primary winding of a trifilar transformer, a voltage at the third terminal; coupling with inversion at least a part of said sensed voltage from the third terminal via a secondary winding of the trifilar transformer to the first terminal of the amplifying element; sensing, with a tertiary winding of a trifilar transformer, a current at the second terminal; coupling without inversion at least a part of said sensed current from the second terminal via a tertiary winding of the trifilar transformer to the third terminal of the amplifying element; and outputting an amplified signal from an output node located such that the tertiary winding is between the output node and second terminal.

Description

(1) Certain preferred embodiments of the invention will now be described, by way of example only, and with reference to the accompanying drawings in which:

(2) FIG. 1 shows a basic block diagram of a direct-RF sampling receiver front-end suitable for wideband signal processing;

(3) FIG. 2 shows a basic common-gate low-noise amplifier (LNA);

(4) FIG. 3 shows a modified common-gate LNA using a transformer to boost the transconductance of the amplifier through a voltage feedforward arrangement;

(5) FIG. 4 shows another common-gate LNA using a transformer to boost current gain through reactive positive current feedback;

(6) FIG. 5 shows an amplifier according to an embodiment of the invention;

(7) FIGS. 6a and 6b show an example of a transformer layout; and

(8) FIG. 7 shows some properties of the amplifier of FIG. 5.

(9) FIG. 1 depicts a typical direct-RF sampling receiver front-end 100 for a wideband receiver operating for example, in the 6 to 8.5 GHz band. Antenna 101 receives a RF signal and passes it to high-pass filter 102 which rejects signals below about 6 GHz (and which may have a high rejection notch at around 5.1 to 5.8 GHz, although it will be appreciated that these numbers are provided purely by way of example). The output of high-pass filter 102 feeds to the input of low-noise amplifier 103 which provides gain for the signal of interest across the operating band of 6 to 8.5 GHz. The output of low-noise amplifier 103 is then fed to an analogue-to-digital converter (ADC) 104 that finally digitizes the RF signal.

(10) FIGS. 2 to 4 have already been described above, but briefly these show a basic common-gate LNA circuit (FIG. 2), a modified common-gate LNA with transformer voltage feed-forward gain boosting (FIG. 3) and a modified common-gate LNA with transformer current feedback gain boosting (FIG. 4).

(11) FIG. 5 shows an embodiment of a low-noise amplifier 500 with a trifilar transformer 510 which is made up of a primary winding L.sub.P, a secondary winding L.sub.S and a tertiary winding L.sub.T. The windings of the trifilar transformer 510 are connected to the terminals of amplifying element M.sub.1 which in this embodiment is a Field Effect Transistor (FET). The amplifying element M.sub.1 acts as a voltage controlled current source whereby the voltage applied between the first terminal and the third terminal (the gate-source voltage) controls the current flowing between the second terminal (drain) and the third terminal (source).

(12) The transistor M.sub.1 is arranged in a common-gate configuration. A DC voltage is applied to the gate (first terminal) to bias the transistor into an active, amplification state. The RF input signal is applied to the source (third terminal) so that it causes variation in the gate-source voltage. The primary transformer winding L.sub.P is connected to the third terminal, i.e. in parallel with the RF input and connects to a ground (this may be an analog ground or it may be a virtual ground e.g. in the case of a differential amplifier).

(13) The secondary winding L.sub.S is connected to the first terminal (gate) in series with the DC bias voltage and in inverting relationship with the primary winding L.sub.P. Thus, the primary winding L.sub.P and the secondary winding L.sub.S form a voltage feedforward circuit whereby the primary winding L.sub.P senses the voltage at the input, RF.sub.i and applies it inverted to the gate of M.sub.1. Therefore, as the input signal at the source drops, the feedforward of the primary winding L.sub.P and secondary winding L.sub.S causes the gate voltage to increase in proportion to the input signal and vice versa, thus increasing the gate-source voltage and thereby increasing the overall transconductance of the amplifier 500 (i.e., g.sub.m-boosting).

(14) The tertiary winding L.sub.T is connected to the second terminal (drain) in non-inverting relationship with the primary winding L.sub.P. Thus, the primary winding L.sub.P and the tertiary winding L.sub.T form a positive current feedback loop whereby current sensed at the drain on the tertiary winding L.sub.T is fed back to the primary winding L.sub.P on the source, thereby amplifying the current flow through the current path of the transistor M.sub.1 (i.e. drain-source current is amplified).

(15) The output RF.sub.0 of amplifier 500 is taken from the other side of the tertiary winding from the amplifying element M.sub.1. The output RF.sub.0 could be taken directly from the other side of the tertiary winding L.sub.T (i.e. from terminal P6). The ideal load for a current output is 0Ω. In the embodiment of FIG. 5, a current buffer M.sub.2 is provided to separate the load (e.g., inductor, L.sub.1) on the drain side from the low impedance (i.e., 1/g.sub.m of M.sub.2) seen at the source. In other embodiments a current choke (i.e., high impedance for RF) arrangement (for DC biasing) such as that shown in FIG. 4 could be used.

(16) The tertiary winding L.sub.T and the secondary winding L.sub.S are also mutually coupled and they are in an inverting relationship. This provides further positive feedback to the gate of M.sub.1, which is acceptable (and even beneficial) providing it is kept within boundary conditions. If the magnitude of this tertiary-secondary feedback is too large then the circuit will oscillate and become unstable, and therefore, care needs to be taken to avoid this.

(17) As discussed above, the input impedance of the amplifier 500 is defined as:

(18) Z i 1 ( g m ( 1 + n P , S k P , S + n T , S k T , S ) ( 1 - k T , P n T , P ) )

(19) Therefore, the input impedance can be controlled, and thus matched to other circuit elements, such as an RF antenna for maximum power transfer to the amplifier, by controlling (i.e. appropriately designing) the turns ratios and the mutual coupling coefficients of the three transformer windings. As the impedance matching can be achieved through appropriate design of the transformer windings rather than by requiring an amplifier with a particular intrinsic transconductance or limiting the gain, the circuit provides an improvement over the amplifiers of FIGS. 3 and 4. The amplifier 500 can achieve both impedance matching and high gain without requiring an amplifier with high transconductance and correspondingly high power consumption.

(20) One way to avoid oscillation and instability due to the mutual coupling and feedback of the secondary winding L.sub.S and the tertiary winding L.sub.T is to reduce the coupling coefficient of these two windings by transformer design. One example of a suitable transformer design that can be used with the amplifier 500 of FIG. 5 is shown in FIG. 6.

(21) FIG. 6 shows a trifilar transformer 600 which is formed in two separate (stacked) metal layers of a die. The primary winding, the secondary winding and the tertiary winding are all formed as concentric windings (i.e. although the layers are stacked, no winding is directly stacked above another). The primary winding and the secondary winding are formed in one metal layer while the tertiary winding is formed in a second metal layer. The primary winding P1-P2 is the middle winding (in terms of radius) with the secondary winding P3-P4 formed around it (with larger radius) and the tertiary winding P5-P6 formed inside it (with smaller radius).

(22) FIG. 6a shows an isometric projection of the transformer 600 arrangement, while FIG. 6b shows a plan view showing the concentric coils.

(23) The connections to the three windings P1-P6 are also labeled on FIG. 5 to show how the trifilar transformer 600 of FIG. 6 is used to construct the circuit of FIG. 5.

(24) One example of a transformer design in a 55 nm CMOS process is as follows: Transistor biased with 2.3 mA I.sub.DC to provide an intrinsic g.sub.m=25 mA/V L.sub.P=0.85 nH, L.sub.S=0.65 nH and L.sub.T=0.9 nH n.sub.P,S=0.87, n.sub.T,S=0.85 and n.sub.T,P=0.95 k.sub.P,S=0.6, k.sub.T,S=0.33 and k.sub.T,P=0.5

(25) From these numbers, the gain, and input impedance, Z.sub.i can be calculated as:
Z.sub.i≅47Ω

(26) Using the same design, except with k.sub.T,S=0 (i.e. with the tertiary-secondary coupling coefficient reduced to zero):
Z.sub.i≅56Ω

(27) Thus in both cases the input impedance is well-matched to a 50Ω antenna and the amplifier has high gain.

(28) FIG. 7 shows the forward reflection coefficient (return loss) S.sub.11 and the forward transmission coefficient S.sub.21 for an embodiment of the amplifier 500 of FIG. 5 in 55 nm CMOS. The forward reflection coefficient S.sub.11 shows that the amplifier can be considered impedance matched (below −10 dB) across a wide frequency range from around 6.5 GHz to 11 GHz. This is an excellent wideband response suitable for use with ultra-wideband (UWB) applications. The forward transmission coefficient S.sub.21 shows an excellent signal response, peaking above 30 dB at about 7.3 GHz. The peak response of the amplifier can be tuned in frequency by appropriate choice of the load inductance and capacitance (actual or parasitic), therein forming a parallel LC resonant circuit. The Q-factor of the LC resonant circuit determines the frequency selectivity (bandwidth) of the LNA.

(29) It will be appreciated that variations and modifications of the above circuits may be made without departing from the scope of the appended claims.