METHOD FOR TRANSMITTING A MESSAGE IN A COMPUTING SYSTEM, AND COMPUTING SYSTEM

Abstract

In a method for transmitting a message in a computing system, the message is transmitted by a transmitter and received by a receiver. The transmitter is granted access to a memory area for the purpose of transmitting using a first virtual address allocated to the transmitter by a memory management unit, whereas the access to the memory area by the transmitter is revoked after transmitting. Subsequently, the receiver is granted access to the memory area for the purpose of receiving using a second virtual address allocated to the receiver by a memory management unit. The first virtual address may be different from the second virtual address.

Claims

1.-11. (canceled)

12. A computer-implemented method for transferring a message in a computing system, comprising: writing data into a memory area of a plurality of memory areas, granting a transmitter, which is embodied as an application in a container, access to the memory area by using a memory management unit, allocating to the transmitter a first virtual address by the memory management unit for access to the memory area, transmitting the message using a transmitter, revoking access of the transmitter to the memory area by the memory management unit after transmission of the message, for receiving, granting a receiver, which is embodied as an application in a container, access to the memory area by allocating to the receiver a second virtual address obtained from the memory management unit for access to the memory area, with the first virtual address being different from the second virtual address, and reading the data from the memory area with the receiver using the second virtual address.

13. The method of claim 12, wherein the plurality of memory areas, having each a predetermined memory size, are provided by the memory management unit.

14. The method of claim 13, wherein of at least some of the plurality of memory areas differ in memory size from others of the plurality of memory areas.

15. The method of claim 12, wherein the plurality of memory areas are allocated for transmitting the message.

16. The method of claim 12, wherein the plurality of memory areas are configured as a message queue.

17. The method of claim 16, further comprising: transferring the memory area by the transmitter to the message queue following transmission of the message, and for receiving with the receiver, removing by the receiver content of the memory area from the message queue.

18. The method of claim 12, further comprising releasing the memory area following receiving with the receiver.

19. A computing system, comprising: a memory management unit providing a logical association of physical memory areas with virtual memory addresses, a transmitter obtaining from a base system a physical memory area or obtaining from the memory management unit a first virtual memory address corresponding to the physical memory area and transmitting a message to the physical memory area, a receiver obtaining from the memory management unit a second virtual memory address corresponding to the physical memory area, with the first virtual memory address being different from the second virtual memory address, and receiving the message stored in the physical memory area using the second virtual memory address.

20. A computer program product embodied in a non-transitory computer-readable storage medium and comprising commands which, when the commands are read into a memory of a computing system and executed by a processor of the computing system, cause the computing system to. write data into a memory area of a plurality of memory areas, grant a transmitter, which is embodied as an application in a container, access to the memory area by using a memory management unit, allocate to the transmitter a first virtual address by the memory management unit for access to the memory area, transmit the message using a transmitter, revoke access of the transmitter to the memory area by the memory management unit after transmission of the message, for receiving, grant a receiver, which is embodied as an application in a container, access to the memory area by allocating to the receiver a second virtual address obtained from the memory management unit for access to the memory area, with the first virtual address being different from the second virtual address, and read the data from the memory area with the receiver using the second virtual address.

21. A non-transitory computer-readable storage medium comprising a computer program with commands which, when the commands are read into a memory of a computing system and executed by a processor of the computing system, cause the computing system to. write data into a memory area of a plurality of memory areas, grant a transmitter, which is embodied as an application in a container, access to the memory area by using a memory management unit, allocate to the transmitter a first virtual address by the memory management unit for access to the memory area, transmit the message using a transmitter, revoke access of the transmitter to the memory area by the memory management unit after transmission of the message, for receiving, grant a receiver, which is embodied as an application in a container, access to the memory area by allocating to the receiver a second virtual address obtained from the memory management unit for access to the memory area, with the first virtual address being different from the second virtual address, and read the data from the memory area with the receiver using the second virtual address.

Description

[0034] The invention will now be described in greater detail using preferred exemplary embodiments and making reference to the accompanying drawings, in which:

[0035] FIG. 1 shows a schematic representation of a computing system, by means of which an intra-process communication is performed in accordance with the prior art;

[0036] FIG. 2 shows a schematic representation of a computing system, by means of which an inter-process communication is performed in accordance with the prior art;

[0037] FIG. 3 shows a schematic representation of a computing system in accordance with a first embodiment, in which a message is transferred between two processes; and

[0038] FIG. 4 shows a schematic representation of a computing system in accordance with a second embodiment, in which a message is transferred within a process.

[0039] In the figures, identical or functionally similar elements are provided with the same reference characters.

[0040] FIG. 1 shows a schematic representation of a computing system 1, by means of which an intra-process communication is performed in accordance with the prior art. In this context, messages are to be transferred within a process Pr1. Here, data is to be transferred from a transmitter S in the form of a transmit task to a receiver E in the form of a receive task. The transmitting and receiving are performed by a base system B. Within the process P1, both the transmitter S and the receiver E each have access to memory areas 2 of a memory. It is not necessary in this context for the message or data to be copied. Here, it is sufficient if virtual memory addresses P1, P2 or pointers are transferred. In the present case, the transmitter S and the receiver E have identical memory addresses P1, P2. The advantage in the case of intra-process communication is the high speed of the data exchange, and the deterministic nature of the transmission, as this does not depend upon the size of the message. By way of contrast, however, there is the major disadvantage that the memory area 2 of the message and therefore the integrity of the content thereof is not protected.

[0041] In comparison, FIG. 2 shows a schematic representation of a computing system 1, by means of which an inter-process communication is performed in accordance with the prior art. In this context, the message or data 3 is transferred from the transmitter S or transmit task in a first process Pr1 to the receiver E or receive task in a second process Pr2. It is necessary here to copy the data to be transferred. To this end, the base system B provides the memory areas 2. For the transmission, the data 3 is copied from a memory of the transmitter S into the memory area 2. For the receiving, the data 3 is in turn copied from the memory area 2 into a memory of the receiver E. In addition to this doubled time delay, the inter-process communication has the further disadvantage that the number of memory areas 2 available in the system may not be sufficient, meaning that the transmitter S freezes, because it cannot copy the data 3. The advantage of inter-process communication is fully ensuring the integrity of the message, as it can no longer be modified following the transmission.

[0042] FIG. 3 shows a schematic representation of a computing system 1 in accordance with a first embodiment. Here, a message is transferred from the transmitter S in the first process Pr1 to the receiver E in the second process Pr2. Here, the computing system 1 moreover comprises a memory management unit 4, which can also be referred to as MMU. The memory management unit 4 undertakes the logical assignment of the physically available main memory to virtual addresses. By means of the memory management unit 4, the memory areas 2 can be provided as a page with a memory size of four kilobytes, for example.

[0043] For the transmission of the message, the transmitter S retrieves a memory area 2 from the base system B, in order to write the data into it. With the transmission of the message, the access of the transmitter S to this page is revoked again by MMU configuration and access is transferred to the receiver E. This means that the transmitter S is no longer able to modify the memory area 2 following the transmission. Moreover, the virtual addresses P1, P2 differ for the transmitter S and the receiver E. The receiver E may obtain the virtual address P2 from the base system B.

[0044] The method may also be used for message transfer in a single process Pr1. This is illustrated in FIG. 4, which shows a schematic representation of a computing system 1 in accordance with a further embodiment. By way of the different virtual addresses P1, P2, the integrity of the message is ensured during the message exchange within the process Pr1.

[0045] In order to be able to manage the messages, message queues are used. The message queue is first initialized. Furthermore, the allocation is performed. Here, a memory area 2 is provided, which can be used to transmit the message. The running time of this function is not deterministic. In this context, what are known as pools or memory pools can also be used. Here, during the initialization of the system, a certain number of memory areas 2 of equal size are allocated and stored in this pool. The provision of a memory area from this pool is deterministic.

[0046] For the transmission, the memory area 2 can be transferred to the message queue by means of the transmitter S. This function is never able to freeze as there is no upper limit as to how many transmission buffers can be in a message queue before it is read. For the receiving, the receiver E can remove the memory area 2 from the message queue. If the message queue is empty, the task freezes until a buffer is transmitted into the queue from another task. For the receiving function, a timeout or a try option may also be used, so that the freezing only lasts a certain amount of time or never occurs. After this, the memory area 2 can be released. This running time of this function is not deterministic. Finally, the message queue can be removed from the system again.

[0047] Using the method, both during the message transfer within a process Pr1 and during the message transfer between processes Pr1, Pr2, it is possible to realize on the one hand the full message integrity and on the other hand the deterministic delivery.