Digital Q-Meter for continuous-wave NMR

Abstract

A method to perform continuous-wave NMR measurements of nuclear magnetization at high magnetic fields, above 2.5 T, without analog down-mixing is described. An FPGA controls a digital clock pulse which is used to stimulate a resonant circuit and provide a reference signal. An algorithm determines the real portion of a resonant circuit signal near the Larmor frequency of the species of interest using only two measurements of the waveform per cycle. The FPGA automatically alters a variable capacitance to tune the resonant circuit to the Larmor frequency.

Claims

1. A method of digitally acquiring continuous-wave NMR measurements above 5 MHz and up to a desired sampling frequency comprising an algorithm to produce real and imaginary components of a signal from two measurements each of the signal and a reference waveform per cycle, the two measurements being 90 degrees separated in time.

2. The method of claim 1 wherein the algorithm comprises: a field programmable gate array (FPGA) to control clock pulses; a first ADC to create a reference signal; a second ADC to create a resonant signal; and sending the clock pulses through low pass filters to produce sine waves.

3. The method of claim 2 comprising sending the clock pulses through low pass filters; and producing sine waves with the low pass filters to stimulate an impedance-capacitive-resistive (LCR) circuit.

4. The method of claim 3 comprising sending the resonant signal through a digital delay to allow phase control before filtering and digitization in the second ADC.

5. The method of claim 4 comprising filtering the stimulus signal; and sending the stimulus signal to the LCR circuit.

6. The method of claim 5 comprising amplifying and digitizing the LCR signal.

7. The method of claim 6 comprising setting a bias voltage with the FPGA; and sending the bias voltage to control a variable capacitor in the LCR.

8. A method of digitally acquiring continuous-wave NMR measurements above 5 MHz and up to a desired sampling frequency wherein the NMR measurements are acquired using a field programmable gate array (FPGA) comprising the following steps: a) for the first point of the frequency sweep, reading reference samples x.sub.1, y.sub.1 and signal samples x.sub.2, y.sub.2 in each ADC, and averaging many points to reduce noise; b) determining amplitude and phase of reference and signal; c) calculating the total signal component and real component; d) tuning the capacitance of the LCR circuit to the center, Larmor frequency; and e) tuning the delay so that the reference and signal are in phase; and obtaining Q-curves.

9. The method of claim 8 wherein tuning the capacitance of the LCR circuit comprises, for each point of the frequency sweep: setting the programmable clock to the center frequency; changing the DAC voltage on the varactor diode variable capacitor; and repeating steps a) to c) of claim 8 until A.sub.2 is at a minimum.

10. The method of claim 9 wherein tuning the delay comprises: setting the DAC voltage to that corresponding to the center frequency; changing the delay; and repeating steps a) to c) of claim 9 until X is at a minimum.

11. The method of claim 10 wherein obtaining Q-curves comprises: setting the pro-grammable clock to the first point in the frequency sweep range; and repeating steps a) to c) of claim 9 for each frequency sweep to obtain real components.

12. The method of claim 2 wherein the algorithm comprises: reading from the ADCs two samples per cycle at 90° phase from each other; reading the angular frequency of the signals; determining a reference waveform and a signal waveform; and determining parametrically the amplitude (A) and phase (θ) of each sine wave A.sub.i sin (ωt+θ.sub.i):
A.sub.i=x.sub.i.sup.2+y.sub.i.sup.2, θ.sub.i=arctan(y.sub.i/x.sub.i).  (6)

13. The method of claim 12 comprising: integrating between time points T.sub.0, T.sub.1, and T.sub.2, T.sub.0 from the phase difference between signals Δθ=θ.sub.2−θ.sub.1, wherein T.sub.2 is half a cycle; and finding the intersection of the two signals where they are equal to determine determining T.sub.1.

14. The method of claim 13 comprising: determining the real component (X) of the signal by the following equation $\begin{array}{cc}X={\int }_{T_0}^{T_1}{A}_2\sin \left(\omega t+\mathrm{\Delta \theta }\right)+{\int }_{T_1}^{T_2}{A}_1\sin \left(\omega t\right)& \left(7\right)\\ =A_2\left(\cos \left(\omega T_0\right)-\cos \left(\omega T_1\right)\right)+A_1\left(\cos \left(\omega T_1\right)-\cos \left(\omega T_2\right)\right).& \left(8\right)\end{array}$

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) For a more complete understanding of the invention, reference is made to the following description and accompanying drawings, in which:

(2) FIG. 1 shows a traditional Q-meter design;

(3) FIG. 2 shows the novel digital Q-meter design; and

(4) FIG. 3 shows the determination of the real power of the signal from two measured points on the reference and signal waveforms.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

(5) Our new digital Q-Meter removes the need for down-mixing in a phase sensitive detector by directly determining the resonant signal and reference signal using fast ADCs. This system does not require user-dependent circuit tuning and eliminates feedback of the reference signal to the total detector through the mixer. By performing calibrations and scaling in the programming, variations among the necessary analog circuit components can be corrected in a way not possible with an analog Q-Meter. This method leverages precise digital delays to directly determine full RF waveforms using as few as two samples per cycle.

(6) Our digital Q-Meter, shown in FIG. 2, centers around a field-programmable gate array (FPGA) which performs the necessary calculations for the measurement. The FPGA controls a clock pulse 6, which is a square wave pulse signal from the clock used both to trigger the ADC measurements and to produce RF signals. Clock pulses are sent through low pass filters, producing sine waves for stimulating the LCR circuit 2 and as reference. The reference signal 7, which is a reference signal created from the clock pulse after phase matching with a digital delay, is sent through a digital delay to allow phase control, before filtering and digitization in the ADC. The stimulus signal is filtered by a low pass filter 8, which converts the square wave clock pulse into a single-frequency sinusoidal signal, and sent to the LCR circuit, and the LCR signal is where it is amplified and digitized to create the resonant signal 9. The FPGA also controls the voltage on a varactor capacitor 10 to allow direct tuning of the LCR resonance frequency. The capacitance bias is a bias voltage to control the variable capacitor 10 and is set by the FPGA using the DAC.

(7) While the digital Q-Meter eliminates analog down-mixing and manual tuning, it trades them for complex programming. The program consists of firmware and software that run on the FPGA and a host computer, respectively. As seen in FIG. 3, the two ADCs reading two samples per cycle at 90° phase from each other: x.sub.1 and y.sub.1 for the reference, and x.sub.2 and y.sub.2 for the LCR signal. This allows the determination of the reference waveform 12, which is available from the clock, and signal waveform 11, which is the resonant signal waveform or signal waveform from the resonant circuit. With the angular frequency (ω=2πf) of the signals known, these two points can be used to parametrically determine the amplitude (A) and phase (θ) of each sine wave A.sub.i sin (ωt+θ.sub.i):
A.sub.i=√{square root over (x.sub.i.sup.2+y.sub.i.sup.2)}, θ.sub.i=arctan(y.sub.i/x.sub.i)  (3)
The total component of the LCR signal is A.sub.2. The real component of the LCR signal is the shaded area under both waveforms indicated by real area 13, which is the area under both the signal and reference curves, which corresponds to the real portion of the signal power and is found by integrating between time points T.sub.0, T.sub.1, and T.sub.2. T.sub.0 is determined from the phase difference between signals Δθ=θ.sub.2−θ.sub.1, which is indicated as the phase difference 14, which is the difference between the signal and reference waveforms, and T.sub.2 is half a cycle. To determine T.sub.1, we find the intersection of the two signals where they are equal:

(8) $\begin{array}{cc}{A}_1\sin \left(\omega T_1\right)=A_1\sin \left(\omega T_1+\mathrm{\Delta \theta }\right).Math.T_1=\frac{1}{\omega }\arctan \left(\frac{\sin \mathrm{\Delta \theta }}{\cos \mathrm{\Delta \theta }-A_1\text{/}{A}_2}\right).& \left(4\right)\end{array}$
Then the real component (X) of the signal can be then expressed as

(9) $\begin{array}{cc}\begin{array}{c}X={\int }_{T_0}^{T_1}{A}_2\sin \left(\omega t+\mathrm{\Delta \theta }\right)+{\int }_{T_1}^{T_2}{A}_1\sin \left(\omega t\right)\\ =A_2\left(\cos \left(\omega T_0\right)-\cos \left(\omega T_1\right)\right)+A_1\left(\cos \left(\omega T_1\right)-\cos \left(\omega T_2\right)\right).\end{array}& \left(5\right)\end{array}$

(10) Using these expressions, the program performs the following steps to produce a measurement: 1. For the first point of the frequency sweep, read reference samples x.sub.1, y.sub.1 and signal samples x.sub.2, y.sub.2 in each ADC, averaging many points to reduce noise. 2. Determine amplitude and phase of reference and signal using Equation 3. 3. Calculate the total signal component and real component using Equation 5. 4. Tune the capacitance of the LCR circuit to the center, Larmor frequency. Set the programmable clock to the center frequency Change the DAC voltage on the varactor diode variable capacitor, repeating steps 1 to 3 until A.sub.2 is at a minimum. 5. Tune the delay so that the reference and signal are in phase. Set the DAC voltage to that corresponding to the center frequency Change the delay, repeating steps 1 to 3 until X is at a maximum. 6. Obtain Q-curves. Set the programmable clock to the first point in the frequency sweep range. For each frequency step, repeat steps 1 to 3, obtaining total and real components.

(11) It will thus be seen that the objects set forth above, among those made apparent from the preceding description, are efficiently attained and, because certain changes may be made in carrying out the above method and in the construction(s) set forth without departing from the spirit and scope of the invention, it is intended that all matter contained in the above description and shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.

(12) It is also to be understood that the following claims are intended to cover all of the generic and specific features of the invention herein described and all statements of the scope of the invention which, as a matter of language, might be said to fall therebetween.