Method for improving EMC robustness of integrated capacitive sensors

Abstract

A method is provided for improving the EMC robustness of Integrated Capacitive Sensor systems with a sensor Signal-Conditioner (SSC). The SSC is connected with a capacitive integrating converter to convert a received signal into a bit stream. An oscillator provides a plurality of sampling frequencies. A counter connected with the capacitive integrating converter collects the bit stream and calculates the digital representative of the physical input which is than stored in an output register. The method includes performing some conversions with different sampling frequencies from the oscillator or a frequency divider by the capacitive integrating Signal-Converter; storing the results of the samplings and using the results in the following cycle to calculate for each sampling frequency a difference to the prior sampling of the same frequency; and calculating the digital representative of the input signal from the external sensing capacitor as the reverse weighted average of the samplings of the different frequencies.

Claims

1. A method for improving the EMC robustness of Integrated Capacitive Sensor systems with a sensor Signal-Conditioner, having an external capacitor representing the physical quantity to be sensed, connected with a capacitive integrating converter to convert this capacity into a bit stream and an oscillator providing sampling frequency for the capacitive integrating converter and a counter connected with the capacitive integrating converter, whereby a controller is connected with the counter which collects the bit stream and calculates the digital representative of the physical input which is then stored in an output register, comprising the steps of performing conversions with different sampling frequencies from the oscillator or a frequency divider by the capacitive Sensor Signal-Converter; storing the results of the samplings and using the results in the following cycle to calculate for each sampling frequency a difference to the prior sampling of the same frequency; and calculating the digital representative of the input signal from the external sensing capacitor as the reverse weighted average of the samplings of the different frequencies.

2. The method according claim 1, further comprising an oscillator generating at least two sampling frequencies with f.sub.A=f.sub.CLK/(2x) and f.sub.B=f.sub.CLK/x.

3. The method according claim 2, further comprising that the at least two different sampling frequencies are generated sequential or parallel.

4. The method according claim 3, further comprising more conversions with three or other times f.sub.A generated by the oscillator or the frequency divider.

5. The method according claim 3, further comprising that the at least two different sampling frequencies are integer or non-integer shares of the oscillator clock or the frequency divider.

6. The method according one of claim 1, further comprising that the difference of the last two or more subsequent measurements minus minimum of the differences of the two (or more) frequency channels <A; B; . . . > are used for calculating the digital representative of the input signal.

7. A method, comprising: receiving a signal into sensor signal conditioner; sampling the signal in a sampling integrating converter at a plurality of sampling frequencies provided by an oscillator to form sampled signals; storing the sample signals; calculating differences between the sample signals and previously sampled signals of the same sampling frequencies; calculating a reverse weighted average of the samplings at different frequencies from the differences to form a digital representative of the signal; and storing the digital representative.

8. The method of claim 7, wherein the oscillator generates at least two sampling frequencies with f.sub.A=f.sub.CLK/(2x) and f.sub.B=f.sub.CLK/x.

9. The method of claim 8, wherein the at least two sampling frequencies are generated sequentially or in parallel.

10. The method of claim 9, further including conversions with three or other times fA generated by the oscillator or a frequency divider.

11. The method of claim 9, wherein the at least two different sampling frequencies are integer or non-integer shares of the oscillator.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The following will be a detailed description of embodiments of the invention with reference to the accompanying drawings.

(2) FIG. 1 shows a block diagram of a capacitive sensor signal-conditioner (SSC) which is operated according the new method for improving the EMC robustness.

(3) FIG. 2 shows a schema demonstrating the aliasing effect vs. frequency.

DETAILED DESCRIPTION

(4) The system described here consists according FIG. 1 of an external capacitor (a) representing the physical quantity to be sensed, which is connected with the input of a capacitive integrating converter (ADC) (b) to convert this capacity (a) into a bit stream and also connected with reference voltage sources Vref+ and Vref−.

(5) The capacitive integrating converter (b) comprises an operational amplifier with capacitive feedback followed by an analog/digital signal converter (ADC) or, at least a comparator.

(6) An oscillator (g) delivers a clock with a frequency f.sub.OSC to a state machine (c). This state machine (c) works as a frequency divider and provides the sampling frequency f.sub.A as well as f.sub.B and delivers the control signals of the capacitive integrating converter (ADC) (b) and a counter (d) connected with the output of the capacitive integrating converter (b). A controller (e) connected with the state machine (c) and a counter (d) which collects the bit stream and calculates the digital representative of the physical input which is than stored in an output register (f) connected with the output of the controller (e). This Capacitive Sensor Signal-Conditioner (SSC) is based on a system scheme which is widely used and well known for such Signal-Conditioner.

(7) The new idea consists of two parts:

(8) First, the main part of the capacitive Sensor Signal-Conditioner (SSC) is the capacitive integrating converter (ADC) (b) which works on the principle of cyclic charge transfer from external sensing capacitor (a) to the internal integrator cap—this is done with a certain sampling clock of the oscillator (g) or generated by the state machine (c).

(9) Instead of a sampling frequency with only one frequency, the capacitive Sensor Signal-Conditioner (SSC) now performs sequential or parallel two (or more) conversions <A; B; . . . > with different sampling frequencies. These different frequencies may be generated directly from the oscillator (g) or by dividing the oscillator clock f.sub.OSC into integer or non-integer shares of the oscillator clock f.sub.OSC with a configurable counter inside the state machine (c).

(10) Especially two samplings are used, the first with frequency f.sub.A and the second with frequency two times f.sub.A or in case of more conversions with three or other times f.sub.A.

(11) Second, the results of both (or more) samplings with f.sub.A and f.sub.B are stored and used in the following cycle to calculate for each sampling a difference to the prior sampling of the same frequency f.sub.A or f.sub.B respectively.

(12) The result (rslt) as digital representative of the input signal from the external sensing capacitor (a) is than calculated as the reverse weighted average of the samplings obtained with the two (or more) different frequencies (reg.sub.A, reg.sub.B).
rslt=δ.sub.B.Math.regA+(δ.sub.B−1).Math.reg.sub.B  (1)

(13) δ.sub.B: Weight of frequency channel B from normalized absolute difference of the last two or more subsequent measurements at frequency channel B.

(14) This means, the higher the noise at one sample frequency represented by a normalized absolute difference or another statistical relevant parameter, the lower is the influence of this channel to the result. This explores the property of the system to show a huge noise due to phase beat around aliasing frequency compared to the noise at any other frequency.

(15) Instead of simple difference, a more sophisticated statistical deviation parameter may be used to determine the weights. Especially a formulae considering the difference between actual and stored weight of the last cycle shall be used. This may include configurable low pass filtering of fast changes of the weights to control robustness in dynamic of the algorithm.

(16) Further, instead of using the difference of subsequent measurements, the difference minus minimum of the differences of the two (or more) frequency channels <A; B; . . . > shall be used.

(17) The invention described above reduces the aliasing effect significantly. This will improve DPI or BCI test results even in case of very high spectral resolution.